xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/qcom-apq8064-pins.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun&tlmm_pinmux {
4*4882a593Smuzhiyun	sdc4_gpios: sdc4-gpios {
5*4882a593Smuzhiyun		pios {
6*4882a593Smuzhiyun			pins = "gpio63", "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
7*4882a593Smuzhiyun			function = "sdc4";
8*4882a593Smuzhiyun		};
9*4882a593Smuzhiyun	};
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun	sdcc1_pins: sdcc1-pin-active {
12*4882a593Smuzhiyun		clk {
13*4882a593Smuzhiyun			pins = "sdc1_clk";
14*4882a593Smuzhiyun			drive-strengh = <16>;
15*4882a593Smuzhiyun			bias-disable;
16*4882a593Smuzhiyun		};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun		cmd {
19*4882a593Smuzhiyun			pins = "sdc1_cmd";
20*4882a593Smuzhiyun			drive-strengh = <10>;
21*4882a593Smuzhiyun			bias-pull-up;
22*4882a593Smuzhiyun		};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		data {
25*4882a593Smuzhiyun			pins = "sdc1_data";
26*4882a593Smuzhiyun			drive-strengh = <10>;
27*4882a593Smuzhiyun			bias-pull-up;
28*4882a593Smuzhiyun		};
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	sdcc3_pins: sdcc3-pin-active {
32*4882a593Smuzhiyun		clk {
33*4882a593Smuzhiyun			pins = "sdc3_clk";
34*4882a593Smuzhiyun			drive-strengh = <8>;
35*4882a593Smuzhiyun			bias-disable;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		cmd {
39*4882a593Smuzhiyun			pins = "sdc3_cmd";
40*4882a593Smuzhiyun			drive-strengh = <8>;
41*4882a593Smuzhiyun			bias-pull-up;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		data {
45*4882a593Smuzhiyun			pins = "sdc3_data";
46*4882a593Smuzhiyun			drive-strengh = <8>;
47*4882a593Smuzhiyun			bias-pull-up;
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	ps_hold: ps_hold {
52*4882a593Smuzhiyun		mux {
53*4882a593Smuzhiyun			pins = "gpio78";
54*4882a593Smuzhiyun			function = "ps_hold";
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun	};
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	i2c1_pins: i2c1 {
59*4882a593Smuzhiyun		mux {
60*4882a593Smuzhiyun			pins = "gpio20", "gpio21";
61*4882a593Smuzhiyun			function = "gsbi1";
62*4882a593Smuzhiyun		};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun		pinconf {
65*4882a593Smuzhiyun			pins = "gpio20", "gpio21";
66*4882a593Smuzhiyun			drive-strength = <16>;
67*4882a593Smuzhiyun			bias-disable;
68*4882a593Smuzhiyun		};
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	i2c1_pins_sleep: i2c1_pins_sleep {
72*4882a593Smuzhiyun		mux {
73*4882a593Smuzhiyun			pins = "gpio20", "gpio21";
74*4882a593Smuzhiyun			function = "gpio";
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun		pinconf {
77*4882a593Smuzhiyun			pins = "gpio20", "gpio21";
78*4882a593Smuzhiyun			drive-strength = <2>;
79*4882a593Smuzhiyun			bias-disable = <0>;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun	};
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	gsbi1_uart_2pins: gsbi1_uart_2pins {
84*4882a593Smuzhiyun		mux {
85*4882a593Smuzhiyun			pins = "gpio18", "gpio19";
86*4882a593Smuzhiyun			function = "gsbi1";
87*4882a593Smuzhiyun		};
88*4882a593Smuzhiyun	};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun	gsbi1_uart_4pins: gsbi1_uart_4pins {
91*4882a593Smuzhiyun		mux {
92*4882a593Smuzhiyun			pins = "gpio18", "gpio19", "gpio20", "gpio21";
93*4882a593Smuzhiyun			function = "gsbi1";
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	i2c2_pins: i2c2 {
98*4882a593Smuzhiyun		mux {
99*4882a593Smuzhiyun			pins = "gpio24", "gpio25";
100*4882a593Smuzhiyun			function = "gsbi2";
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun		pinconf {
104*4882a593Smuzhiyun			pins = "gpio24", "gpio25";
105*4882a593Smuzhiyun			drive-strength = <16>;
106*4882a593Smuzhiyun			bias-disable;
107*4882a593Smuzhiyun		};
108*4882a593Smuzhiyun	};
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun	i2c2_pins_sleep: i2c2_pins_sleep {
111*4882a593Smuzhiyun		mux {
112*4882a593Smuzhiyun			pins = "gpio24", "gpio25";
113*4882a593Smuzhiyun			function = "gpio";
114*4882a593Smuzhiyun		};
115*4882a593Smuzhiyun
116*4882a593Smuzhiyun		pinconf {
117*4882a593Smuzhiyun			pins = "gpio24", "gpio25";
118*4882a593Smuzhiyun			drive-strength = <2>;
119*4882a593Smuzhiyun			bias-disable = <0>;
120*4882a593Smuzhiyun		};
121*4882a593Smuzhiyun	};
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun	i2c3_pins: i2c3 {
124*4882a593Smuzhiyun		mux {
125*4882a593Smuzhiyun			pins = "gpio8", "gpio9";
126*4882a593Smuzhiyun			function = "gsbi3";
127*4882a593Smuzhiyun		};
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun		pinconf {
130*4882a593Smuzhiyun			pins = "gpio8", "gpio9";
131*4882a593Smuzhiyun			drive-strength = <16>;
132*4882a593Smuzhiyun			bias-disable;
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun	};
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	i2c3_pins_sleep: i2c3_pins_sleep {
137*4882a593Smuzhiyun		mux {
138*4882a593Smuzhiyun			pins = "gpio8", "gpio9";
139*4882a593Smuzhiyun			function = "gpio";
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun		pinconf {
142*4882a593Smuzhiyun			pins = "gpio8", "gpio9";
143*4882a593Smuzhiyun			drive-strength = <2>;
144*4882a593Smuzhiyun			bias-disable = <0>;
145*4882a593Smuzhiyun		};
146*4882a593Smuzhiyun	};
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun	i2c4_pins: i2c4 {
149*4882a593Smuzhiyun		mux {
150*4882a593Smuzhiyun			pins = "gpio12", "gpio13";
151*4882a593Smuzhiyun			function = "gsbi4";
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun		pinconf {
155*4882a593Smuzhiyun			pins = "gpio12", "gpio13";
156*4882a593Smuzhiyun			drive-strength = <16>;
157*4882a593Smuzhiyun			bias-disable;
158*4882a593Smuzhiyun		};
159*4882a593Smuzhiyun	};
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun	i2c4_pins_sleep: i2c4_pins_sleep {
162*4882a593Smuzhiyun		mux {
163*4882a593Smuzhiyun			pins = "gpio12", "gpio13";
164*4882a593Smuzhiyun			function = "gpio";
165*4882a593Smuzhiyun		};
166*4882a593Smuzhiyun		pinconf {
167*4882a593Smuzhiyun			pins = "gpio12", "gpio13";
168*4882a593Smuzhiyun			drive-strength = <2>;
169*4882a593Smuzhiyun			bias-disable = <0>;
170*4882a593Smuzhiyun		};
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	spi5_default: spi5_default {
174*4882a593Smuzhiyun		pinmux {
175*4882a593Smuzhiyun			pins = "gpio51", "gpio52", "gpio54";
176*4882a593Smuzhiyun			function = "gsbi5";
177*4882a593Smuzhiyun		};
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun		pinmux_cs {
180*4882a593Smuzhiyun			function = "gpio";
181*4882a593Smuzhiyun			pins = "gpio53";
182*4882a593Smuzhiyun		};
183*4882a593Smuzhiyun
184*4882a593Smuzhiyun		pinconf {
185*4882a593Smuzhiyun			pins = "gpio51", "gpio52", "gpio54";
186*4882a593Smuzhiyun			drive-strength = <16>;
187*4882a593Smuzhiyun			bias-disable;
188*4882a593Smuzhiyun		};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun		pinconf_cs {
191*4882a593Smuzhiyun			pins = "gpio53";
192*4882a593Smuzhiyun			drive-strength = <16>;
193*4882a593Smuzhiyun			bias-disable;
194*4882a593Smuzhiyun			output-high;
195*4882a593Smuzhiyun		};
196*4882a593Smuzhiyun	};
197*4882a593Smuzhiyun
198*4882a593Smuzhiyun	spi5_sleep: spi5_sleep {
199*4882a593Smuzhiyun		pinmux {
200*4882a593Smuzhiyun			function = "gpio";
201*4882a593Smuzhiyun			pins = "gpio51", "gpio52", "gpio53", "gpio54";
202*4882a593Smuzhiyun		};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun		pinconf {
205*4882a593Smuzhiyun			pins = "gpio51", "gpio52", "gpio53", "gpio54";
206*4882a593Smuzhiyun			drive-strength = <2>;
207*4882a593Smuzhiyun			bias-pull-down;
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun	};
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun	i2c6_pins: i2c6 {
212*4882a593Smuzhiyun		mux {
213*4882a593Smuzhiyun			pins = "gpio16", "gpio17";
214*4882a593Smuzhiyun			function = "gsbi6";
215*4882a593Smuzhiyun		};
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun		pinconf {
218*4882a593Smuzhiyun			pins = "gpio16", "gpio17";
219*4882a593Smuzhiyun			drive-strength = <16>;
220*4882a593Smuzhiyun			bias-disable;
221*4882a593Smuzhiyun		};
222*4882a593Smuzhiyun	};
223*4882a593Smuzhiyun
224*4882a593Smuzhiyun	i2c6_pins_sleep: i2c6_pins_sleep {
225*4882a593Smuzhiyun		mux {
226*4882a593Smuzhiyun			pins = "gpio16", "gpio17";
227*4882a593Smuzhiyun			function = "gpio";
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun		pinconf {
230*4882a593Smuzhiyun			pins = "gpio16", "gpio17";
231*4882a593Smuzhiyun			drive-strength = <2>;
232*4882a593Smuzhiyun			bias-disable = <0>;
233*4882a593Smuzhiyun		};
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun	gsbi6_uart_2pins: gsbi6_uart_2pins {
237*4882a593Smuzhiyun		mux {
238*4882a593Smuzhiyun			pins = "gpio14", "gpio15";
239*4882a593Smuzhiyun			function = "gsbi6";
240*4882a593Smuzhiyun		};
241*4882a593Smuzhiyun	};
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun	gsbi6_uart_4pins: gsbi6_uart_4pins {
244*4882a593Smuzhiyun		mux {
245*4882a593Smuzhiyun			pins = "gpio14", "gpio15", "gpio16", "gpio17";
246*4882a593Smuzhiyun			function = "gsbi6";
247*4882a593Smuzhiyun		};
248*4882a593Smuzhiyun	};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun	gsbi7_uart_2pins: gsbi7_uart_2pins {
251*4882a593Smuzhiyun		mux {
252*4882a593Smuzhiyun			pins = "gpio82", "gpio83";
253*4882a593Smuzhiyun			function = "gsbi7";
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun	};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	gsbi7_uart_4pins: gsbi7_uart_4pins {
258*4882a593Smuzhiyun		mux {
259*4882a593Smuzhiyun			pins = "gpio82", "gpio83", "gpio84", "gpio85";
260*4882a593Smuzhiyun			function = "gsbi7";
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun	};
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun	i2c7_pins: i2c7 {
265*4882a593Smuzhiyun		mux {
266*4882a593Smuzhiyun			pins = "gpio84", "gpio85";
267*4882a593Smuzhiyun			function = "gsbi7";
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun		pinconf {
271*4882a593Smuzhiyun			pins = "gpio84", "gpio85";
272*4882a593Smuzhiyun			drive-strength = <16>;
273*4882a593Smuzhiyun			bias-disable;
274*4882a593Smuzhiyun		};
275*4882a593Smuzhiyun	};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun	i2c7_pins_sleep: i2c7_pins_sleep {
278*4882a593Smuzhiyun		mux {
279*4882a593Smuzhiyun			pins = "gpio84", "gpio85";
280*4882a593Smuzhiyun			function = "gpio";
281*4882a593Smuzhiyun		};
282*4882a593Smuzhiyun		pinconf {
283*4882a593Smuzhiyun			pins = "gpio84", "gpio85";
284*4882a593Smuzhiyun			drive-strength = <2>;
285*4882a593Smuzhiyun			bias-disable = <0>;
286*4882a593Smuzhiyun		};
287*4882a593Smuzhiyun	};
288*4882a593Smuzhiyun
289*4882a593Smuzhiyun	riva_fm_pin_a: riva-fm-active {
290*4882a593Smuzhiyun		pins = "gpio14", "gpio15";
291*4882a593Smuzhiyun		function = "riva_fm";
292*4882a593Smuzhiyun	};
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun	riva_bt_pin_a: riva-bt-active {
295*4882a593Smuzhiyun		pins = "gpio16", "gpio17";
296*4882a593Smuzhiyun		function = "riva_bt";
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	riva_wlan_pin_a: riva-wlan-active {
300*4882a593Smuzhiyun		pins = "gpio64", "gpio65", "gpio66", "gpio67", "gpio68";
301*4882a593Smuzhiyun		function = "riva_wlan";
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun		drive-strength = <6>;
304*4882a593Smuzhiyun		bias-pull-down;
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	hdmi_pinctrl: hdmi-pinctrl {
308*4882a593Smuzhiyun		mux {
309*4882a593Smuzhiyun			pins = "gpio70", "gpio71", "gpio72";
310*4882a593Smuzhiyun			function = "hdmi";
311*4882a593Smuzhiyun		};
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun		pinconf_ddc {
314*4882a593Smuzhiyun			pins = "gpio70", "gpio71";
315*4882a593Smuzhiyun			bias-pull-up;
316*4882a593Smuzhiyun			drive-strength = <2>;
317*4882a593Smuzhiyun		};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun		pinconf_hpd {
320*4882a593Smuzhiyun			pins = "gpio72";
321*4882a593Smuzhiyun			bias-pull-down;
322*4882a593Smuzhiyun			drive-strength = <16>;
323*4882a593Smuzhiyun		};
324*4882a593Smuzhiyun	};
325*4882a593Smuzhiyun};
326