xref: /OK3568_Linux_fs/kernel/arch/arm64/boot/dts/qcom/msm8996-pins.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved.
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun&msmgpio {
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun	wcd9xxx_intr {
9*4882a593Smuzhiyun		wcd_intr_default: wcd_intr_default{
10*4882a593Smuzhiyun			mux {
11*4882a593Smuzhiyun				pins = "gpio54";
12*4882a593Smuzhiyun				function = "gpio";
13*4882a593Smuzhiyun			};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun			config {
16*4882a593Smuzhiyun				pins = "gpio54";
17*4882a593Smuzhiyun				drive-strength = <2>; /* 2 mA */
18*4882a593Smuzhiyun				bias-pull-down; /* pull down */
19*4882a593Smuzhiyun				input-enable;
20*4882a593Smuzhiyun			};
21*4882a593Smuzhiyun		};
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	cdc_reset_ctrl {
25*4882a593Smuzhiyun		cdc_reset_sleep: cdc_reset_sleep {
26*4882a593Smuzhiyun			mux {
27*4882a593Smuzhiyun				pins = "gpio64";
28*4882a593Smuzhiyun				function = "gpio";
29*4882a593Smuzhiyun			};
30*4882a593Smuzhiyun			config {
31*4882a593Smuzhiyun				pins = "gpio64";
32*4882a593Smuzhiyun				drive-strength = <16>;
33*4882a593Smuzhiyun				bias-disable;
34*4882a593Smuzhiyun				output-low;
35*4882a593Smuzhiyun			};
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun		cdc_reset_active:cdc_reset_active {
38*4882a593Smuzhiyun			mux {
39*4882a593Smuzhiyun				pins = "gpio64";
40*4882a593Smuzhiyun				function = "gpio";
41*4882a593Smuzhiyun			};
42*4882a593Smuzhiyun			config {
43*4882a593Smuzhiyun				pins = "gpio64";
44*4882a593Smuzhiyun				drive-strength = <16>;
45*4882a593Smuzhiyun				bias-pull-down;
46*4882a593Smuzhiyun				output-high;
47*4882a593Smuzhiyun			};
48*4882a593Smuzhiyun		};
49*4882a593Smuzhiyun	};
50*4882a593Smuzhiyun
51*4882a593Smuzhiyun	blsp1_spi0_default: blsp1_spi0_default {
52*4882a593Smuzhiyun		pinmux {
53*4882a593Smuzhiyun			function = "blsp_spi1";
54*4882a593Smuzhiyun			pins = "gpio0", "gpio1", "gpio3";
55*4882a593Smuzhiyun		};
56*4882a593Smuzhiyun		pinmux_cs {
57*4882a593Smuzhiyun			function = "gpio";
58*4882a593Smuzhiyun			pins = "gpio2";
59*4882a593Smuzhiyun		};
60*4882a593Smuzhiyun		pinconf {
61*4882a593Smuzhiyun			pins = "gpio0", "gpio1", "gpio3";
62*4882a593Smuzhiyun			drive-strength = <12>;
63*4882a593Smuzhiyun			bias-disable;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun		pinconf_cs {
66*4882a593Smuzhiyun			pins = "gpio2";
67*4882a593Smuzhiyun			drive-strength = <16>;
68*4882a593Smuzhiyun			bias-disable;
69*4882a593Smuzhiyun			output-high;
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun	};
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun	blsp1_spi0_sleep: blsp1_spi0_sleep {
74*4882a593Smuzhiyun		pinmux {
75*4882a593Smuzhiyun			function = "gpio";
76*4882a593Smuzhiyun			pins = "gpio0", "gpio1", "gpio2", "gpio3";
77*4882a593Smuzhiyun		};
78*4882a593Smuzhiyun		pinconf {
79*4882a593Smuzhiyun			pins = "gpio0", "gpio1", "gpio2", "gpio3";
80*4882a593Smuzhiyun			drive-strength = <2>;
81*4882a593Smuzhiyun			bias-pull-down;
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun	};
84*4882a593Smuzhiyun
85*4882a593Smuzhiyun	blsp1_i2c2_default: blsp1_i2c2_default {
86*4882a593Smuzhiyun		pinmux {
87*4882a593Smuzhiyun			function = "blsp_i2c3";
88*4882a593Smuzhiyun			pins = "gpio47", "gpio48";
89*4882a593Smuzhiyun		};
90*4882a593Smuzhiyun		pinconf {
91*4882a593Smuzhiyun			pins = "gpio47", "gpio48";
92*4882a593Smuzhiyun			drive-strength = <16>;
93*4882a593Smuzhiyun			bias-disable = <0>;
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	blsp1_i2c2_sleep: blsp1_i2c2_sleep {
98*4882a593Smuzhiyun		pinmux {
99*4882a593Smuzhiyun			function = "gpio";
100*4882a593Smuzhiyun			pins = "gpio47", "gpio48";
101*4882a593Smuzhiyun		};
102*4882a593Smuzhiyun		pinconf {
103*4882a593Smuzhiyun			pins = "gpio47", "gpio48";
104*4882a593Smuzhiyun			drive-strength = <2>;
105*4882a593Smuzhiyun			bias-disable = <0>;
106*4882a593Smuzhiyun		};
107*4882a593Smuzhiyun	};
108*4882a593Smuzhiyun
109*4882a593Smuzhiyun	blsp2_i2c0_default: blsp2_i2c0 {
110*4882a593Smuzhiyun		pinmux {
111*4882a593Smuzhiyun			function = "blsp_i2c7";
112*4882a593Smuzhiyun			pins = "gpio55", "gpio56";
113*4882a593Smuzhiyun		};
114*4882a593Smuzhiyun		pinconf {
115*4882a593Smuzhiyun			pins = "gpio55", "gpio56";
116*4882a593Smuzhiyun			drive-strength = <16>;
117*4882a593Smuzhiyun			bias-disable;
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun	};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun	blsp2_i2c0_sleep: blsp2_i2c0_sleep {
122*4882a593Smuzhiyun		pinmux {
123*4882a593Smuzhiyun			function = "gpio";
124*4882a593Smuzhiyun			pins = "gpio55", "gpio56";
125*4882a593Smuzhiyun		};
126*4882a593Smuzhiyun		pinconf {
127*4882a593Smuzhiyun			pins = "gpio55", "gpio56";
128*4882a593Smuzhiyun			drive-strength = <2>;
129*4882a593Smuzhiyun			bias-disable;
130*4882a593Smuzhiyun		};
131*4882a593Smuzhiyun	};
132*4882a593Smuzhiyun
133*4882a593Smuzhiyun	blsp2_uart1_2pins_default: blsp2_uart1_2pins {
134*4882a593Smuzhiyun		pinmux {
135*4882a593Smuzhiyun			function = "blsp_uart8";
136*4882a593Smuzhiyun			pins = "gpio4", "gpio5";
137*4882a593Smuzhiyun		};
138*4882a593Smuzhiyun		pinconf {
139*4882a593Smuzhiyun			pins = "gpio4", "gpio5";
140*4882a593Smuzhiyun			drive-strength = <16>;
141*4882a593Smuzhiyun			bias-disable;
142*4882a593Smuzhiyun		};
143*4882a593Smuzhiyun	};
144*4882a593Smuzhiyun
145*4882a593Smuzhiyun	blsp2_uart1_2pins_sleep: blsp2_uart1_2pins_sleep {
146*4882a593Smuzhiyun		pinmux {
147*4882a593Smuzhiyun			function = "gpio";
148*4882a593Smuzhiyun			pins = "gpio4", "gpio5";
149*4882a593Smuzhiyun		};
150*4882a593Smuzhiyun		pinconf {
151*4882a593Smuzhiyun			pins = "gpio4", "gpio5";
152*4882a593Smuzhiyun			drive-strength = <2>;
153*4882a593Smuzhiyun			bias-disable;
154*4882a593Smuzhiyun		};
155*4882a593Smuzhiyun	};
156*4882a593Smuzhiyun
157*4882a593Smuzhiyun	blsp2_uart1_4pins_default: blsp2_uart1_4pins {
158*4882a593Smuzhiyun		pinmux {
159*4882a593Smuzhiyun			function = "blsp_uart8";
160*4882a593Smuzhiyun			pins = "gpio4", "gpio5", "gpio6", "gpio7";
161*4882a593Smuzhiyun		};
162*4882a593Smuzhiyun
163*4882a593Smuzhiyun		pinconf {
164*4882a593Smuzhiyun			pins = "gpio4", "gpio5", "gpio6", "gpio7";
165*4882a593Smuzhiyun			drive-strength = <16>;
166*4882a593Smuzhiyun			bias-disable;
167*4882a593Smuzhiyun		};
168*4882a593Smuzhiyun	};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun	blsp2_uart1_4pins_sleep: blsp2_uart1_4pins_sleep {
171*4882a593Smuzhiyun		pinmux {
172*4882a593Smuzhiyun			function = "gpio";
173*4882a593Smuzhiyun			pins = "gpio4", "gpio5", "gpio6", "gpio7";
174*4882a593Smuzhiyun		};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun		pinconf {
177*4882a593Smuzhiyun			pins = "gpio4", "gpio5", "gpio6", "gpio7";
178*4882a593Smuzhiyun			drive-strength = <2>;
179*4882a593Smuzhiyun			bias-disable;
180*4882a593Smuzhiyun		};
181*4882a593Smuzhiyun	};
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun	blsp2_i2c1_default: blsp2_i2c1 {
184*4882a593Smuzhiyun		pinmux {
185*4882a593Smuzhiyun			function = "blsp_i2c8";
186*4882a593Smuzhiyun			pins = "gpio6", "gpio7";
187*4882a593Smuzhiyun		};
188*4882a593Smuzhiyun		pinconf {
189*4882a593Smuzhiyun			pins = "gpio6", "gpio7";
190*4882a593Smuzhiyun			drive-strength = <16>;
191*4882a593Smuzhiyun			bias-disable;
192*4882a593Smuzhiyun		};
193*4882a593Smuzhiyun	};
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun	blsp2_i2c1_sleep: blsp2_i2c1_sleep {
196*4882a593Smuzhiyun		pinmux {
197*4882a593Smuzhiyun			function = "gpio";
198*4882a593Smuzhiyun			pins = "gpio6", "gpio7";
199*4882a593Smuzhiyun		};
200*4882a593Smuzhiyun		pinconf {
201*4882a593Smuzhiyun			pins = "gpio6", "gpio7";
202*4882a593Smuzhiyun			drive-strength = <2>;
203*4882a593Smuzhiyun			bias-disable;
204*4882a593Smuzhiyun		};
205*4882a593Smuzhiyun	};
206*4882a593Smuzhiyun
207*4882a593Smuzhiyun	blsp2_uart2_2pins_default: blsp2_uart2_2pins {
208*4882a593Smuzhiyun		pinmux {
209*4882a593Smuzhiyun			function = "blsp_uart9";
210*4882a593Smuzhiyun			pins = "gpio49", "gpio50";
211*4882a593Smuzhiyun		};
212*4882a593Smuzhiyun		pinconf {
213*4882a593Smuzhiyun			pins = "gpio49", "gpio50";
214*4882a593Smuzhiyun			drive-strength = <16>;
215*4882a593Smuzhiyun			bias-disable;
216*4882a593Smuzhiyun		};
217*4882a593Smuzhiyun	};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun	blsp2_uart2_2pins_sleep: blsp2_uart2_2pins_sleep {
220*4882a593Smuzhiyun		pinmux {
221*4882a593Smuzhiyun			function = "gpio";
222*4882a593Smuzhiyun			pins = "gpio49", "gpio50";
223*4882a593Smuzhiyun		};
224*4882a593Smuzhiyun		pinconf {
225*4882a593Smuzhiyun			pins = "gpio49", "gpio50";
226*4882a593Smuzhiyun			drive-strength = <2>;
227*4882a593Smuzhiyun			bias-disable;
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun	};
230*4882a593Smuzhiyun
231*4882a593Smuzhiyun	blsp2_uart2_4pins_default: blsp2_uart2_4pins {
232*4882a593Smuzhiyun		pinmux {
233*4882a593Smuzhiyun			function = "blsp_uart9";
234*4882a593Smuzhiyun			pins = "gpio49", "gpio50", "gpio51", "gpio52";
235*4882a593Smuzhiyun		};
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun		pinconf {
238*4882a593Smuzhiyun			pins = "gpio49", "gpio50", "gpio51", "gpio52";
239*4882a593Smuzhiyun			drive-strength = <16>;
240*4882a593Smuzhiyun			bias-disable;
241*4882a593Smuzhiyun		};
242*4882a593Smuzhiyun	};
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun	blsp2_uart2_4pins_sleep: blsp2_uart2_4pins_sleep {
245*4882a593Smuzhiyun		pinmux {
246*4882a593Smuzhiyun			function = "gpio";
247*4882a593Smuzhiyun			pins = "gpio49", "gpio50", "gpio51", "gpio52";
248*4882a593Smuzhiyun		};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun		pinconf {
251*4882a593Smuzhiyun			pins = "gpio49", "gpio50", "gpio51", "gpio52";
252*4882a593Smuzhiyun			drive-strength = <2>;
253*4882a593Smuzhiyun			bias-disable;
254*4882a593Smuzhiyun		};
255*4882a593Smuzhiyun	};
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	blsp2_spi5_default: blsp2_spi5_default {
258*4882a593Smuzhiyun		pinmux {
259*4882a593Smuzhiyun			function = "blsp_spi12";
260*4882a593Smuzhiyun			pins = "gpio85", "gpio86", "gpio88";
261*4882a593Smuzhiyun		};
262*4882a593Smuzhiyun		pinmux_cs {
263*4882a593Smuzhiyun			function = "gpio";
264*4882a593Smuzhiyun			pins = "gpio87";
265*4882a593Smuzhiyun		};
266*4882a593Smuzhiyun		pinconf {
267*4882a593Smuzhiyun			pins = "gpio85", "gpio86", "gpio88";
268*4882a593Smuzhiyun			drive-strength = <12>;
269*4882a593Smuzhiyun			bias-disable;
270*4882a593Smuzhiyun		};
271*4882a593Smuzhiyun		pinconf_cs {
272*4882a593Smuzhiyun			pins = "gpio87";
273*4882a593Smuzhiyun			drive-strength = <16>;
274*4882a593Smuzhiyun			bias-disable;
275*4882a593Smuzhiyun			output-high;
276*4882a593Smuzhiyun		};
277*4882a593Smuzhiyun	};
278*4882a593Smuzhiyun
279*4882a593Smuzhiyun	blsp2_spi5_sleep: blsp2_spi5_sleep {
280*4882a593Smuzhiyun		pinmux {
281*4882a593Smuzhiyun			function = "gpio";
282*4882a593Smuzhiyun			pins = "gpio85", "gpio86", "gpio87", "gpio88";
283*4882a593Smuzhiyun		};
284*4882a593Smuzhiyun		pinconf {
285*4882a593Smuzhiyun			pins = "gpio85", "gpio86", "gpio87", "gpio88";
286*4882a593Smuzhiyun			drive-strength = <2>;
287*4882a593Smuzhiyun			bias-pull-down;
288*4882a593Smuzhiyun		};
289*4882a593Smuzhiyun	};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun	sdc2_clk_on: sdc2_clk_on {
292*4882a593Smuzhiyun		config {
293*4882a593Smuzhiyun			pins = "sdc2_clk";
294*4882a593Smuzhiyun			bias-disable;		/* NO pull */
295*4882a593Smuzhiyun			drive-strength = <16>;	/* 16 MA */
296*4882a593Smuzhiyun		};
297*4882a593Smuzhiyun	};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun	sdc2_clk_off: sdc2_clk_off {
300*4882a593Smuzhiyun		config {
301*4882a593Smuzhiyun			pins = "sdc2_clk";
302*4882a593Smuzhiyun			bias-disable;		/* NO pull */
303*4882a593Smuzhiyun			drive-strength = <2>;	/* 2 MA */
304*4882a593Smuzhiyun		};
305*4882a593Smuzhiyun	};
306*4882a593Smuzhiyun
307*4882a593Smuzhiyun	sdc2_cmd_on: sdc2_cmd_on {
308*4882a593Smuzhiyun		config {
309*4882a593Smuzhiyun			pins = "sdc2_cmd";
310*4882a593Smuzhiyun			bias-pull-up;		/* pull up */
311*4882a593Smuzhiyun			drive-strength = <10>;	/* 10 MA */
312*4882a593Smuzhiyun		};
313*4882a593Smuzhiyun	};
314*4882a593Smuzhiyun
315*4882a593Smuzhiyun	sdc2_cmd_off: sdc2_cmd_off {
316*4882a593Smuzhiyun		config {
317*4882a593Smuzhiyun			pins = "sdc2_cmd";
318*4882a593Smuzhiyun			bias-pull-up;		/* pull up */
319*4882a593Smuzhiyun			drive-strength = <2>;	/* 2 MA */
320*4882a593Smuzhiyun		};
321*4882a593Smuzhiyun	};
322*4882a593Smuzhiyun
323*4882a593Smuzhiyun	sdc2_data_on: sdc2_data_on {
324*4882a593Smuzhiyun		config {
325*4882a593Smuzhiyun			pins = "sdc2_data";
326*4882a593Smuzhiyun			bias-pull-up;		/* pull up */
327*4882a593Smuzhiyun			drive-strength = <10>;	/* 10 MA */
328*4882a593Smuzhiyun		};
329*4882a593Smuzhiyun	};
330*4882a593Smuzhiyun
331*4882a593Smuzhiyun	sdc2_data_off: sdc2_data_off {
332*4882a593Smuzhiyun		config {
333*4882a593Smuzhiyun			pins = "sdc2_data";
334*4882a593Smuzhiyun			bias-pull-up;		/* pull up */
335*4882a593Smuzhiyun			drive-strength = <2>;	/* 2 MA */
336*4882a593Smuzhiyun		};
337*4882a593Smuzhiyun	};
338*4882a593Smuzhiyun
339*4882a593Smuzhiyun	pcie0_clkreq_default: pcie0_clkreq_default {
340*4882a593Smuzhiyun		mux {
341*4882a593Smuzhiyun			pins = "gpio36";
342*4882a593Smuzhiyun			function = "pci_e0";
343*4882a593Smuzhiyun		};
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun		config {
346*4882a593Smuzhiyun			pins = "gpio36";
347*4882a593Smuzhiyun			drive-strength = <2>;
348*4882a593Smuzhiyun			bias-pull-up;
349*4882a593Smuzhiyun		};
350*4882a593Smuzhiyun	};
351*4882a593Smuzhiyun
352*4882a593Smuzhiyun	pcie0_perst_default: pcie0_perst_default {
353*4882a593Smuzhiyun		mux {
354*4882a593Smuzhiyun			pins = "gpio35";
355*4882a593Smuzhiyun			function = "gpio";
356*4882a593Smuzhiyun		};
357*4882a593Smuzhiyun
358*4882a593Smuzhiyun		config {
359*4882a593Smuzhiyun			pins = "gpio35";
360*4882a593Smuzhiyun			drive-strength = <2>;
361*4882a593Smuzhiyun			bias-pull-down;
362*4882a593Smuzhiyun		};
363*4882a593Smuzhiyun	};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun	pcie0_wake_default: pcie0_wake_default {
366*4882a593Smuzhiyun		mux {
367*4882a593Smuzhiyun			pins = "gpio37";
368*4882a593Smuzhiyun			function = "gpio";
369*4882a593Smuzhiyun		};
370*4882a593Smuzhiyun
371*4882a593Smuzhiyun		config {
372*4882a593Smuzhiyun			pins = "gpio37";
373*4882a593Smuzhiyun			drive-strength = <2>;
374*4882a593Smuzhiyun			bias-pull-up;
375*4882a593Smuzhiyun		};
376*4882a593Smuzhiyun	};
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun	pcie0_clkreq_sleep: pcie0_clkreq_sleep {
379*4882a593Smuzhiyun		mux {
380*4882a593Smuzhiyun			pins = "gpio36";
381*4882a593Smuzhiyun			function = "gpio";
382*4882a593Smuzhiyun		};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun		config {
385*4882a593Smuzhiyun			pins = "gpio36";
386*4882a593Smuzhiyun			drive-strength = <2>;
387*4882a593Smuzhiyun			bias-disable;
388*4882a593Smuzhiyun		};
389*4882a593Smuzhiyun	};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun	pcie0_wake_sleep: pcie0_wake_sleep {
392*4882a593Smuzhiyun		mux {
393*4882a593Smuzhiyun			pins = "gpio37";
394*4882a593Smuzhiyun			function = "gpio";
395*4882a593Smuzhiyun		};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun		config {
398*4882a593Smuzhiyun			pins = "gpio37";
399*4882a593Smuzhiyun			drive-strength = <2>;
400*4882a593Smuzhiyun			bias-disable;
401*4882a593Smuzhiyun		};
402*4882a593Smuzhiyun	};
403*4882a593Smuzhiyun
404*4882a593Smuzhiyun	pcie1_clkreq_default: pcie1_clkreq_default {
405*4882a593Smuzhiyun		mux {
406*4882a593Smuzhiyun			pins = "gpio131";
407*4882a593Smuzhiyun			function = "pci_e1";
408*4882a593Smuzhiyun		};
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun		config {
411*4882a593Smuzhiyun			pins = "gpio131";
412*4882a593Smuzhiyun			drive-strength = <2>;
413*4882a593Smuzhiyun			bias-pull-up;
414*4882a593Smuzhiyun		};
415*4882a593Smuzhiyun	};
416*4882a593Smuzhiyun
417*4882a593Smuzhiyun	pcie1_perst_default: pcie1_perst_default {
418*4882a593Smuzhiyun		mux {
419*4882a593Smuzhiyun			pins = "gpio130";
420*4882a593Smuzhiyun			function = "gpio";
421*4882a593Smuzhiyun		};
422*4882a593Smuzhiyun
423*4882a593Smuzhiyun		config {
424*4882a593Smuzhiyun			pins = "gpio130";
425*4882a593Smuzhiyun			drive-strength = <2>;
426*4882a593Smuzhiyun			bias-pull-down;
427*4882a593Smuzhiyun		};
428*4882a593Smuzhiyun	};
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun	pcie1_wake_default: pcie1_wake_default {
431*4882a593Smuzhiyun		mux {
432*4882a593Smuzhiyun			pins = "gpio132";
433*4882a593Smuzhiyun			function = "gpio";
434*4882a593Smuzhiyun		};
435*4882a593Smuzhiyun
436*4882a593Smuzhiyun		config {
437*4882a593Smuzhiyun			pins = "gpio132";
438*4882a593Smuzhiyun			drive-strength = <2>;
439*4882a593Smuzhiyun			bias-pull-down;
440*4882a593Smuzhiyun		};
441*4882a593Smuzhiyun	};
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun	pcie1_clkreq_sleep: pcie1_clkreq_sleep {
444*4882a593Smuzhiyun		mux {
445*4882a593Smuzhiyun			pins = "gpio131";
446*4882a593Smuzhiyun			function = "gpio";
447*4882a593Smuzhiyun		};
448*4882a593Smuzhiyun
449*4882a593Smuzhiyun		config {
450*4882a593Smuzhiyun			pins = "gpio131";
451*4882a593Smuzhiyun			drive-strength = <2>;
452*4882a593Smuzhiyun			bias-disable;
453*4882a593Smuzhiyun		};
454*4882a593Smuzhiyun	};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun	pcie1_wake_sleep: pcie1_wake_sleep {
457*4882a593Smuzhiyun		mux {
458*4882a593Smuzhiyun			pins = "gpio132";
459*4882a593Smuzhiyun			function = "gpio";
460*4882a593Smuzhiyun		};
461*4882a593Smuzhiyun
462*4882a593Smuzhiyun		config {
463*4882a593Smuzhiyun			pins = "gpio132";
464*4882a593Smuzhiyun			drive-strength = <2>;
465*4882a593Smuzhiyun			bias-disable;
466*4882a593Smuzhiyun		};
467*4882a593Smuzhiyun	};
468*4882a593Smuzhiyun
469*4882a593Smuzhiyun	pcie2_clkreq_default: pcie2_clkreq_default {
470*4882a593Smuzhiyun		mux {
471*4882a593Smuzhiyun			pins = "gpio115";
472*4882a593Smuzhiyun			function = "pci_e2";
473*4882a593Smuzhiyun		};
474*4882a593Smuzhiyun
475*4882a593Smuzhiyun		config {
476*4882a593Smuzhiyun			pins = "gpio115";
477*4882a593Smuzhiyun			drive-strength = <2>;
478*4882a593Smuzhiyun			bias-pull-up;
479*4882a593Smuzhiyun		};
480*4882a593Smuzhiyun	};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun	pcie2_perst_default: pcie2_perst_default {
483*4882a593Smuzhiyun		mux {
484*4882a593Smuzhiyun			pins = "gpio114";
485*4882a593Smuzhiyun			function = "gpio";
486*4882a593Smuzhiyun		};
487*4882a593Smuzhiyun
488*4882a593Smuzhiyun		config {
489*4882a593Smuzhiyun			pins = "gpio114";
490*4882a593Smuzhiyun			drive-strength = <2>;
491*4882a593Smuzhiyun			bias-pull-down;
492*4882a593Smuzhiyun		};
493*4882a593Smuzhiyun	};
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun	pcie2_wake_default: pcie2_wake_default {
496*4882a593Smuzhiyun		mux {
497*4882a593Smuzhiyun			pins = "gpio116";
498*4882a593Smuzhiyun			function = "gpio";
499*4882a593Smuzhiyun		};
500*4882a593Smuzhiyun
501*4882a593Smuzhiyun		config {
502*4882a593Smuzhiyun			pins = "gpio116";
503*4882a593Smuzhiyun			drive-strength = <2>;
504*4882a593Smuzhiyun			bias-pull-down;
505*4882a593Smuzhiyun		};
506*4882a593Smuzhiyun	};
507*4882a593Smuzhiyun
508*4882a593Smuzhiyun	pcie2_clkreq_sleep: pcie2_clkreq_sleep {
509*4882a593Smuzhiyun		mux {
510*4882a593Smuzhiyun			pins = "gpio115";
511*4882a593Smuzhiyun			function = "gpio";
512*4882a593Smuzhiyun		};
513*4882a593Smuzhiyun
514*4882a593Smuzhiyun		config {
515*4882a593Smuzhiyun			pins = "gpio115";
516*4882a593Smuzhiyun			drive-strength = <2>;
517*4882a593Smuzhiyun			bias-disable;
518*4882a593Smuzhiyun		};
519*4882a593Smuzhiyun	};
520*4882a593Smuzhiyun
521*4882a593Smuzhiyun	pcie2_wake_sleep: pcie2_wake_sleep {
522*4882a593Smuzhiyun		mux {
523*4882a593Smuzhiyun			pins = "gpio116";
524*4882a593Smuzhiyun			function = "gpio";
525*4882a593Smuzhiyun		};
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun		config {
528*4882a593Smuzhiyun			pins = "gpio116";
529*4882a593Smuzhiyun			drive-strength = <2>;
530*4882a593Smuzhiyun			bias-disable;
531*4882a593Smuzhiyun		};
532*4882a593Smuzhiyun	};
533*4882a593Smuzhiyun
534*4882a593Smuzhiyun	cci0_default: cci0_default {
535*4882a593Smuzhiyun		pinmux {
536*4882a593Smuzhiyun			function = "cci_i2c";
537*4882a593Smuzhiyun			pins = "gpio17", "gpio18";
538*4882a593Smuzhiyun		};
539*4882a593Smuzhiyun		pinconf {
540*4882a593Smuzhiyun			pins = "gpio17", "gpio18";
541*4882a593Smuzhiyun			drive-strength = <16>;
542*4882a593Smuzhiyun			bias-disable;
543*4882a593Smuzhiyun		};
544*4882a593Smuzhiyun	};
545*4882a593Smuzhiyun
546*4882a593Smuzhiyun	cci1_default: cci1_default {
547*4882a593Smuzhiyun		pinmux {
548*4882a593Smuzhiyun			function = "cci_i2c";
549*4882a593Smuzhiyun			pins = "gpio19", "gpio20";
550*4882a593Smuzhiyun		};
551*4882a593Smuzhiyun		pinconf {
552*4882a593Smuzhiyun			pins = "gpio19", "gpio20";
553*4882a593Smuzhiyun			drive-strength = <16>;
554*4882a593Smuzhiyun			bias-disable;
555*4882a593Smuzhiyun		};
556*4882a593Smuzhiyun	};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun	camera_board_default: camera_board_default {
559*4882a593Smuzhiyun		mux_pwdn {
560*4882a593Smuzhiyun			function = "gpio";
561*4882a593Smuzhiyun			pins = "gpio98";
562*4882a593Smuzhiyun		};
563*4882a593Smuzhiyun		config_pwdn {
564*4882a593Smuzhiyun			pins = "gpio98";
565*4882a593Smuzhiyun			drive-strength = <16>;
566*4882a593Smuzhiyun			bias-disable;
567*4882a593Smuzhiyun		};
568*4882a593Smuzhiyun
569*4882a593Smuzhiyun		mux_rst {
570*4882a593Smuzhiyun			function = "gpio";
571*4882a593Smuzhiyun			pins = "gpio104";
572*4882a593Smuzhiyun		};
573*4882a593Smuzhiyun		config_rst {
574*4882a593Smuzhiyun			pins = "gpio104";
575*4882a593Smuzhiyun			drive-strength = <16>;
576*4882a593Smuzhiyun			bias-disable;
577*4882a593Smuzhiyun		};
578*4882a593Smuzhiyun
579*4882a593Smuzhiyun		mux_mclk1 {
580*4882a593Smuzhiyun			function = "cam_mclk";
581*4882a593Smuzhiyun			pins = "gpio14";
582*4882a593Smuzhiyun		};
583*4882a593Smuzhiyun		config_mclk1 {
584*4882a593Smuzhiyun			pins = "gpio14";
585*4882a593Smuzhiyun			drive-strength = <16>;
586*4882a593Smuzhiyun			bias-disable;
587*4882a593Smuzhiyun		};
588*4882a593Smuzhiyun	};
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun	camera_front_default: camera_front_default {
591*4882a593Smuzhiyun		mux_pwdn {
592*4882a593Smuzhiyun			function = "gpio";
593*4882a593Smuzhiyun			pins = "gpio133";
594*4882a593Smuzhiyun		};
595*4882a593Smuzhiyun		config_pwdn {
596*4882a593Smuzhiyun			pins = "gpio133";
597*4882a593Smuzhiyun			drive-strength = <16>;
598*4882a593Smuzhiyun			bias-disable;
599*4882a593Smuzhiyun		};
600*4882a593Smuzhiyun
601*4882a593Smuzhiyun		mux_rst {
602*4882a593Smuzhiyun			function = "gpio";
603*4882a593Smuzhiyun			pins = "gpio23";
604*4882a593Smuzhiyun		};
605*4882a593Smuzhiyun		config_rst {
606*4882a593Smuzhiyun			pins = "gpio23";
607*4882a593Smuzhiyun			drive-strength = <16>;
608*4882a593Smuzhiyun			bias-disable;
609*4882a593Smuzhiyun		};
610*4882a593Smuzhiyun
611*4882a593Smuzhiyun		mux_mclk2 {
612*4882a593Smuzhiyun			function = "cam_mclk";
613*4882a593Smuzhiyun			pins = "gpio15";
614*4882a593Smuzhiyun		};
615*4882a593Smuzhiyun		config_mclk2 {
616*4882a593Smuzhiyun			pins = "gpio15";
617*4882a593Smuzhiyun			drive-strength = <16>;
618*4882a593Smuzhiyun			bias-disable;
619*4882a593Smuzhiyun		};
620*4882a593Smuzhiyun	};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun	camera_rear_default: camera_rear_default {
623*4882a593Smuzhiyun		mux_pwdn {
624*4882a593Smuzhiyun			function = "gpio";
625*4882a593Smuzhiyun			pins = "gpio26";
626*4882a593Smuzhiyun		};
627*4882a593Smuzhiyun		config_pwdn {
628*4882a593Smuzhiyun			pins = "gpio26";
629*4882a593Smuzhiyun			drive-strength = <16>;
630*4882a593Smuzhiyun			bias-disable;
631*4882a593Smuzhiyun		};
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun		mux_rst {
634*4882a593Smuzhiyun			function = "gpio";
635*4882a593Smuzhiyun			pins = "gpio25";
636*4882a593Smuzhiyun		};
637*4882a593Smuzhiyun		config_rst {
638*4882a593Smuzhiyun			pins = "gpio25";
639*4882a593Smuzhiyun			drive-strength = <16>;
640*4882a593Smuzhiyun			bias-disable;
641*4882a593Smuzhiyun		};
642*4882a593Smuzhiyun
643*4882a593Smuzhiyun		mux_mclk0 {
644*4882a593Smuzhiyun			function = "cam_mclk";
645*4882a593Smuzhiyun			pins = "gpio13";
646*4882a593Smuzhiyun		};
647*4882a593Smuzhiyun		config_mclk0 {
648*4882a593Smuzhiyun			pins = "gpio13";
649*4882a593Smuzhiyun			drive-strength = <16>;
650*4882a593Smuzhiyun			bias-disable;
651*4882a593Smuzhiyun		};
652*4882a593Smuzhiyun	};
653*4882a593Smuzhiyun};
654