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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/opp/
H A Dallwinner,sun50i-h6-operating-points.yaml67 opp-480000000 {
69 opp-hz = /bits/ 64 <480000000>;
H A Dqcom-nvmem-cpufreq.txt172 opp-480000000 {
173 opp-hz = /bits/ 64 <480000000>;
383 opp-480000000 {
384 opp-hz = /bits/ 64 <480000000>;
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/allwinner/
H A Dsun50i-h6-cpu-opp.dtsi11 opp@480000000 {
13 opp-hz = /bits/ 64 <480000000>;
/OK3568_Linux_fs/buildroot/board/friendlyarm/nanopi-r1/uboot/
H A Dnanopi_r1_defconfig13 CONFIG_SYS_CLK_FREQ=480000000
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/renesas/
H A Dr8a77961-ulcb.dts23 memory@480000000 {
H A Dr8a774b1-hihope-rzg2n-rev2.dts22 memory@480000000 {
H A Dr8a774b1-hihope-rzg2n.dts22 memory@480000000 {
H A Dr8a77961-salvator-xs.dts22 memory@480000000 {
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mmc/
H A Dsdhci-atmel.txt32 assigned-clock-rates = <480000000>;
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/i2c/
H A Dsony,imx214.txt49 link-frequencies = /bits/ 64 <480000000>;
/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dclock.c330 * freq kHz = | 480000000 Hz * -- | * --- * ------ in mxs_set_lcdclk()
333 * 480000000 Hz 18 in mxs_set_lcdclk()
/OK3568_Linux_fs/kernel/drivers/clk/mxs/
H A Dclk-imx28.c168 clks[pll0] = mxs_clk_pll("pll0", "ref_xtal", PLL0CTRL0, 17, 480000000); in mx28_clocks_init()
169 clks[pll1] = mxs_clk_pll("pll1", "ref_xtal", PLL1CTRL0, 17, 480000000); in mx28_clocks_init()
/OK3568_Linux_fs/u-boot/arch/arm/mach-at91/include/mach/
H A Dclk.h23 #define AT91_UTMI_PLL_CLK_FREQ 480000000
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dsun8i-a33.dtsi77 opp-480000000 {
78 opp-hz = /bits/ 64 <480000000>;
H A Dsun8i-a83t.dtsi207 opp-480000000 {
208 opp-hz = /bits/ 64 <480000000>;
260 opp-480000000 {
261 opp-hz = /bits/ 64 <480000000>;
/OK3568_Linux_fs/kernel/drivers/clk/tegra/
H A Dclk-tegra114.c457 { 12000000, 480000000, 960, 12, 2, 12 },
458 { 13000000, 480000000, 960, 13, 2, 12 },
459 { 16800000, 480000000, 400, 7, 2, 5 },
460 { 19200000, 480000000, 200, 4, 2, 3 },
461 { 26000000, 480000000, 960, 26, 2, 12 },
470 .vco_min = 480000000,
H A Dclk-tegra30.c276 { 12000000, 480000000, 960, 12, 2, 12 },
277 { 13000000, 480000000, 960, 13, 2, 12 },
278 { 16800000, 480000000, 400, 7, 2, 5 },
279 { 19200000, 480000000, 200, 4, 2, 3 },
280 { 26000000, 480000000, 960, 26, 2, 12 },
1250 { TEGRA30_CLK_PLL_U, TEGRA30_CLK_CLK_MAX, 480000000, 0 },
H A Dclk-tegra124.c720 { 12000000, 480000000, 960, 12, 2, 12 },
721 { 13000000, 480000000, 960, 13, 2, 12 },
722 { 16800000, 480000000, 400, 7, 2, 5 },
723 { 19200000, 480000000, 200, 4, 2, 3 },
724 { 26000000, 480000000, 960, 26, 2, 12 },
733 .vco_min = 480000000,
H A Dclk-tegra20.c213 { 12000000, 480000000, 960, 12, 1, 0 },
214 { 13000000, 480000000, 960, 13, 1, 0 },
215 { 19200000, 480000000, 200, 4, 1, 0 },
216 { 26000000, 480000000, 960, 26, 1, 0 },
/OK3568_Linux_fs/kernel/drivers/phy/
H A Dphy-lpc18xx-usb-otg.c33 ret = clk_set_rate(lpc->clk, 480000000); in lpc18xx_usb_otg_phy_init()
/OK3568_Linux_fs/kernel/arch/arm64/boot/dts/rockchip/
H A Drk3358.dtsi84 /delete-node/ opp-480000000;
/OK3568_Linux_fs/kernel/drivers/clk/imx/
H A Dclk-pfdv2.c105 480000000, in clk_pfdv2_determine_rate()
/OK3568_Linux_fs/kernel/drivers/clk/at91/
H A Dclk-utmi.c20 #define UTMI_RATE 480000000
/OK3568_Linux_fs/kernel/arch/mips/ralink/
H A Drt3883.c85 cpu_rate = 480000000; in ralink_clk_init()
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dimx7ulp.dtsi111 clock-frequency = <480000000>;
118 clock-frequency = <480000000>;

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