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Searched refs:VPU_REG_CPU_CONFIG (Results 1 – 25 of 26) sorted by relevance

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/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mainz/vpu_v3/
H A DhalVPU_EX.c2509 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2511 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2536 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2664 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2666 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/mooney/vpu_v3/
H A DhalVPU_EX.c2576 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2578 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2604 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2830 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2832 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/manhattan/vpu_v3/
H A DhalVPU_EX.c2540 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2542 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2564 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2792 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2794 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/messi/vpu_v3/
H A DhalVPU_EX.c2510 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2512 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2537 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2665 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2667 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7621/vpu_v3/
H A DhalVPU_EX.c2630 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2632 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2658 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2884 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2886 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/M7821/vpu_v3/
H A DhalVPU_EX.c2648 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2650 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2676 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
2902 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2904 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6/vpu_v3/
H A DhalVPU_EX.c2791 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2793 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2819 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
3046 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
3048 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maxim/vpu_v3/
H A DhalVPU_EX.c2796 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2798 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2824 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
3050 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
3052 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/k6lite/vpu_v3/
H A DhalVPU_EX.c2800 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2802 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2828 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
3057 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
3059 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/curry/vpu_v3/
H A DhalVPU_EX.c2787 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2789 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2815 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
3042 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
3044 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/maserati/vpu_v3/
H A DhalVPU_EX.c2815 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2817 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2843 } while ((_VPU_Read2Byte(VPU_REG_CPU_CONFIG) & VPU_REG_CPU_STALL_EN) == 0); in HAL_VPU_EX_SwRst()
3069 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
3071 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h309 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_v3/hal/macan/vpu_v3/
H A DhalVPU_EX.c2494 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRst()
2496 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRst()
2597 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG); in HAL_VPU_EX_SwRstRelse()
2599 _VPU_Write2Byte(VPU_REG_CPU_CONFIG, tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h301 #define VPU_REG_CPU_CONFIG (REG_VPU_BASE+(0x006b<<1)) macro
/utopia/UTPA2-700.0.x/modules/vdec_lite/hal/kano/vpu_lite/
H A DhalVPU_EX.c2933 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG(u8VPU)); in HAL_VPU_EX_SwRst()
2935 _VPU_Write2Byte(VPU_REG_CPU_CONFIG(u8VPU), tempreg); in HAL_VPU_EX_SwRst()
3040 tempreg = _VPU_Read2Byte(VPU_REG_CPU_CONFIG(u8VPU)); in HAL_VPU_EX_SwRstRelse()
3042 _VPU_Write2Byte(VPU_REG_CPU_CONFIG(u8VPU), tempreg); in HAL_VPU_EX_SwRstRelse()
H A DregVPU_EX.h310 #define VPU_REG_CPU_CONFIG(vpu) (VPU_BASE(vpu)+(0x006b<<1)) macro

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