| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 464 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | regTSP.h | 465 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 467 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 458 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 480 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 482 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 482 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 489 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 489 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040UL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 370 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| H A D | halTSP.c | 3691 REG32_SET(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
3705 REG32_CLR(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 405 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| H A D | halTSP.c | 4796 REG32_SET(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
4816 REG32_CLR(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 407 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 439 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 437 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 437 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 441 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| H A D | halTSP.c | 5306 REG32_SET(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
5326 REG32_CLR(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | regTSP.h | 437 #define TSP_PVR2_STR2MIU_PAUSE 0x00000040 macro
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| H A D | halTSP.c | 4969 REG32_SET(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
4989 REG32_CLR(&(_RegCtrl->PVR2_Config), TSP_PVR2_STR2MIU_PAUSE); in HAL_PVR_Pause()
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