| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 758 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | regTSP.h | 776 …#define TSP_PVR1_PINGPONG 0x00010000 // Set 1 to enable MIU address… macro
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| H A D | halTSP.c | 1500 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 780 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| H A D | halTSP.c | 1549 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 770 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| H A D | halTSP.c | 1529 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 802 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| H A D | halTSP.c | 1496 SET_FLAG1(_HAL_REG32_R(&_TspCtrl[0].reg15b4), TSP_PVR1_PINGPONG)); in HAL_TSP_PVR_SetBuffer()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 806 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 806 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 813 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 813 …#define TSP_PVR1_PINGPONG 0x00010000UL // Set 1 to enable MIU addre… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 663 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| H A D | halTSP.c | 3595 REG16_SET(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Init()
3615 REG16_CLR(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Exit()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 699 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| H A D | halTSP.c | 4635 REG16_SET(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Init()
4665 REG16_CLR(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Exit()
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 701 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 739 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 731 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 731 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 741 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| H A D | halTSP.c | 5146 REG16_SET(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Init()
5176 REG16_CLR(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Exit()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | regTSP.h | 731 …#define TSP_PVR1_PINGPONG 0x0001 // Set 1 to enable MIU address… macro
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| H A D | halTSP.c | 4821 REG16_SET(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Init()
4851 REG16_CLR(&(_RegCtrl->reg15b8), TSP_PVR1_PINGPONG); in HAL_PVR_Exit()
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