| /utopia/UTPA2-700.0.x/modules/dmx/hal/k7u/tsp/ |
| H A D | regTSP.h | 1026 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 4732 … REG32_W(&_RegCtrl->ORZ_DMAW_UBND,(MS_U32)((phyMiuOffsetUB >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK)); in HAL_TSP_OR_Address_Protect()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maldives/tsp/ |
| H A D | regTSP.h | 1059 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffff macro
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| H A D | halTSP.c | 2882 ubnd = (u32EndAddr >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK; in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/manhattan/tsp/ |
| H A D | regTSP.h | 1063 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 3151 ubnd = (MS_U32)(((phyEndAddr-phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK); in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/macan/tsp/ |
| H A D | regTSP.h | 1054 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 3125 ubnd = (MS_U32)(((phyEndAddr-phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK); in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/mustang/tsp/ |
| H A D | regTSP.h | 1090 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 3117 ubnd = (MS_U32)(((phyEndAddr-phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK); in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7621/tsp/ |
| H A D | regTSP.h | 1094 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 3320 ubnd = (MS_U32)(((phyEndAddr-phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK); in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maxim/tsp/ |
| H A D | regTSP.h | 1094 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 3337 ubnd = (MS_U32)(((phyEndAddr-phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK); in HAL_TSP_OrzWriteProtect_Enable()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/maserati/tsp/ |
| H A D | regTSP.h | 1109 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/M7821/tsp/ |
| H A D | regTSP.h | 1109 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/curry/tsp/ |
| H A D | regTSP.h | 953 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| H A D | halTSP.c | 5184 …_RegCtrl->ORZ_DMAW_UBND,(MS_U32)(((u32AddrH - phyMiuOffset) >> MIU_BUS) & TSP_ORZ_DMAW_UBND_MASK)); in HAL_TSP_OR_Address_Protect()
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/kano/tsp/ |
| H A D | regTSP.h | 989 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/kano/nsk2/ |
| H A D | regTSP.h | 991 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6/nsk2/ |
| H A D | regTSP.h | 1029 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k6lite/nsk2/ |
| H A D | regTSP.h | 1003 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dscmb/hal/k7u/nsk2/ |
| H A D | regTSP.h | 1003 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6/tsp/ |
| H A D | regTSP.h | 1031 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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| /utopia/UTPA2-700.0.x/modules/dmx/hal/k6lite/tsp/ |
| H A D | regTSP.h | 1003 #define TSP_ORZ_DMAW_UBND_MASK 0xffffffffUL macro
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