| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maserati/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/curry/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maxim/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 234 MS_U8 INTERN_DVBC_DSPREG[] = 242 MS_U8 INTERN_DVBC_DSPREG[] = variable 302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 314 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 320 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 324 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7621/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 234 MS_U8 INTERN_DVBC_DSPREG[] = 242 MS_U8 INTERN_DVBC_DSPREG[] = variable 302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 314 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 320 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 324 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/M7821/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/kano/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/macan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 232 MS_U8 INTERN_DVBC_DSPREG[] = 240 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/manhattan/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 301 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 304 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 323 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/messi/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 233 MS_U8 INTERN_DVBC_DSPREG[] = 241 MS_U8 INTERN_DVBC_DSPREG[] = variable 302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 314 ULOGD("Utopia","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 319 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 320 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 324 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mainz/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 238 MS_U8 INTERN_DVBC_DSPREG[] = 246 MS_U8 INTERN_DVBC_DSPREG[] = variable 307 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 310 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 318 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 319 ULOGD("Utopia","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 324 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 325 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 329 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mustang/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 231 MS_U8 INTERN_DVBC_DSPREG[] = 239 MS_U8 INTERN_DVBC_DSPREG[] = variable 300 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 303 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 306 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 311 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 312 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 317 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 318 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 322 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/mooney/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 236 MS_U8 INTERN_DVBC_DSPREG[] = 244 MS_U8 INTERN_DVBC_DSPREG[] = variable 305 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 311 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 316 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 317 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 322 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 323 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 327 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/maldives/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 230 MS_U8 INTERN_DVBC_DSPREG[] = variable 291 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 294 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 297 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 302 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 303 printf("%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 308 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 309 status &= MDrv_SYS_DMD_VD_MBX_WriteDSPReg(idx, INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 313 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 316 if (u8RegRead != INTERN_DVBC_DSPREG[idx]) in INTERN_DVBC_DSPReg_Init() [all …]
|
| /utopia/UTPA2-700.0.x/modules/demodulator/hal/k6lite/demod/ |
| H A D | halDMD_INTERN_DVBC.c | 262 MS_U8 INTERN_DVBC_DSPREG[] = 421 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 424 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 427 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 432 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 433 ULOGD("DEMOD","%x ", INTERN_DVBC_DSPREG[idx]); in INTERN_DVBC_DSPReg_Init() 456 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() 459 if (u8RegRead != INTERN_DVBC_DSPREG[idx]) in INTERN_DVBC_DSPReg_Init() 461 …N_DVBC_DSPReg_Init, idx=%d, drv_val=0x%x, firmware_val=0x%x\n",idx,INTERN_DVBC_DSPREG[idx],u8RegRe… in INTERN_DVBC_DSPReg_Init() 496 for (idx = 0; idx<sizeof(INTERN_DVBC_DSPREG); idx++) in INTERN_DVBC_DSPReg_Init() [all …]
|