| /rockchip-linux_mpp/mpp/hal/rkdec/h264d/ |
| H A D | hal_h264d_rkv_reg.c | 58 H264dRkvBuf_t reg_buf[3]; member 559 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in rkv_h264d_init() 561 reg_ctx->reg_buf[i].regs = mpp_calloc(H264dRkvRegs_t, 1); in rkv_h264d_init() 563 ®_ctx->reg_buf[i].spspps, RKV_SPSPPS_SIZE)); in rkv_h264d_init() 565 ®_ctx->reg_buf[i].rps, RKV_RPS_SIZE)); in rkv_h264d_init() 567 ®_ctx->reg_buf[i].sclst, RKV_SCALING_LIST_SIZE)); in rkv_h264d_init() 571 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in rkv_h264d_init() 572 reg_ctx->spspps_buf = reg_ctx->reg_buf[0].spspps; in rkv_h264d_init() 573 reg_ctx->rps_buf = reg_ctx->reg_buf[0].rps; in rkv_h264d_init() 574 reg_ctx->sclst_buf = reg_ctx->reg_buf[0].sclst; in rkv_h264d_init() [all …]
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| H A D | hal_h264d_vdpu1.c | 757 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu1_h264d_init() 761 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, ®_ctx->reg_buf[i].buf, buf_size)); in vdpu1_h264d_init() 762 reg_ctx->reg_buf[i].cabac_ptr = mpp_buffer_get_ptr(reg_ctx->reg_buf[i].buf); in vdpu1_h264d_init() 763 reg_ctx->reg_buf[i].poc_ptr = reg_ctx->reg_buf[i].cabac_ptr + VDPU_CABAC_TAB_SIZE; in vdpu1_h264d_init() 764 reg_ctx->reg_buf[i].sclst_ptr = reg_ctx->reg_buf[i].poc_ptr + VDPU_POC_BUF_SIZE; in vdpu1_h264d_init() 765 reg_ctx->reg_buf[i].regs = mpp_calloc_size(void, sizeof(H264dVdpu1Regs_t)); in vdpu1_h264d_init() 767 … memcpy(reg_ctx->reg_buf[i].cabac_ptr, (void *)vdpu_cabac_table, sizeof(vdpu_cabac_table)); in vdpu1_h264d_init() 771 reg_ctx->buf = reg_ctx->reg_buf[0].buf; in vdpu1_h264d_init() 772 reg_ctx->cabac_ptr = reg_ctx->reg_buf[0].cabac_ptr; in vdpu1_h264d_init() 773 reg_ctx->poc_ptr = reg_ctx->reg_buf[0].poc_ptr; in vdpu1_h264d_init() [all …]
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| H A D | hal_h264d_vdpu2.c | 814 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu2_h264d_init() 818 FUN_CHECK(ret = mpp_buffer_get(p_hal->buf_group, ®_ctx->reg_buf[i].buf, buf_size)); in vdpu2_h264d_init() 819 reg_ctx->reg_buf[i].cabac_ptr = mpp_buffer_get_ptr(reg_ctx->reg_buf[i].buf); in vdpu2_h264d_init() 820 reg_ctx->reg_buf[i].poc_ptr = reg_ctx->reg_buf[i].cabac_ptr + VDPU_CABAC_TAB_SIZE; in vdpu2_h264d_init() 821 reg_ctx->reg_buf[i].sclst_ptr = reg_ctx->reg_buf[i].poc_ptr + VDPU_POC_BUF_SIZE; in vdpu2_h264d_init() 822 reg_ctx->reg_buf[i].regs = mpp_calloc_size(void, sizeof(H264dVdpuRegs_t)); in vdpu2_h264d_init() 824 … memcpy(reg_ctx->reg_buf[i].cabac_ptr, (void *)vdpu_cabac_table, sizeof(vdpu_cabac_table)); in vdpu2_h264d_init() 829 reg_ctx->buf = reg_ctx->reg_buf[0].buf; in vdpu2_h264d_init() 830 reg_ctx->cabac_ptr = reg_ctx->reg_buf[0].cabac_ptr; in vdpu2_h264d_init() 831 reg_ctx->poc_ptr = reg_ctx->reg_buf[0].poc_ptr; in vdpu2_h264d_init() [all …]
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| H A D | hal_h264d_vdpu382.c | 150 H264dRkvBuf_t reg_buf[VDPU382_FAST_REG_SET_CNT]; member 749 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu382H264dRegSet, 1); in vdpu382_h264d_init() 750 init_common_regs(reg_ctx->reg_buf[i].regs); in vdpu382_h264d_init() 757 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu382_h264d_init() 798 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu382_h264d_deinit() 803 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu382_h264d_deinit() 900 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update() 968 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu382_h264d_gen_regs() 969 if (!ctx->reg_buf[i].valid) { in vdpu382_h264d_gen_regs() 971 regs = ctx->reg_buf[i].regs; in vdpu382_h264d_gen_regs() [all …]
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| H A D | hal_h264d_vdpu34x.c | 146 H264dRkvBuf_t reg_buf[VDPU34X_FAST_REG_SET_CNT]; member 728 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu34xH264dRegSet, 1); in vdpu34x_h264d_init() 729 init_common_regs(reg_ctx->reg_buf[i].regs); in vdpu34x_h264d_init() 736 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu34x_h264d_init() 769 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu34x_h264d_deinit() 774 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu34x_h264d_deinit() 862 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update() 939 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu34x_h264d_gen_regs() 940 if (!ctx->reg_buf[i].valid) { in vdpu34x_h264d_gen_regs() 942 regs = ctx->reg_buf[i].regs; in vdpu34x_h264d_gen_regs() [all …]
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| H A D | hal_h264d_vdpu384a.c | 81 H264dRkvBuf_t reg_buf[VDPU384A_FAST_REG_SET_CNT]; member 607 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu384aH264dRegSet, 1); in vdpu384a_h264d_init() 608 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in vdpu384a_h264d_init() 616 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu384a_h264d_init() 644 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu384a_h264d_deinit() 652 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu384a_h264d_deinit() 741 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update() 812 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu384a_h264d_gen_regs() 813 if (!ctx->reg_buf[i].valid) { in vdpu384a_h264d_gen_regs() 815 regs = ctx->reg_buf[i].regs; in vdpu384a_h264d_gen_regs() [all …]
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| H A D | hal_h264d_vdpu383.c | 93 H264dRkvBuf_t reg_buf[VDPU383_FAST_REG_SET_CNT]; member 650 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu383H264dRegSet, 1); in vdpu383_h264d_init() 651 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in vdpu383_h264d_init() 660 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu383_h264d_init() 693 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu383_h264d_deinit() 701 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu383_h264d_deinit() 790 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update() 860 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu383_h264d_gen_regs() 861 if (!ctx->reg_buf[i].valid) { in vdpu383_h264d_gen_regs() 863 regs = ctx->reg_buf[i].regs; in vdpu383_h264d_gen_regs() [all …]
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| H A D | hal_h264d_vdpu_com.h | 92 H264dVdpuBuf_t reg_buf[3]; member
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| /rockchip-linux_mpp/mpp/hal/rkdec/avs2d/ |
| H A D | hal_avs2d_vdpu383.c | 52 Avs2dRkvBuf_t reg_buf[VDPU383_FAST_REG_SET_CNT]; member 328 RK_S32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rcb_info_update() 509 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu383_deinit() 516 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_deinit() 551 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu383_init() 558 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu383Avs2dRegSet, 1); in hal_avs2d_vdpu383_init() 559 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_init() 560 reg_ctx->reg_buf[i].offset_shph = AVS2_SHPH_OFFSET(i); in hal_avs2d_vdpu383_init() 561 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_vdpu383_init() 565 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_avs2d_vdpu383_init() [all …]
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| H A D | hal_avs2d_rkv.c | 60 Avs2dRkvBuf_t reg_buf[VDPU34X_FAST_REG_SET_CNT]; member 304 RK_S32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rcb_info_update() 486 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rkv_deinit() 493 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_avs2d_rkv_deinit() 528 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rkv_init() 534 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu34xAvs2dRegSet, 1); in hal_avs2d_rkv_init() 535 init_common_regs(reg_ctx->reg_buf[i].regs); in hal_avs2d_rkv_init() 536 reg_ctx->reg_buf[i].offset_shph = AVS2_SHPH_OFFSET(i); in hal_avs2d_rkv_init() 537 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_rkv_init() 541 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_avs2d_rkv_init() [all …]
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| H A D | hal_avs2d_vdpu382.c | 60 Avs2dVdpu382Buf_t reg_buf[VDPU382_FAST_REG_SET_CNT]; member 362 RK_S32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rcb_info_update() 552 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu382_deinit() 559 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu382_deinit() 594 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu382_init() 600 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu382Avs2dRegSet, 1); in hal_avs2d_vdpu382_init() 601 init_common_regs(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu382_init() 602 reg_ctx->reg_buf[i].offset_shph = AVS2_SHPH_OFFSET(i); in hal_avs2d_vdpu382_init() 603 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_vdpu382_init() 607 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_avs2d_vdpu382_init() [all …]
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| /rockchip-linux_mpp/mpp/hal/rkdec/av1d/ |
| H A D | hal_av1d_vdpu383.c | 152 av1dVdpu383Buf reg_buf[VDPU_FAST_REG_SET_CNT]; member 1314 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu383Av1dRegSet, 1); in hal_av1d_alloc_res() 1315 memset(reg_ctx->reg_buf[i].regs, 0, sizeof(Vdpu383Av1dRegSet)); in hal_av1d_alloc_res() 1320 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_av1d_alloc_res() 1346 RK_U32 max_cnt = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_av1d_release_res() 1349 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_av1d_release_res() 2204 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu383_av1d_gen_regs() 2205 if (!ctx->reg_buf[i].valid) { in vdpu383_av1d_gen_regs() 2207 ctx->regs = ctx->reg_buf[i].regs; in vdpu383_av1d_gen_regs() 2208 ctx->reg_buf[i].valid = 1; in vdpu383_av1d_gen_regs() [all …]
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| /rockchip-linux_mpp/mpp/hal/vpu/av1d/ |
| H A D | hal_av1d_vdpu.c | 70 av1dVdpuBuf reg_buf[VDPU_FAST_REG_SET_CNT]; member 144 reg_ctx->reg_buf[i].regs = mpp_calloc(VdpuAv1dRegSet, 1); in hal_av1d_alloc_res() 145 memset(reg_ctx->reg_buf[i].regs, 0, sizeof(VdpuAv1dRegSet)); in hal_av1d_alloc_res() 149 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_av1d_alloc_res() 237 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_av1d_release_res() 240 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_av1d_release_res() 1884 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu_av1d_gen_regs() 1885 if (!ctx->reg_buf[i].valid) { in vdpu_av1d_gen_regs() 1887 ctx->regs = ctx->reg_buf[i].regs; in vdpu_av1d_gen_regs() 1888 ctx->reg_buf[i].valid = 1; in vdpu_av1d_gen_regs() [all …]
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