Lines Matching refs:reg_buf
146 H264dRkvBuf_t reg_buf[VDPU34X_FAST_REG_SET_CNT]; member
728 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu34xH264dRegSet, 1); in vdpu34x_h264d_init()
729 init_common_regs(reg_ctx->reg_buf[i].regs); in vdpu34x_h264d_init()
736 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu34x_h264d_init()
769 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu34x_h264d_deinit()
774 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu34x_h264d_deinit()
862 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update()
939 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu34x_h264d_gen_regs()
940 if (!ctx->reg_buf[i].valid) { in vdpu34x_h264d_gen_regs()
942 regs = ctx->reg_buf[i].regs; in vdpu34x_h264d_gen_regs()
947 ctx->reg_buf[i].valid = 1; in vdpu34x_h264d_gen_regs()
1017 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu34x_h264d_start()
1119 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu34x_h264d_wait()
1152 reg_ctx->reg_buf[task->dec.reg_index].valid = 0; in vdpu34x_h264d_wait()