Lines Matching refs:reg_buf
81 H264dRkvBuf_t reg_buf[VDPU384A_FAST_REG_SET_CNT]; member
607 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu384aH264dRegSet, 1); in vdpu384a_h264d_init()
608 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in vdpu384a_h264d_init()
616 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in vdpu384a_h264d_init()
644 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in vdpu384a_h264d_deinit()
652 MPP_FREE(reg_ctx->reg_buf[i].regs); in vdpu384a_h264d_deinit()
741 RK_U32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(ctx->reg_buf) : 1; in hal_h264d_rcb_info_update()
812 for (i = 0; i < MPP_ARRAY_ELEMS(ctx->reg_buf); i++) { in vdpu384a_h264d_gen_regs()
813 if (!ctx->reg_buf[i].valid) { in vdpu384a_h264d_gen_regs()
815 regs = ctx->reg_buf[i].regs; in vdpu384a_h264d_gen_regs()
819 ctx->reg_buf[i].valid = 1; in vdpu384a_h264d_gen_regs()
880 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu384a_h264d_start()
956 reg_ctx->reg_buf[task->dec.reg_index].regs : in vdpu384a_h264d_wait()
990 reg_ctx->reg_buf[task->dec.reg_index].valid = 0; in vdpu384a_h264d_wait()