Lines Matching refs:reg_buf

52     Avs2dRkvBuf_t           reg_buf[VDPU383_FAST_REG_SET_CNT];  member
328 RK_S32 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_rcb_info_update()
509 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu383_deinit()
516 MPP_FREE(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_deinit()
551 loop = p_hal->fast_mode ? MPP_ARRAY_ELEMS(reg_ctx->reg_buf) : 1; in hal_avs2d_vdpu383_init()
558 reg_ctx->reg_buf[i].regs = mpp_calloc(Vdpu383Avs2dRegSet, 1); in hal_avs2d_vdpu383_init()
559 init_ctrl_regs(reg_ctx->reg_buf[i].regs); in hal_avs2d_vdpu383_init()
560 reg_ctx->reg_buf[i].offset_shph = AVS2_SHPH_OFFSET(i); in hal_avs2d_vdpu383_init()
561 reg_ctx->reg_buf[i].offset_sclst = AVS2_SCALIST_OFFSET(i); in hal_avs2d_vdpu383_init()
565 reg_ctx->regs = reg_ctx->reg_buf[0].regs; in hal_avs2d_vdpu383_init()
566 reg_ctx->shph_offset = reg_ctx->reg_buf[0].offset_shph; in hal_avs2d_vdpu383_init()
567 reg_ctx->sclst_offset = reg_ctx->reg_buf[0].offset_sclst; in hal_avs2d_vdpu383_init()
656 for (i = 0; i < MPP_ARRAY_ELEMS(reg_ctx->reg_buf); i++) { in hal_avs2d_vdpu383_gen_regs()
657 if (!reg_ctx->reg_buf[i].valid) { in hal_avs2d_vdpu383_gen_regs()
659 regs = reg_ctx->reg_buf[i].regs; in hal_avs2d_vdpu383_gen_regs()
660 reg_ctx->shph_offset = reg_ctx->reg_buf[i].offset_shph; in hal_avs2d_vdpu383_gen_regs()
661 reg_ctx->sclst_offset = reg_ctx->reg_buf[i].offset_sclst; in hal_avs2d_vdpu383_gen_regs()
662 reg_ctx->regs = reg_ctx->reg_buf[i].regs; in hal_avs2d_vdpu383_gen_regs()
663 reg_ctx->reg_buf[i].valid = 1; in hal_avs2d_vdpu383_gen_regs()
727 regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs; in hal_avs2d_vdpu383_start()
893 regs = p_hal->fast_mode ? reg_ctx->reg_buf[task->dec.reg_index].regs : reg_ctx->regs; in hal_avs2d_vdpu383_wait()
937 reg_ctx->reg_buf[task->dec.reg_index].valid = 0; in hal_avs2d_vdpu383_wait()