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Searched refs:gpr (Results 1 – 25 of 68) sorted by relevance

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/rk3399_rockchip-uboot/drivers/pci/
H A Dpcie_imx.c439 setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_PCIE_SW_RST); in imx6_pcie_assert_core_reset()
445 setbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_TEST_POWERDOWN); in imx6_pcie_assert_core_reset()
447 setbits_le32(&iomuxc_regs->gpr[5], IOMUXC_GPR5_PCIE_BTNRST); in imx6_pcie_assert_core_reset()
465 gpr1 = readl(&iomuxc_regs->gpr[1]); in imx6_pcie_assert_core_reset()
466 gpr12 = readl(&iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
478 writel(val, &iomuxc_regs->gpr[12]); in imx6_pcie_assert_core_reset()
481 setbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_TEST_POWERDOWN); in imx6_pcie_assert_core_reset()
482 clrbits_le32(&iomuxc_regs->gpr[1], IOMUXC_GPR1_REF_SSP_EN); in imx6_pcie_assert_core_reset()
492 clrbits_le32(&iomuxc_regs->gpr[12], IOMUXC_GPR12_APPS_LTSSM_ENABLE); in imx6_pcie_init_phy()
494 clrsetbits_le32(&iomuxc_regs->gpr[12], in imx6_pcie_init_phy()
[all …]
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc8xx/
H A Dtraps.c72 printf("%08lX ", regs->gpr[i]); in show_regs()
82 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
120 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
127 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
134 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
141 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc83xx/
H A Dtraps.c70 printf("%08lX ", regs->gpr[i]); in show_regs()
81 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
154 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
168 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
179 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
190 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc86xx/
H A Dtraps.c79 printf("%08lX ", regs->gpr[i]); in show_regs()
90 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
136 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
147 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
172 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
183 print_backtrace((unsigned long *)regs->gpr[1]); in SoftEmuException()
/rk3399_rockchip-uboot/arch/powerpc/cpu/mpc85xx/
H A Dtraps.c107 printf("%08lX ", regs->gpr[i]); in show_regs()
119 print_backtrace((unsigned long *)regs->gpr[1]); in _exception()
188 print_backtrace((unsigned long *)regs->gpr[1]); in MachineCheckException()
210 print_backtrace((unsigned long *)regs->gpr[1]); in AlignmentException()
233 print_backtrace((unsigned long *)regs->gpr[1]); in ProgramCheckException()
278 print_backtrace((unsigned long *)regs->gpr[1]); in ExtIntException()
/rk3399_rockchip-uboot/arch/microblaze/include/asm/
H A Dptrace.h68 microblaze_reg_t gpr[NUM_GPRS]; member
85 #define PT_REGS_SYSCALL(regs) (regs)->gpr[0]
86 #define PT_REGS_SET_SYSCALL(regs, val) ((regs)->gpr[0] = (val))
/rk3399_rockchip-uboot/arch/powerpc/lib/
H A Dkgdb.c102 kdp->regs[1].val = regs->gpr[SP_REGNUM]; in kgdb_enter()
162 *ptr++ = regs->gpr[i]; in kgdb_getregs()
202 regs->gpr[regno] = *ptr; in kgdb_putreg()
235 regs->gpr[i] = *ptr++; in kgdb_putregs()
/rk3399_rockchip-uboot/board/aristainetos/
H A Daristainetos-v2.c466 writel(reg, &iomux->gpr[2]); in enable_lvds()
468 reg = readl(&iomux->gpr[3]); in enable_lvds()
472 writel(reg, &iomux->gpr[3]); in enable_lvds()
558 writel(reg, &iomux->gpr[2]); in enable_spi_display()
560 reg = readl(&iomux->gpr[3]); in enable_spi_display()
564 writel(reg, &iomux->gpr[3]); in enable_spi_display()
591 &iomuxc_regs->gpr[1]); in set_gpr_register()
592 writel(0x0, &iomuxc_regs->gpr[8]); in set_gpr_register()
595 &iomuxc_regs->gpr[12]); in set_gpr_register()
H A Daristainetos-v1.c108 setbits_le32(&iomux->gpr[1], IOMUXC_GPR1_ENET_CLK_SEL_MASK); in setup_iomux_enet()
186 clrsetbits_le32(&iomuxc_regs->gpr[1], IOMUX_GPR1_FEC_MASK, 0); in board_eth_init()
/rk3399_rockchip-uboot/arch/arm/mach-imx/
H A Dcache.c61 val = readl(&iomux->gpr[11]); in v7_outer_cache_enable()
65 writel(val, &iomux->gpr[11]); in v7_outer_cache_enable()
H A Dsata.c25 clrsetbits_le32(&iomuxc_regs->gpr[13], in setup_sata()
H A Dcpu.c300 reg = readl(&iomuxc_regs->gpr[1]); in set_chipselect_size()
324 writel(reg, &iomuxc_regs->gpr[1]); in set_chipselect_size()
/rk3399_rockchip-uboot/arch/arm/dts/
H A Dimx53.dtsi44 gpr: iomuxc-gpr@53fa8000 { label
45 compatible = "fsl,imx53-iomuxc-gpr", "syscon";
H A Dimx6ull.dtsi339 dma-source = <&gpr 0 14 0 15>;
472 stop-mode = <&gpr 0x10 1 0x10 17>;
483 stop-mode = <&gpr 0x10 2 0x10 18>;
569 stop-mode = <&gpr 0x10 4>;
753 gpr: iomuxc-gpr@020e4000 { label
754 compatible = "fsl,imx6ul-iomuxc-gpr", "syscon";
760 gpr = <&gpr>;
878 stop-mode = <&gpr 0x10 3>;
1146 /* epdc-ram = <&gpr 0x4 30>; */
1155 snvs_gpr: snvs-gpr@0x02294000 {
[all …]
/rk3399_rockchip-uboot/board/boundary/nitrogen6x/
H A Dnitrogen6x.c482 u32 reg = readl(&iomux->gpr[2]); in enable_lvds()
484 writel(reg, &iomux->gpr[2]); in enable_lvds()
492 u32 reg = readl(&iomux->gpr[2]); in enable_lvds_jeida()
495 writel(reg, &iomux->gpr[2]); in enable_lvds_jeida()
794 writel(reg, &iomux->gpr[2]); in setup_display()
796 reg = readl(&iomux->gpr[3]); in setup_display()
801 writel(reg, &iomux->gpr[3]); in setup_display()
888 clrsetbits_le32(&iomuxc_regs->gpr[1], in board_init()
/rk3399_rockchip-uboot/arch/arm/cpu/arm926ejs/mx27/
H A Dgeneric.c236 writel(readl(&regs->port[port].gpr) | (1 << pin), in imx_gpio_mode()
237 &regs->port[port].gpr); in imx_gpio_mode()
239 writel(readl(&regs->port[port].gpr) & ~(1 << pin), in imx_gpio_mode()
240 &regs->port[port].gpr); in imx_gpio_mode()
/rk3399_rockchip-uboot/board/engicam/icorem6/
H A Dicorem6.c185 writel(reg, &iomux->gpr[2]); in setup_display()
187 reg = readl(&iomux->gpr[3]); in setup_display()
191 writel(reg, &iomux->gpr[3]); in setup_display()
/rk3399_rockchip-uboot/arch/arm/mach-imx/mx6/
H A Dsoc.c691 writel(0xF00000CF, &iomux->gpr[4]); in gpr_init()
694 writel(0x77177717, &iomux->gpr[6]); in gpr_init()
695 writel(0x77177717, &iomux->gpr[7]); in gpr_init()
698 writel(0x007F007F, &iomux->gpr[6]); in gpr_init()
699 writel(0x007F007F, &iomux->gpr[7]); in gpr_init()
/rk3399_rockchip-uboot/board/armadeus/apf27/
H A Dapf27.c63 u32 icr1, u32 icr2, u32 imr, u32 gpio_dir, u32 gpr, in apf27_port_init() argument
79 writel(gpr, &regs->port[port].gpr); in apf27_port_init()
/rk3399_rockchip-uboot/arch/arm/include/asm/arch-mx27/
H A Dgpio.h28 u32 gpr; member
/rk3399_rockchip-uboot/board/embest/mx6boards/
H A Dmx6boards.c381 setbits_le32(&iomux->gpr[2], in enable_lvds()
400 clrbits_le32(&iomux->gpr[2], in disable_lvds()
492 writel(reg, &iomux->gpr[2]); in setup_display()
494 clrsetbits_le32(&iomux->gpr[3], in setup_display()
/rk3399_rockchip-uboot/arch/arm/cpu/arm1136/mx31/
H A Dgeneric.c137 l = readl(&iomuxc->gpr); in mx31_set_gpr()
143 writel(l, &iomuxc->gpr); in mx31_set_gpr()
/rk3399_rockchip-uboot/arch/powerpc/include/asm/
H A Dptrace.h27 PPC_REG gpr[32]; member
/rk3399_rockchip-uboot/board/ge/bx50v3/
H A Dbx50v3.c468 &iomux->gpr[2]); in setup_display_b850v3()
470 clrbits_le32(&iomux->gpr[3], in setup_display_b850v3()
507 &iomux->gpr[2]); in setup_display_bx50v3()
509 clrsetbits_le32(&iomux->gpr[3], in setup_display_bx50v3()
/rk3399_rockchip-uboot/board/freescale/mx6sabresd/
H A Dmx6sabresd.c409 int reg = readl(&iomux->gpr[2]); in disable_lvds()
414 writel(reg, &iomux->gpr[2]); in disable_lvds()
531 writel(reg, &iomux->gpr[2]); in setup_display()
533 reg = readl(&iomux->gpr[3]); in setup_display()
538 writel(reg, &iomux->gpr[3]); in setup_display()

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