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/rk3399_rockchip-uboot/board/keymile/km_arm/
H A Dkwbimage_128M16_1.cfg20 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
21 # bit 7-4: 2, MPPSel1 SPI_SI (1=NF_IO[3])
22 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4])
23 # bit 15-12: 2, MPPSel3 SPI_SO (1=NF_IO[5])
24 # bit 19-16: 1, MPPSel4 NF_IO[6]
25 # bit 23-20: 1, MPPSel5 NF_IO[7]
26 # bit 27-24: 1, MPPSel6 SYSRST_O
27 # bit 31-28: 0, MPPSel7 GPO[7]
30 # bit 3-0: 0, MPPSel8 GPIO[8]
31 # bit 7-4: 0, MPPSel9 GPIO[9]
[all …]
H A Dkwbimage_256M8_1.cfg22 # bit 3-0: 2, MPPSel0 SPI_CSn (1=NF_IO[2])
23 # bit 7-4: 2, MPPSel1 SPI_MOSI (1=NF_IO[3])
24 # bit 12-8: 2, MPPSel2 SPI_SCK (1=NF_IO[4])
25 # bit 15-12: 2, MPPSel3 SPI_MISO (1=NF_IO[5])
26 # bit 19-16: 1, MPPSel4 NF_IO[6]
27 # bit 23-20: 1, MPPSel5 NF_IO[7]
28 # bit 27-24: 1, MPPSel6 SYSRST_O
29 # bit 31-28: 0, MPPSel7 GPO[7]
32 # bit 3-0: 0, MPPSel8 GPIO[8] CPU_SDA bitbanged
33 # bit 7-4: 0, MPPSel9 GPIO[9] CPU_SCL bitbanged
[all …]
/rk3399_rockchip-uboot/include/dt-bindings/mfd/
H A Dstm32f7-rcc.h33 #define STM32F7_AHB1_RESET(bit) (STM32F7_RCC_AHB1_##bit + (0x10 * 8)) argument
34 #define STM32F7_AHB1_CLOCK(bit) (STM32F7_RCC_AHB1_##bit) argument
44 #define STM32F7_AHB2_RESET(bit) (STM32F7_RCC_AHB2_##bit + (0x14 * 8)) argument
45 #define STM32F7_AHB2_CLOCK(bit) (STM32F7_RCC_AHB2_##bit + 0x20) argument
51 #define STM32F7_AHB3_RESET(bit) (STM32F7_RCC_AHB3_##bit + (0x18 * 8)) argument
52 #define STM32F7_AHB3_CLOCK(bit) (STM32F7_RCC_AHB3_##bit + 0x40) argument
85 #define STM32F7_APB1_RESET(bit) (STM32F7_RCC_APB1_##bit + (0x20 * 8)) argument
86 #define STM32F7_APB1_CLOCK(bit) (STM32F7_RCC_APB1_##bit + 0x80) argument
109 #define STM32F7_APB2_RESET(bit) (STM32F7_RCC_APB2_##bit + (0x24 * 8)) argument
110 #define STM32F7_APB2_CLOCK(bit) (STM32F7_RCC_APB2_##bit + 0xA0) argument
/rk3399_rockchip-uboot/drivers/pinctrl/rockchip/
H A Dpinctrl-rv1108.c19 .bit = 0,
25 .bit = 2,
31 .bit = 4,
37 .bit = 6,
43 .bit = 8,
49 .bit = 10,
55 .bit = 12,
61 .bit = 14,
67 .bit = 0,
73 .bit = 2,
[all …]
H A Dpinctrl-rk3328.c20 .bit = 0,
27 .bit = 14,
34 .bit = 2,
41 .bit = 4,
48 .bit = 6,
55 .bit = 8,
62 .bit = 10,
69 .bit = 12,
76 .bit = 14,
175 u8 bit; in rk3328_set_mux() local
[all …]
H A Dpinctrl-rv1103b.c20 u8 bit; in rv1103b_set_mux() local
32 bit = (pin % 4) * 4; in rv1103b_set_mux()
36 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rv1103b_set_mux()
37 data = (mask << (bit + 16)); in rv1103b_set_mux()
38 data |= (mux & mask) << bit; in rv1103b_set_mux()
58 int *reg, u8 *bit) in rv1103b_calc_drv_reg_and_bit() argument
92 *bit = 10; in rv1103b_calc_drv_reg_and_bit()
110 *bit = pin_num % RV1103B_DRV_PINS_PER_REG; in rv1103b_calc_drv_reg_and_bit()
111 *bit *= RV1103B_DRV_BITS_PER_PIN; in rv1103b_calc_drv_reg_and_bit()
122 u8 bit; in rv1103b_set_drive() local
[all …]
H A Dpinctrl-rk3308.c300 .bit = 12,
306 .bit = 0,
312 .bit = 4,
318 .bit = 8,
324 .bit = 12,
330 .bit = 0,
336 .bit = 4,
342 .bit = 8,
348 .bit = 8,
354 .bit = 12,
[all …]
H A Dpinctrl-rv1126b.c20 u8 bit; in rv1126b_set_mux() local
29 bit = (pin % 4) * 4; in rv1126b_set_mux()
33 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rv1126b_set_mux()
34 data = (mask << (bit + 16)); in rv1126b_set_mux()
35 data |= (mux & mask) << bit; in rv1126b_set_mux()
52 int *reg, u8 *bit) in rv1126b_calc_drv_reg_and_bit() argument
82 *bit = pin_num % RV1126B_DRV_PINS_PER_REG; in rv1126b_calc_drv_reg_and_bit()
83 *bit *= RV1126B_DRV_BITS_PER_PIN; in rv1126b_calc_drv_reg_and_bit()
94 u8 bit; in rv1126b_set_drive() local
97 ret = rv1126b_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rv1126b_set_drive()
[all …]
H A Dpinctrl-rk3528.c20 u8 bit; in rk3528_set_mux() local
29 bit = (pin % 4) * 4; in rk3528_set_mux()
32 data = (mask << (bit + 16)); in rk3528_set_mux()
33 data |= (mux & mask) << bit; in rk3528_set_mux()
52 int *reg, u8 *bit) in rk3528_calc_drv_reg_and_bit() argument
85 *bit = pin_num % RK3528_DRV_PINS_PER_REG; in rk3528_calc_drv_reg_and_bit()
86 *bit *= RK3528_DRV_BITS_PER_PIN; in rk3528_calc_drv_reg_and_bit()
95 u8 bit; in rk3528_set_drive() local
98 rk3528_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3528_set_drive()
101 data = ((1 << RK3528_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rk3528_set_drive()
[all …]
H A Dpinctrl-rk3562.c20 u8 bit; in rk3562_set_mux() local
29 bit = (pin % 4) * 4; in rk3562_set_mux()
32 data = (mask << (bit + 16)); in rk3562_set_mux()
33 data |= (mux & mask) << bit; in rk3562_set_mux()
63 int *reg, u8 *bit) in rk3562_calc_drv_reg_and_bit() argument
96 *bit = pin_num % RK3562_DRV_PINS_PER_REG; in rk3562_calc_drv_reg_and_bit()
97 *bit *= RK3562_DRV_BITS_PER_PIN; in rk3562_calc_drv_reg_and_bit()
106 u8 bit; in rk3562_set_drive() local
109 rk3562_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3562_set_drive()
112 data = ((1 << RK3562_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rk3562_set_drive()
[all …]
H A Dpinctrl-rk1808.c59 u8 bit; in rk1808_set_mux() local
77 bit = (pin % 4) * 4; in rk1808_set_mux()
80 bit = (pin % 8) * 2; in rk1808_set_mux()
85 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rk1808_set_mux()
87 data = (mask << (bit + 16)); in rk1808_set_mux()
88 data |= (mux & mask) << bit; in rk1808_set_mux()
103 int *reg, u8 *bit) in rk1808_calc_pull_reg_and_bit() argument
116 *bit = (pin_num % RK1808_PULL_PINS_PER_REG); in rk1808_calc_pull_reg_and_bit()
117 *bit *= RK1808_PULL_BITS_PER_PIN; in rk1808_calc_pull_reg_and_bit()
129 int *reg, u8 *bit) in rk1808_calc_drv_reg_and_bit() argument
[all …]
H A Dpinctrl-rk3506.c68 u8 bit; in rk3506_set_mux() local
90 bit = (pin % 4) * 4; in rk3506_set_mux()
94 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rk3506_set_mux()
95 data = (mask << (bit + 16)); in rk3506_set_mux()
96 data |= (mux & mask) << bit; in rk3506_set_mux()
116 int *reg, u8 *bit) in rk3506_calc_drv_reg_and_bit() argument
130 *bit = 3; in rk3506_calc_drv_reg_and_bit()
166 *bit = 10; in rk3506_calc_drv_reg_and_bit()
184 *bit = pin_num % RK3506_DRV_PINS_PER_REG; in rk3506_calc_drv_reg_and_bit()
185 *bit *= RK3506_DRV_BITS_PER_PIN; in rk3506_calc_drv_reg_and_bit()
[all …]
H A Dpinctrl-rk3588.c20 u8 bit; in rk3588_set_mux() local
29 bit = (pin % 4) * 4; in rk3588_set_mux()
38 data = (mask << (bit + 16)); in rk3588_set_mux()
39 data |= (mux & mask) << bit; in rk3588_set_mux()
43 data = (mask << (bit + 16)); in rk3588_set_mux()
50 data = (mask << (bit + 16)); in rk3588_set_mux()
51 data |= 8 << bit; in rk3588_set_mux()
55 data = (mask << (bit + 16)); in rk3588_set_mux()
56 data |= mux << bit; in rk3588_set_mux()
61 data = (mask << (bit + 16)); in rk3588_set_mux()
[all …]
H A Dpinctrl-rv1106.c20 u8 bit; in rv1106_set_mux() local
33 bit = (pin % 4) * 4; in rv1106_set_mux()
36 data = (mask << (bit + 16)); in rv1106_set_mux()
37 data |= (mux & mask) << bit; in rv1106_set_mux()
56 int *reg, u8 *bit) in rv1106_calc_drv_reg_and_bit() argument
95 *bit = pin_num % RV1106_DRV_PINS_PER_REG; in rv1106_calc_drv_reg_and_bit()
96 *bit *= RV1106_DRV_BITS_PER_PIN; in rv1106_calc_drv_reg_and_bit()
105 u8 bit; in rv1106_set_drive() local
108 rv1106_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rv1106_set_drive()
111 data = ((1 << RV1106_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rv1106_set_drive()
[all …]
H A Dpinctrl-rk3288.c37 u8 bit; in rk3288_set_mux() local
46 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3288_set_mux()
51 data &= ~(mask << bit); in rk3288_set_mux()
54 data = (mask << (bit + 16)); in rk3288_set_mux()
57 data |= (mux & mask) << bit; in rk3288_set_mux()
68 int *reg, u8 *bit) in rk3288_calc_pull_reg_and_bit() argument
87 *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG); in rk3288_calc_pull_reg_and_bit()
88 *bit *= ROCKCHIP_PULL_BITS_PER_PIN; in rk3288_calc_pull_reg_and_bit()
96 u8 bit, type; in rk3288_set_pull() local
102 rk3288_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3288_set_pull()
[all …]
H A Dpinctrl-rk3368.c20 u8 bit; in rk3368_set_mux() local
29 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3368_set_mux()
31 data = (mask << (bit + 16)); in rk3368_set_mux()
32 data |= (mux & mask) << bit; in rk3368_set_mux()
43 int *reg, u8 *bit) in rk3368_calc_pull_reg_and_bit() argument
62 *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG); in rk3368_calc_pull_reg_and_bit()
63 *bit *= ROCKCHIP_PULL_BITS_PER_PIN; in rk3368_calc_pull_reg_and_bit()
71 u8 bit, type; in rk3368_set_pull() local
77 rk3368_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3368_set_pull()
86 data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rk3368_set_pull()
[all …]
H A Dpinctrl-rk3576.c20 u8 bit; in rk3576_set_mux() local
29 bit = (pin % 4) * 4; in rk3576_set_mux()
32 data = (mask << (bit + 16)); in rk3576_set_mux()
33 data |= (mux & mask) << bit; in rk3576_set_mux()
58 int *reg, u8 *bit) in rk3576_calc_drv_reg_and_bit() argument
85 *bit = pin_num % RK3576_DRV_PINS_PER_REG; in rk3576_calc_drv_reg_and_bit()
86 *bit *= RK3576_DRV_BITS_PER_PIN; in rk3576_calc_drv_reg_and_bit()
95 u8 bit; in rk3576_set_drive() local
98 rk3576_calc_drv_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3576_set_drive()
101 data = ((1 << RK3576_DRV_BITS_PER_PIN) - 1) << (bit + 16); in rk3576_set_drive()
[all …]
H A Dpinctrl-rk3188.c20 u8 bit; in rk3188_set_mux() local
29 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3188_set_mux()
31 data = (mask << (bit + 16)); in rk3188_set_mux()
32 data |= (mux & mask) << bit; in rk3188_set_mux()
43 int *reg, u8 *bit) in rk3188_calc_pull_reg_and_bit() argument
53 *bit = pin_num % ROCKCHIP_PULL_PINS_PER_REG; in rk3188_calc_pull_reg_and_bit()
54 *bit *= ROCKCHIP_PULL_BITS_PER_PIN; in rk3188_calc_pull_reg_and_bit()
69 *bit = 7 - (pin_num % ROCKCHIP_PULL_PINS_PER_REG); in rk3188_calc_pull_reg_and_bit()
70 *bit *= ROCKCHIP_PULL_BITS_PER_PIN; in rk3188_calc_pull_reg_and_bit()
79 u8 bit, type; in rk3188_set_pull() local
[all …]
H A Dpinctrl-rk3128.c19 .bit = 0,
25 .bit = 4,
31 .bit = 8,
37 .bit = 12,
43 .bit = 12,
107 u8 bit; in rk3128_set_mux() local
116 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3128_set_mux()
119 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rk3128_set_mux()
121 data = (mask << (bit + 16)); in rk3128_set_mux()
122 data |= (mux & mask) << bit; in rk3128_set_mux()
[all …]
H A Dpinctrl-rk3399.c59 u8 bit; in rk3399_set_mux() local
68 reg += rockchip_get_mux_data(mux_type, pin, &bit, &mask); in rk3399_set_mux()
70 data = (mask << (bit + 16)); in rk3399_set_mux()
71 data |= (mux & mask) << bit; in rk3399_set_mux()
82 int *reg, u8 *bit) in rk3399_calc_pull_reg_and_bit() argument
103 *bit = (pin_num % ROCKCHIP_PULL_PINS_PER_REG); in rk3399_calc_pull_reg_and_bit()
104 *bit *= ROCKCHIP_PULL_BITS_PER_PIN; in rk3399_calc_pull_reg_and_bit()
112 u8 bit, type; in rk3399_set_pull() local
118 rk3399_calc_pull_reg_and_bit(bank, pin_num, &regmap, &reg, &bit); in rk3399_set_pull()
127 data = ((1 << ROCKCHIP_PULL_BITS_PER_PIN) - 1) << (bit + 16); in rk3399_set_pull()
[all …]
H A Dpinctrl-rv1126.c19 .bit = 0,
26 .bit = 4,
33 .bit = 8,
40 .bit = 12,
149 u8 bit; in rv1126_set_mux() local
167 bit = (pin % 4) * 4; in rv1126_set_mux()
170 bit = (pin % 8) * 2; in rv1126_set_mux()
175 rockchip_get_recalced_mux(bank, pin, &reg, &bit, &mask); in rv1126_set_mux()
177 data = (mask << (bit + 16)); in rv1126_set_mux()
178 data |= (mux & mask) << bit; in rv1126_set_mux()
[all …]
/rk3399_rockchip-uboot/arch/mips/
H A Dconfig.mk9 32bit-emul := elf32btsmip
10 64bit-emul := elf64btsmip
11 32bit-bfd := elf32-tradbigmips
12 64bit-bfd := elf64-tradbigmips
18 32bit-emul := elf32ltsmip
19 64bit-emul := elf64ltsmip
20 32bit-bfd := elf32-tradlittlemips
21 64bit-bfd := elf64-tradlittlemips
28 PLATFORM_LDFLAGS += -m $(32bit-emul)
29 OBJCOPYFLAGS += -O $(32bit-bfd)
[all …]
/rk3399_rockchip-uboot/drivers/irq/
H A Dirq-gpio-v2.c55 u32 bit, unsigned char flag) in gpio_bit_op() argument
59 offset = REG_PLUS4(offset, bit); in gpio_bit_op()
60 bit = BIT_SUB16(bit); in gpio_bit_op()
62 val = flag ? WMSK_SETBIT(bit) : WMSK_CLRBIT(bit); in gpio_bit_op()
66 static int gpio_bit_rd(void __iomem *regbase, unsigned int offset, u32 bit) in gpio_bit_rd() argument
68 offset = REG_PLUS4(offset, bit); in gpio_bit_rd()
69 bit = BIT_SUB16(bit); in gpio_bit_rd()
71 return readl(regbase + offset) & bit ? 1 : 0; in gpio_bit_rd()
74 static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit) in gpio_irq_unmask() argument
76 gpio_bit_op(regbase, GPIO_INTEN, bit, 1); in gpio_irq_unmask()
[all …]
H A Dirq-gpio.c52 u32 bit, unsigned char flag) in gpio_bit_op() argument
57 val |= bit; in gpio_bit_op()
59 val &= ~bit; in gpio_bit_op()
64 static int gpio_bit_rd(void __iomem *regbase, unsigned int offset, u32 bit) in gpio_bit_rd() argument
66 return readl(regbase + offset) & bit ? 1 : 0; in gpio_bit_rd()
69 static void gpio_irq_unmask(void __iomem *regbase, unsigned int bit) in gpio_irq_unmask() argument
71 gpio_bit_op(regbase, GPIO_INTEN, bit, 1); in gpio_irq_unmask()
74 static void gpio_irq_mask(void __iomem *regbase, unsigned int bit) in gpio_irq_mask() argument
76 gpio_bit_op(regbase, GPIO_INTEN, bit, 0); in gpio_irq_mask()
79 static void gpio_irq_ack(void __iomem *regbase, unsigned int bit) in gpio_irq_ack() argument
[all …]
/rk3399_rockchip-uboot/drivers/pinctrl/
H A Dpinctrl-rockchip.c335 u8 bit; member
380 int *reg, u8 *bit);
383 int *reg, u8 *bit);
386 int *reg, u8 *bit);
389 int *reg, u8 *bit);
425 .bit = 0,
431 .bit = 2,
437 .bit = 4,
443 .bit = 6,
449 .bit = 8,
[all …]

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