| #
976ec9cc |
| 10-Jan-2024 |
Joseph Chen <chenjh@rock-chips.com> |
irq: gpio-v2: Fix irq unmask
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I00241019a12bd00b24588ba935847f87a3e4d5e5
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| #
af1f96e9 |
| 01-Nov-2022 |
Joseph Chen <chenjh@rock-chips.com> |
irq: v2: Fix read error
There is not high/low register.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: Ic83d7508ab4dba87778773984c8ccbbd2215e380
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| #
5a157e97 |
| 12-May-2020 |
Joseph Chen <chenjh@rock-chips.com> |
Merge branch 'thunder-boot' into next-dev
|
| #
0fdee37b |
| 25-Mar-2020 |
Joseph Chen <chenjh@rock-chips.com> |
drivers: irq: add irq to gpio v2 transfer support
Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.
Signed-off-by: Joseph Chen <chenjh@roc
drivers: irq: add irq to gpio v2 transfer support
Some platform with new GPIO IP implements the low/high
registers with write mask. This configure handles it.
Signed-off-by: Joseph Chen <chenjh@rock-chips.com>
Change-Id: I855357d29e7fba072b867c06a31a049462ebf6ff
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