| /rk3399_rockchip-uboot/include/dt-bindings/clock/ |
| H A D | ast2500-scu.h | 12 #define ARMCLK 5 macro
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| H A D | rk3036-cru.h | 15 #define ARMCLK 4 macro
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| H A D | rk3188-cru-common.h | 18 #define ARMCLK 7 macro
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| H A D | rk3128-cru.h | 15 #define ARMCLK 5 macro
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| H A D | rk3228-cru.h | 15 #define ARMCLK 5 macro
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| H A D | rk3308-cru.h | 24 #define ARMCLK 5 macro
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| H A D | rv1108-cru.h | 14 #define ARMCLK 3 macro
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| H A D | px30-cru.h | 26 #define ARMCLK 7 macro
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| H A D | rk3328-cru.h | 16 #define ARMCLK 6 macro
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| H A D | rk3288-cru.h | 14 #define ARMCLK 6 macro
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| H A D | rk1808-cru.h | 13 #define ARMCLK 7 macro
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| H A D | rockchip,rk3506-cru.h | 16 #define ARMCLK 15 macro
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| H A D | rockchip,rv1103b-cru.h | 12 #define ARMCLK 2 macro
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| H A D | rv1106-cru.h | 15 #define ARMCLK 5 macro
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| H A D | rv1126-cru.h | 71 #define ARMCLK 5 macro
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| H A D | rk3562-cru.h | 21 #define ARMCLK 8 macro
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| H A D | rk3528-cru.h | 18 #define ARMCLK 6 macro
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| H A D | rockchip,rv1126b-cru.h | 14 #define ARMCLK 4 macro
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| /rk3399_rockchip-uboot/board/samsung/smdkc100/ |
| H A D | lowlevel_init.S | 111 ldr r1, =0x9000 @ ARMCLK/4
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| /rk3399_rockchip-uboot/drivers/clk/rockchip/ |
| H A D | clk_rk3128.c | 70 RK3128_CLK_DUMP(ARMCLK, "armclk", true),
542 case ARMCLK: in rk3128_clk_get_rate()
609 case ARMCLK: in rk3128_clk_set_rate()
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| H A D | clk_rk322x.c | 71 RK322x_CLK_DUMP(ARMCLK, "armclk", true),
589 case ARMCLK: in rk322x_clk_get_rate()
658 case ARMCLK: in rk322x_clk_set_rate()
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| H A D | clk_rk3328.c | 95 RK3328_CLK_DUMP(ARMCLK, "armclk", true),
808 case ARMCLK: in rk3328_clk_get_rate()
889 case ARMCLK: in rk3328_clk_set_rate()
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| H A D | clk_px30.c | 1295 if (!priv->gpll_hz && clk->id > ARMCLK) { in px30_clk_get_rate()
1314 case ARMCLK: in px30_clk_get_rate()
1389 if (!priv->gpll_hz && clk->id > ARMCLK) { in px30_clk_set_rate()
1399 case ARMCLK: in px30_clk_set_rate()
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| /rk3399_rockchip-uboot/drivers/clk/aspeed/ |
| H A D | clk_ast2500.c | 124 case ARMCLK: in ast2500_clk_get_rate()
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| /rk3399_rockchip-uboot/doc/device-tree-bindings/clock/ |
| H A D | rockchip,rk3288-dmc.txt | 126 <&cru ARMCLK>;
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