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Searched refs:w1 (Results 1 – 25 of 49) sorted by relevance

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/rk3399_ARM-atf/drivers/renesas/common/scif/
H A Dscif.S135 ldr w1, [x0, #CPG_SMSTPCR]
136 and w1, w1, #~MSTP
137 mvn w2, w1
139 str w1, [x0, #CPG_SMSTPCR]
141 ldr w1, [x0, #CPG_MSTPSR]
142 and w1, w1, #MSTP
143 cbnz w1, 5b
147 mov w1, #(SCSCR_TE_DIS + SCSCR_RE_DIS)
148 strh w1, [x0, #SCIF_SCSCR]
150 ldrh w1, [x0, #SCIF_SCFCR]
[all …]
/rk3399_ARM-atf/plat/mediatek/drivers/uart/
H A D8250_console.S32 cbz w1, core_init_fail
61 udiv w3, w1, w2 /* divisor = uartclk / (quot * baudrate) */
62 msub w1, w3, w2, w1 /* remainder = uartclk % (quot * baudrate) */
64 cmp w1, w2
68 mov w1, #(UART_LCR_DLAB | UART_LCR_WLS_8)
69 str w1, [x0, #UART_LCR]
72 and w1, w3, #0xff
73 str w1, [x0, #UART_DLL]
74 lsr w1, w3, #8
75 and w1, w1, #0xff
[all …]
/rk3399_ARM-atf/drivers/arm/pl011/aarch64/
H A Dpl011_console.S44 cbz w1, core_init_fail
53 lsl w1, w1, #2
54 udiv w2, w1, w2
56 lsr w1, w2, #6
58 str w1, [x0, #UARTIBRD]
60 and w1, w2, #0x3f
62 str w1, [x0, #UARTFBRD]
63 mov w1, #PL011_LINE_CONTROL
64 str w1, [x0, #UARTLCR_H]
68 mov w1, #(PL011_UARTCR_RXE | PL011_UARTCR_TXE | PL011_UARTCR_UARTEN)
[all …]
/rk3399_ARM-atf/plat/nxp/soc-ls1028a/aarch64/
H A Dls1028a.S138 ldr w1, [x1, #DCFG_COREDISABLEDSR_OFFSET]
141 and w0, w1, w0
211 str w1, [x2, #DCFG_BOOTLOCPTRL_OFFSET]
215 str w1, [x2, #DCFG_BOOTLOCPTRH_OFFSET]
382 mvn w1, wzr
383 str w1, [x5, #GICR_ICPENDR0_OFFSET]
467 mov w1, #GICR_ICENABLER0_SGI15
468 str w1, [x4, #GICR_ICENABLER0_OFFSET]
506 mov w1, wzr
512 mov w1, #RSTCR_RESET_REQ
[all …]
/rk3399_ARM-atf/plat/nxp/common/aarch64/
H A Dls_helpers.S95 mov w1, wzr
99 bfxil w1, w0, #8, #8
106 cmp w1, #NUMBER_OF_CLUSTERS
112 mul w1, w1, w0
113 add w1, w1, w2
115 lsl w0, w2, w1
137 mov w1, wzr
139 bfxil w1, w0, #8, #8 /* extract cluster */
145 cmp w1, #NUMBER_OF_CLUSTERS
151 mul w1, w1, w0
[all …]
/rk3399_ARM-atf/lib/libc/aarch64/
H A Dmemset.S28 strb w1, [x3], #1
36 bfi w1, w1, #8, #8 /* propagate 'val' */
37 bfi w1, w1, #16, #16
57 str w1, [x3], #4 /* write 4 bytes */
59 strh w1, [x3], #2 /* write 2 bytes */
61 strb w1, [x3] /* write 1 byte */
/rk3399_ARM-atf/plat/nxp/soc-ls1088a/aarch64/
H A Dls1088a.S200 str w1, [x2, #DCFG_BOOTLOCPTRL_OFFSET]
204 str w1, [x2, #DCFG_BOOTLOCPTRH_OFFSET]
256 ldr w1, [x1, #DCFG_COREDISABLEDSR_OFFSET]
259 and w0, w1, w0
425 mvn w1, wzr
426 str w1, [x5, #GICR_ICPENDR0_OFFSET]
510 mov w1, #GICR_ICENABLER0_SGI15
511 str w1, [x4, #GICR_ICENABLER0_OFFSET]
549 mov w1, wzr
555 mov w1, #RSTCR_RESET_REQ
[all …]
/rk3399_ARM-atf/plat/nxp/soc-ls1046a/aarch64/
H A Dls1046a.S145 ldr w1, [x4, #GICD_CTLR_OFFSET]
146 orr w1, w1, #GICD_CTLR_EN_GRP0
147 str w1, [x4, #GICD_CTLR_OFFSET]
160 lsl w1, w3, #16
161 orr w1, w1, #0xF
162 str w1, [x4, #GICD_SGIR_OFFSET]
185 ldr w1, [x1, #DCFG_COREDISR_OFFSET]
186 rev w2, w1
203 mov w1, wzr
204 str w1, [x2, #DCFG_RSTRQMR1_OFFSET]
[all …]
/rk3399_ARM-atf/drivers/st/uart/aarch64/
H A Dstm32_console.S60 cbz w1, core_init_fail
78 add w3, w1, w3
85 add w3, w3, w1, lsl #1
87 and w1, w3, #USART_BRR_DIV_FRACTION
88 lsr w1, w1, #1
90 orr w3, w3, w1
91 ldr w1, [x0, #USART_CR1]
92 orr w1, w1, #USART_CR1_OVER8
93 str w1, [x0, #USART_CR1]
227 ldr w1, [x0, #USART_ISR]
[all …]
/rk3399_ARM-atf/plat/imx/common/
H A Dimx8_helpers.S102 ldr w1, [x0, #0x5c]
103 cmp w1, #0x1000
106 ldr w1, [x0]
108 tbnz w1, #4, 1f
109 ldr w1, [x0]
110 orr w1, w1, #0x10
111 str w1, [x0]
112 orr w1, w1, #0x10000
113 str w1, [x0]
H A Dimx_uart_console.S75 ldr w1, [x0, #UTS]
76 tbnz w1, #5, 1b
78 ldr w1, [x0, #URXD]
79 and w0, w1, #URXD_RX_DATA
92 ldr w1, [x0, #USR2]
93 tbz w1, #3, 1b
/rk3399_ARM-atf/drivers/arm/css/sds/aarch64/
H A Dsds_helpers.S24 ldr w1, [x0]
27 cmp w2, w1, uxth
31 ubfx w1, w1, #SDS_REGION_STRUCT_COUNT_SHIFT, #SDS_REGION_STRUCT_COUNT_WIDTH
32 cbz w1, 2f
48 cmp w1, w3
/rk3399_ARM-atf/drivers/marvell/uart/
H A Da3700_console.S44 cbz w1, init_fail
95 add w1, w1, w2, lsr #1
96 udiv w2, w1, w2
213 ldr w1, [x0, #UART_STATUS_REG]
214 and w1, w1, #UARTLSR_RXRDY
215 cmp w1, #UARTLSR_RXRDY
251 1: ldr w1, [x0, #UART_STATUS_REG]
252 and w1, w1, #UARTLSR_TXEMPTY
253 cmp w1, #UARTLSR_TXEMPTY
/rk3399_ARM-atf/drivers/ti/uart/aarch64/
H A D16550_console.S44 cbz w1, init_fail
50 udiv w2, w1, w2
51 and w1, w2, #0xff /* w1 = DLL */
57 str w1, [x0, #UARTDLL] /* program DLL */
113 cbz w1, register_16550
199 1: ldr w1, [x0, #UARTLSR]
200 tbz w1, #UARTLSR_RDR_BIT, no_char
243 1: ldr w1, [x0, #UARTLSR]
244 and w1, w1, #(UARTLSR_TEMT | UARTLSR_THRE)
245 cmp w1, #(UARTLSR_TEMT | UARTLSR_THRE)
/rk3399_ARM-atf/plat/nxp/soc-ls1043a/aarch64/
H A Dls1043a.S167 ldr w1, [x4, #GICD_CTLR_OFFSET]
168 orr w1, w1, #GICD_CTLR_EN_GRP0
169 str w1, [x4, #GICD_CTLR_OFFSET]
180 lsl w1, w3, #16
181 orr w1, w1, #0xF
182 str w1, [x4, #GICD_SGIR_OFFSET]
205 ldr w1, [x1, #DCFG_COREDISR_OFFSET]
206 rev w2, w1
223 mov w1, wzr
224 str w1, [x2, #DCFG_RSTRQMR1_OFFSET]
[all …]
/rk3399_ARM-atf/drivers/nxp/console/
H A D16550_console.S97 cbz w1, init_fail
103 udiv w2, w1, w2
104 and w1, w2, #0xff /* w1 = DLL */
110 strb w1, [x0, #UARTDLL] /* program DLL */
162 cbz w1, register_16550
250 1: ldrb w1, [x0, #UARTLSR]
251 tbz w1, #UARTLSR_RDR, 1b
294 1: ldrb w1, [x0, #UARTLSR]
295 and w1, w1, #(UARTLSR_THRE)
296 cmp w1, #(UARTLSR_THRE)
/rk3399_ARM-atf/plat/socionext/uniphier/
H A Duniphier_console.S41 ldr w1, [x0, #UNIPHIER_UART_LSR]
42 tbz w1, #UNIPHIER_UART_LSR_DR_BIT, 0f
61 0: ldr w1, [x0, #UNIPHIER_UART_LSR]
62 tbz w1, #UNIPHIER_UART_LSR_TEMT_BIT, 0b
/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dwa_cve_2017_5715_mmu.S45 orr w1, wzr, #SMCCC_ARCH_WORKAROUND_1
46 cmp w0, w1
47 orr w1, wzr, #SMCCC_ARCH_WORKAROUND_3
48 ccmp w0, w1, #4, ne
50 mov_imm w1, \_esr_el3_val
51 ccmp w0, w1, #0, eq
/rk3399_ARM-atf/plat/rockchip/rk3399/drivers/pmu/
H A Dplat_pmu_macros.S96 ldr w1, [x5, #PMU_DDR_SREF_ST]
97 and w2, w1, #DDRC0_SREF_DONE_EXT
98 and w3, w1, #DDRC1_SREF_DONE_EXT
123 ldr w1, [x5, #PMU_DDR_SREF_ST]
124 and w2, w1, #DDRC0_SREF_DONE_EXT
125 and w3, w1, #DDRC1_SREF_DONE_EXT
/rk3399_ARM-atf/plat/mediatek/helpers/armv9/
H A Darch_helpers.S102 mov w1, #0x1
103 lsl w1, w1, w0
105 str w1, [x0]
/rk3399_ARM-atf/plat/nxp/soc-lx2160a/aarch64/
H A Dlx2160a.S191 str w1, [x2, #DCFG_BOOTLOCPTRL_OFFSET]
195 str w1, [x2, #DCFG_BOOTLOCPTRH_OFFSET]
245 ldr w1, [x1, #DCFG_COREDISABLEDSR_OFFSET]
248 and w0, w1, w0
414 mvn w1, wzr
415 str w1, [x5, #GICR_ICPENDR0_OFFSET]
498 mov w1, #GICR_ICENABLER0_SGI15
499 str w1, [x4, #GICR_ICENABLER0_OFFSET]
569 ldr w1, =DCFG_DEVDISR1_SEC
570 str w1, [x2, x0]
[all …]
/rk3399_ARM-atf/plat/nvidia/tegra/common/aarch64/
H A Dtegra_helpers.S320 ldr w1, [x0]
321 lsr w1, w1, #CHIP_ID_SHIFT
322 and w1, w1, #CHIP_ID_MASK
323 cmp w1, #TEGRA_CHIPID_TEGRA21 /* T210? */
325 ldr w1, [x0]
326 lsr w1, w1, #MAJOR_VERSION_SHIFT
327 and w1, w1, #MAJOR_VERSION_MASK
328 cmp w1, #0x02 /* T210 B01? */
/rk3399_ARM-atf/plat/mediatek/helpers/armv8_2/
H A Darch_helpers.S101 mov w1, #0x1
102 lsl w1, w1, w0
104 str w1, [x0]
/rk3399_ARM-atf/plat/qti/common/src/aarch64/
H A Dqti_uart_console.S95 1: ldr w1, [x0, #GENI_STATUS_REG]
96 and w1, w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
97 cmp w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK
/rk3399_ARM-atf/drivers/amlogic/console/aarch64/
H A Dmeson_console.S96 cmp w1, w3
102 udiv w3, w1, w3
216 ldr w1, [x0, #MESON_STATUS_OFFSET]
217 tbnz w1, #MESON_STATUS_RX_EMPTY_BIT, 1f
259 1: ldr w1, [x0, #MESON_STATUS_OFFSET]
260 tbz w1, #MESON_STATUS_TX_EMPTY_BIT, 1b

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