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1c408d3c |
| 01-Mar-2024 |
Manish Pandey <manish.pandey2@arm.com> |
Merge changes from topic "imx8ulp_support" into integration
* changes: docs(maintainers): add the maintainers for imx8ulp docs(imx8ulp): add imx8ulp platform fix(imx8ulp): increase the mmap re
Merge changes from topic "imx8ulp_support" into integration
* changes: docs(maintainers): add the maintainers for imx8ulp docs(imx8ulp): add imx8ulp platform fix(imx8ulp): increase the mmap region num feat(imx8ulp): adjust the dram mapped region feat(imx8ulp): ddrc switch auto low power and software interface feat(imx8ulp): add some delay before cmc1 access feat(imx8ulp): add a flag check for the ddr status fix(imx8ulp): add sw workaround for csi/hotplug test hang feat(imx8ulp): adjust the voltage when sys dvfs enabled feat(imx8ulp): enable the DDR frequency scaling support fix(imx8ulp): fix suspend/resume issue when DBD owner is s400 only feat(imx8ulp): update XRDC for ELE to access DDR with CA35 DID feat(imx8ulp): add memory region policy feat(imx8ulp): protect TEE region for secure access only feat(imx8ulp): add trusty support feat(imx8ulp): add OPTEE support feat(imx8ulp): update the upower config for power optimization feat(imx8ulp): allow RTD to reset APD through MU feat(imx8ulp): not power off LPAV PD when LPAV owner is RTD feat(imx8ulp): add system power off support feat(imx8ulp): add APD power down mode(PD) support in system suspend feat(imx8ulp): add the basic support for idle & system suspned feat(imx8ulp): enable 512KB cache after resume on imx8ulp feat(imx8ulp): add the initial XRDC support feat(imx8ulp): allocated caam did for the non secure world feat(imx8ulp): add i.MX8ULP basic support build(changelog): add new scopes for nxp imx8ulp platform feat(scmi): add scmi sensor support
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| #
bcca70b9 |
| 27-Jul-2021 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8ulp): enable 512KB cache after resume on imx8ulp
The L2 cache size config will be reset to default 256KB, So we need to switch to 512KB after resume to make sure the L2 cache size is same a
feat(imx8ulp): enable 512KB cache after resume on imx8ulp
The L2 cache size config will be reset to default 256KB, So we need to switch to 512KB after resume to make sure the L2 cache size is same as before suspend.
Signed-off-by: Jacky Bai <ping.bai@nxp.com> Reviewed-by: Ye Li <ye.li@nxp.com> Change-Id: Ifd9b3e01829fbd7b1ae4ba00611359330f1a4f83
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| #
fcd41e86 |
| 02-Jul-2020 |
Jacky Bai <ping.bai@nxp.com> |
feat(imx8ulp): add i.MX8ULP basic support
Add the basic support for i.MX8ULP.
The i.MX 8ULP family of processors features NXP’s advanced implementation of the dual Arm Cortex-A35 cores alongside an
feat(imx8ulp): add i.MX8ULP basic support
Add the basic support for i.MX8ULP.
The i.MX 8ULP family of processors features NXP’s advanced implementation of the dual Arm Cortex-A35 cores alongside an Arm Cortex-M33. This combined architecture enables the device to run a rich operating system (such as Linux) on the Cortex-A35 core and an RTOS (such as FreeRTOS) on the Cortex-M33 core. It also includes a Cadence Tensilica Fusion DSP for low-power audio and a HiFi4 DSP for advanced audio and machine learning applications.
Signed-off-by: Peng Fan <peng.fan@nxp.com> Signed-off-by: Ye Li <ye.li@nxp.com> Signed-off-by: Jacky Bai <ping.bai@nxp.com> Change-Id: I12df622b95960bcdf7da52e4c66470a700690e36
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| #
deca6584 |
| 25-Oct-2018 |
Antonio Niño Díaz <antonio.ninodiaz@arm.com> |
Merge pull request #1636 from antonio-nino-diaz-arm/an/console
Deprecate weak crash console functions
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9c675b37 |
| 17-Oct-2018 |
Antonio Nino Diaz <antonio.ninodiaz@arm.com> |
Add plat_crash_console_flush to platforms without it
Even though at this point plat_crash_console_flush is optional, it will stop being optional in a following patch.
The console driver of warp7 do
Add plat_crash_console_flush to platforms without it
Even though at this point plat_crash_console_flush is optional, it will stop being optional in a following patch.
The console driver of warp7 doesn't support flush, so the implementation is a placeholder.
TI had ``plat_crash_console_init`` and ``plat_crash_console_putc``, but they weren't global so they weren't actually used. Also, they were calling the wrong functions.
imx8_helpers.S only has placeholders for all of the functions.
Change-Id: I8d17bbf37c7dad74e134c61ceb92acb9af497718 Signed-off-by: Antonio Nino Diaz <antonio.ninodiaz@arm.com>
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d135ad78 |
| 19-Jun-2018 |
Dimitris Papastamos <dimitris.papastamos@arm.com> |
Merge pull request #1410 from Anson-Huang/master
Add NXP's i.MX8QX and i.MX8QM SoC support
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bd08def3 |
| 05-Jun-2018 |
Anson Huang <Anson.Huang@nxp.com> |
Support for NXP's imx SoC common function
This patch adds support for NXP's imx SoC common function support like topology, gic implementation.
Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
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