1*5bd9c17dSSaurabh Gorecha/* 2*5bd9c17dSSaurabh Gorecha * Copyright (c) 2017-2018, ARM Limited and Contributors. All rights reserved. 3*5bd9c17dSSaurabh Gorecha * Copyright (c) 2018,2020 The Linux Foundation. All rights reserved. 4*5bd9c17dSSaurabh Gorecha * 5*5bd9c17dSSaurabh Gorecha * SPDX-License-Identifier: BSD-3-Clause 6*5bd9c17dSSaurabh Gorecha */ 7*5bd9c17dSSaurabh Gorecha 8*5bd9c17dSSaurabh Gorecha#include <asm_macros.S> 9*5bd9c17dSSaurabh Gorecha#include <console_macros.S> 10*5bd9c17dSSaurabh Gorecha 11*5bd9c17dSSaurabh Gorecha#include <platform_def.h> 12*5bd9c17dSSaurabh Gorecha#include <qti_uart_console.h> 13*5bd9c17dSSaurabh Gorecha 14*5bd9c17dSSaurabh Gorecha/* 15*5bd9c17dSSaurabh Gorecha * This driver implements console logging into a ring buffer. 16*5bd9c17dSSaurabh Gorecha */ 17*5bd9c17dSSaurabh Gorecha 18*5bd9c17dSSaurabh Gorecha .globl qti_console_uart_register 19*5bd9c17dSSaurabh Gorecha 20*5bd9c17dSSaurabh Gorecha /* ----------------------------------------------- 21*5bd9c17dSSaurabh Gorecha * int qti_console_uart_register(console_t *console, 22*5bd9c17dSSaurabh Gorecha * uintptr_t uart_base_addr) 23*5bd9c17dSSaurabh Gorecha * Registers uart console instance. 24*5bd9c17dSSaurabh Gorecha * In: x0 - pointer to empty console_t struct 25*5bd9c17dSSaurabh Gorecha * x1 - start address of uart block. 26*5bd9c17dSSaurabh Gorecha * Out: x0 - 1 to indicate success 27*5bd9c17dSSaurabh Gorecha * Clobber list: x0, x1, x14 28*5bd9c17dSSaurabh Gorecha * ----------------------------------------------- 29*5bd9c17dSSaurabh Gorecha */ 30*5bd9c17dSSaurabh Gorechafunc qti_console_uart_register 31*5bd9c17dSSaurabh Gorecha str x1, [x0, #CONSOLE_T_BASE] /* Save UART base. */ 32*5bd9c17dSSaurabh Gorecha finish_console_register uart putc=1, flush=1 33*5bd9c17dSSaurabh Gorechaendfunc qti_console_uart_register 34*5bd9c17dSSaurabh Gorecha 35*5bd9c17dSSaurabh Gorecha /* ----------------------------------------------- 36*5bd9c17dSSaurabh Gorecha * int qti_console_uart_puts(int c, console_t *console) 37*5bd9c17dSSaurabh Gorecha * Writes a character to the UART console. 38*5bd9c17dSSaurabh Gorecha * The character must be preserved in x0. 39*5bd9c17dSSaurabh Gorecha * In: x0 - character to be stored 40*5bd9c17dSSaurabh Gorecha * x1 - pointer to console_t struct 41*5bd9c17dSSaurabh Gorecha * Clobber list: x1, x2 42*5bd9c17dSSaurabh Gorecha * ----------------------------------------------- 43*5bd9c17dSSaurabh Gorecha */ 44*5bd9c17dSSaurabh Gorechafunc console_uart_putc 45*5bd9c17dSSaurabh Gorecha /* set x1 = UART base. */ 46*5bd9c17dSSaurabh Gorecha ldr x1, [x1, #CONSOLE_T_BASE] 47*5bd9c17dSSaurabh Gorecha 48*5bd9c17dSSaurabh Gorecha /* Loop until M_GENI_CMD_ACTIVE bit not clear. */ 49*5bd9c17dSSaurabh Gorecha1: ldr w2, [x1, #GENI_STATUS_REG] 50*5bd9c17dSSaurabh Gorecha and w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 51*5bd9c17dSSaurabh Gorecha cmp w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 52*5bd9c17dSSaurabh Gorecha b.eq 1b 53*5bd9c17dSSaurabh Gorecha 54*5bd9c17dSSaurabh Gorecha /* Transmit data. */ 55*5bd9c17dSSaurabh Gorecha cmp w0, #0xA 56*5bd9c17dSSaurabh Gorecha b.ne 3f 57*5bd9c17dSSaurabh Gorecha 58*5bd9c17dSSaurabh Gorecha /* Add '\r' when input char is '\n' */ 59*5bd9c17dSSaurabh Gorecha mov w2, #0x1 60*5bd9c17dSSaurabh Gorecha mov w0, #0xD 61*5bd9c17dSSaurabh Gorecha str w2, [x1, #UART_TX_TRANS_LEN_REG] 62*5bd9c17dSSaurabh Gorecha mov w2, #GENI_M_CMD_TX 63*5bd9c17dSSaurabh Gorecha str w2, [x1, #GENI_M_CMD0_REG] 64*5bd9c17dSSaurabh Gorecha str w0, [x1, #GENI_TX_FIFOn_REG] 65*5bd9c17dSSaurabh Gorecha mov w0, #0xA 66*5bd9c17dSSaurabh Gorecha 67*5bd9c17dSSaurabh Gorecha /* Loop until M_GENI_CMD_ACTIVE bit not clear. */ 68*5bd9c17dSSaurabh Gorecha2: ldr w2, [x1, #GENI_STATUS_REG] 69*5bd9c17dSSaurabh Gorecha and w2, w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 70*5bd9c17dSSaurabh Gorecha cmp w2, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 71*5bd9c17dSSaurabh Gorecha b.eq 2b 72*5bd9c17dSSaurabh Gorecha 73*5bd9c17dSSaurabh Gorecha /* Transmit i/p data. */ 74*5bd9c17dSSaurabh Gorecha3: mov w2, #0x1 75*5bd9c17dSSaurabh Gorecha str w2, [x1, #UART_TX_TRANS_LEN_REG] 76*5bd9c17dSSaurabh Gorecha mov w2, #GENI_M_CMD_TX 77*5bd9c17dSSaurabh Gorecha str w2, [x1, #GENI_M_CMD0_REG] 78*5bd9c17dSSaurabh Gorecha str w0, [x1, #GENI_TX_FIFOn_REG] 79*5bd9c17dSSaurabh Gorecha 80*5bd9c17dSSaurabh Gorecha ret 81*5bd9c17dSSaurabh Gorechaendfunc console_uart_putc 82*5bd9c17dSSaurabh Gorecha 83*5bd9c17dSSaurabh Gorecha /* ----------------------------------------------- 84*5bd9c17dSSaurabh Gorecha * int qti_console_uart_flush(console_t *console) 85*5bd9c17dSSaurabh Gorecha * In: x0 - pointer to console_t struct 86*5bd9c17dSSaurabh Gorecha * Out: x0 - 0 for success 87*5bd9c17dSSaurabh Gorecha * Clobber list: x0, x1 88*5bd9c17dSSaurabh Gorecha * ----------------------------------------------- 89*5bd9c17dSSaurabh Gorecha */ 90*5bd9c17dSSaurabh Gorechafunc console_uart_flush 91*5bd9c17dSSaurabh Gorecha /* set x0 = UART base. */ 92*5bd9c17dSSaurabh Gorecha ldr x0, [x0, #CONSOLE_T_BASE] 93*5bd9c17dSSaurabh Gorecha 94*5bd9c17dSSaurabh Gorecha /* Loop until M_GENI_CMD_ACTIVE bit not clear. */ 95*5bd9c17dSSaurabh Gorecha1: ldr w1, [x0, #GENI_STATUS_REG] 96*5bd9c17dSSaurabh Gorecha and w1, w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 97*5bd9c17dSSaurabh Gorecha cmp w1, #GENI_STATUS_M_GENI_CMD_ACTIVE_MASK 98*5bd9c17dSSaurabh Gorecha b.eq 1b 99*5bd9c17dSSaurabh Gorecha 100*5bd9c17dSSaurabh Gorecha mov w0, #0 101*5bd9c17dSSaurabh Gorecha ret 102*5bd9c17dSSaurabh Gorechaendfunc console_uart_flush 103