Home
last modified time | relevance | path

Searched refs:sysreg_bit_set (Results 1 – 25 of 43) sorted by relevance

12

/rk3399_ARM-atf/lib/cpus/aarch64/
H A Dcortex_x3.S37 sysreg_bit_set CORTEX_X3_CPUACTLR_EL1, BIT(22)
43 sysreg_bit_set CORTEX_X3_CPUACTLR2_EL1, BIT(0)
59 sysreg_bit_set CORTEX_X3_CPUACTLR2_EL1, BIT(40)
75 sysreg_bit_set CORTEX_X3_CPUACTLR6_EL1, BIT(41)
82 sysreg_bit_set CORTEX_X3_CPUACTLR5_EL1, CORTEX_X3_CPUACTLR5_EL1_BIT_55
97 sysreg_bit_set CORTEX_X3_CPUACTLR3_EL1, CORTEX_X3_CPUACTLR3_EL1_BIT_47
103 sysreg_bit_set CORTEX_X3_CPUACTLR_EL1, BIT(36)
109 sysreg_bit_set CORTEX_X3_CPUACTLR6_EL1, BIT(41)
119 sysreg_bit_set CORTEX_X3_CPUACTLR_EL1, BIT(1)
125 sysreg_bit_set CORTEX_X3_CPUACTLR2_EL
[all...]
H A Dneoverse_n2.S72 sysreg_bit_set NEOVERSE_N2_CPUECTLR_EL1, NEOVERSE_N2_CPUECTLR_EL1_PFSTIDIS_BIT
78 sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_46
84 sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL1, BIT(29)
113 sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_13
119 sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_44
126 sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, NEOVERSE_N2_CPUACTLR5_EL1_BIT_17
140 sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22
147 sysreg_bit_set NEOVERSE_N2_CPUACTLR_EL1, NEOVERSE_N2_CPUACTLR_EL1_BIT_22
174 sysreg_bit_set NEOVERSE_N2_CPUACTLR5_EL1, BIT(61)
194 sysreg_bit_set NEOVERSE_N2_CPUACTLR2_EL
[all...]
H A Dneoverse_v2.S57 sysreg_bit_set NEOVERSE_V2_CPUACTLR2_EL1, NEOVERSE_V2_CPUACTLR2_EL1_BIT_0
63 sysreg_bit_set NEOVERSE_V2_CPUACTLR5_EL1, NEOVERSE_V2_CPUACTLR5_EL1_BIT_55
70 sysreg_bit_set NEOVERSE_V2_CPUACTLR3_EL1, NEOVERSE_V2_CPUACTLR3_EL1_BIT_47
83 sysreg_bit_set NEOVERSE_V2_CPUACTLR_EL1, NEOVERSE_V2_CPUACTLR_EL1_BIT_36
93 sysreg_bit_set NEOVERSE_V2_CPUACTLR_EL1, BIT(1)
99 sysreg_bit_set NEOVERSE_V2_CPUACTLR2_EL1, BIT(22)
105 sysreg_bit_set NEOVERSE_V2_CPUACTLR5_EL1, BIT(50)
124 sysreg_bit_set NEOVERSE_V2_CPUECTLR_EL1, BIT(46)
140 sysreg_bit_set NEOVERSE_V2_CPUACTLR6_EL1, BIT(41)
177 sysreg_bit_set NEOVERSE_V2_CPUPWRCTLR_EL
[all...]
H A Dneoverse_n1.S59 sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_6
65 sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_59
71 sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_0
72 sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_15
78 sysreg_bit_set NEOVERSE_N1_CPUACTLR2_EL1, NEOVERSE_N1_CPUACTLR2_EL1_BIT_11
84 sysreg_bit_set NEOVERSE_N1_CPUECTLR_EL1, NEOVERSE_N1_WS_THR_L2_MASK
90 sysreg_bit_set NEOVERSE_N1_CPUACTLR3_EL1, NEOVERSE_N1_CPUACTLR3_EL1_BIT_10
96 sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
102 sysreg_bit_set NEOVERSE_N1_CPUECTLR_EL1, NEOVERSE_N1_CPUECTLR_EL1_MM_TLBPF_DIS_BIT
108 sysreg_bit_set NEOVERSE_N1_CPUACTLR_EL1, NEOVERSE_N1_CPUACTLR_EL1_BIT_13
[all …]
H A Dcortex_x4.S46 sysreg_bit_set CORTEX_X4_CPUACTLR3_EL1, BIT(47)
55 sysreg_bit_set CORTEX_X4_CPUACTLR5_EL1, BIT(14)
62 sysreg_bit_set CORTEX_X4_CPUACTLR4_EL1, BIT(8)
77 sysreg_bit_set CORTEX_X4_CPUACTLR4_EL1, (BIT(11) | BIT(10))
98 sysreg_bit_set CORTEX_X4_CPUACTLR3_EL1, BIT(14)
99 sysreg_bit_set CORTEX_X4_CPUACTLR3_EL1, BIT(13)
100 sysreg_bit_set CORTEX_X4_CPUACTLR_EL1, BIT(52)
123 sysreg_bit_set CORTEX_X4_CPUACTLR2_EL1, BIT(22)
130 sysreg_bit_set CORTEX_X4_CPUECTLR_EL1, BIT(46)
142 sysreg_bit_set CORTEX_X4_CPUACTLR6_EL
[all...]
H A Dcortex_x2.S38 sysreg_bit_set CORTEX_X2_CPUACTLR4_EL1, BIT(15)
44 sysreg_bit_set CORTEX_X2_CPUECTLR_EL1, BIT(8)
50 sysreg_bit_set CORTEX_X2_CPUACTLR4_EL1, BIT(43)
87 sysreg_bit_set CORTEX_X2_CPUECTLR_EL1, CORTEX_X2_CPUECTLR_EL1_WS_THR_DISABLE_ALL_BITS
106 sysreg_bit_set CORTEX_X2_CPUECTLR_EL1, CORTEX_X2_CPUECTLR_EL1_PFSTIDIS_BIT
135 sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, BIT(13)
141 sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, BIT(44)
148 sysreg_bit_set CORTEX_X2_CPUACTLR_EL1, CORTEX_X2_CPUACTLR_EL1_BIT_22
154 sysreg_bit_set CORTEX_X2_CPUACTLR5_EL1, CORTEX_X2_CPUACTLR5_EL1_BIT_17
170 sysreg_bit_set CORTEX_X2_CPUACTLR_EL
[all...]
H A Drainier.S48 sysreg_bit_set RAINIER_CPUACTLR_EL1, RAINIER_CPUACTLR_EL1_BIT_13
56 sysreg_bit_set RAINIER_CPUACTLR2_EL1, RAINIER_CPUACTLR2_EL1_BIT_2
60 sysreg_bit_set actlr_el3, RAINIER_ACTLR_AMEN_BIT
63 sysreg_bit_set actlr_el2, RAINIER_ACTLR_AMEN_BIT
80 sysreg_bit_set RAINIER_CPUPWRCTLR_EL1, RAINIER_CORE_PWRDN_EN_MASK
H A Dcortex_a57.S68 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_OVERREAD
74 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_NO_ALLOC_WBWA
84 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DCC_AS_DCCI
90 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_DMB_NULLIFICATION
104 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_LOAD_PASS_DMB
110 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_GRE_NGRE_AS_NGNRE
131 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_INDIRECT_PREDICTOR
137 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_FORCE_FPSCR_FLUSH
143 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_INSTR_PREFETCH
161 sysreg_bit_set CORTEX_A57_CPUACTLR_EL1, CORTEX_A57_CPUACTLR_EL1_DIS_LOAD_PASS_STORE
[all …]
H A Dcortex_a715.S34 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(20)
45 sysreg_bit_set GCR_EL1, GCR_EL1_RRND_BIT
68 sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(0) label
74 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(32) label
87 sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(57)
88 sysreg_bit_set CORTEX_A715_CPUACTLR_EL1, BIT(58)
96 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(33)
102 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(27)
108 sysreg_bit_set CORTEX_A715_CPUACTLR2_EL1, BIT(26)
140 sysreg_bit_set CORTEX_A715_CPUACTLR3_EL1, BIT(2)
[all …]
H A Dcortex_a78c.S28 sysreg_bit_set CORTEX_A78C_CPUECTLR_EL1, CORTEX_A78C_CPUECTLR_EL1_MM_ASP_EN
35 sysreg_bit_set CORTEX_A78C_CPUACTLR2_EL1, BIT(2)
54 sysreg_bit_set CORTEX_A78C_CPUACTLR2_EL1, CORTEX_A78C_CPUACTLR2_EL1_BIT_0
60 sysreg_bit_set CORTEX_A78C_CPUACTLR2_EL1, CORTEX_A78C_CPUACTLR2_EL1_BIT_40
80 sysreg_bit_set CORTEX_A78C_ACTLR5_EL1, BIT(55)
94 sysreg_bit_set CORTEX_A78C_ACTLR3_EL1, BIT(47)
113 sysreg_bit_set CORTEX_A78C_CPUECTLR_EL1, BIT(46)
130 sysreg_bit_set CORTEX_A78C_CPUPWRCTLR_EL1, CORTEX_A78C_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT
H A Dcortex_a720.S31 sysreg_bit_set CORTEX_A720_CPUACTLR_EL1, (BIT(60) | BIT(61))
37 sysreg_bit_set CORTEX_A720_CPUACTLR2_EL1, BIT(26)
43 sysreg_bit_set CORTEX_A720_CPUACTLR4_EL1, BIT(11)
65 sysreg_bit_set CORTEX_A720_CPUACTLR_EL1, BIT(57)
66 sysreg_bit_set CORTEX_A720_CPUACTLR_EL1, BIT(58)
74 sysreg_bit_set CORTEX_A720_CPUACTLR2_EL1, BIT(37)
119 sysreg_bit_set CORTEX_A720_CPUPWRCTLR_EL1, CORTEX_A720_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
H A Dcortex_x1.S29 sysreg_bit_set CORTEX_X1_ACTLR2_EL1, BIT(1)
35 sysreg_bit_set CORTEX_X1_ACTLR2_EL1, BIT(2)
41 sysreg_bit_set CORTEX_X1_CPUECTLR_EL1, BIT(53)
60 sysreg_bit_set CORTEX_X1_CPUECTLR_EL1, BIT(46)
73 sysreg_bit_set CORTEX_X1_CPUPWRCTLR_EL1, CORTEX_X1_CORE_PWRDN_EN_MASK
H A Dcortex_a710.S38 sysreg_bit_set CORTEX_A710_CPUACTLR4_EL1, BIT(15)
44 sysreg_bit_set CORTEX_A710_CPUECTLR_EL1, BIT(8)
50 sysreg_bit_set CORTEX_A710_CPUACTLR4_EL1, BIT(43)
131 sysreg_bit_set CORTEX_A710_CPUECTLR_EL1, CORTEX_A710_CPUECTLR_EL1_PFSTIDIS_BIT
137 sysreg_bit_set CORTEX_A710_CPUACTLR_EL1, CORTEX_A710_CPUACTLR_EL1_BIT_46
164 sysreg_bit_set CORTEX_A710_CPUACTLR5_EL1, CORTEX_A710_CPUACTLR5_EL1_BIT_13
170 sysreg_bit_set CORTEX_A710_CPUACTLR5_EL1, CORTEX_A710_CPUACTLR5_EL1_BIT_44
176 sysreg_bit_set CORTEX_A710_CPUACTLR_EL1, CORTEX_A710_CPUACTLR_EL1_BIT_22
182 sysreg_bit_set CORTEX_A710_CPUACTLR5_EL1, CORTEX_A710_CPUACTLR5_EL1_BIT_17
197 sysreg_bit_set CORTEX_A710_CPUACTLR_EL
[all...]
H A Dc1_premium.S39 sysreg_bit_set C1_PREMIUM_IMP_CPUACTLR4_EL1, BIT(23)
52 sysreg_bit_set C1_PREMIUM_IMP_CPUACTLR_EL1, BIT(48)
58 sysreg_bit_set C1_PREMIUM_IMP_CPUACTLR5_EL1, BIT(13)
64 sysreg_bit_set C1_PREMIUM_IMP_CPUACTLR2_EL1, BIT(22)
95 sysreg_bit_set C1_PREMIUM_IMP_CPUACTLR4_EL1, BIT(23)
107 sysreg_bit_set C1_PREMIUM_CPUACTLR6_EL1, BIT(41)
H A Dcortex_x925.S44 sysreg_bit_set CORTEX_X925_CPUACTLR5_EL1, BIT(14)
57 sysreg_bit_set CORTEX_X925_CPUACTLR5_EL1, BIT(42)
84 sysreg_bit_set CORTEX_X925_CPUACTLR6_EL1, BIT(41)
97 sysreg_bit_set CORTEX_X925_CPUACTLR2_EL1, BIT(22)
104 sysreg_bit_set CORTEX_X925_CPUECTLR_EL1, BIT(46)
116 sysreg_bit_set CORTEX_X925_CPUACTLR6_EL1, BIT(41)
160 sysreg_bit_set CORTEX_X925_CPUPWRCTLR_EL1, CORTEX_X925_CPUPWRCTLR_EL1_CORE_PWRDN_BIT
H A Dc1_ultra.S39 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR4_EL1, BIT(23)
56 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR_EL1, BIT(48)
62 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR5_EL1, BIT(13)
68 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR2_EL1, BIT(22)
98 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR4_EL1, BIT(23)
110 sysreg_bit_set C1_ULTRA_IMP_CPUACTLR6_EL1, BIT(41)
H A Dcortex_a55.S26 sysreg_bit_set CORTEX_A55_CPUACTLR_EL1, CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE
32 sysreg_bit_set CORTEX_A55_CPUECTLR_EL1, CORTEX_A55_CPUECTLR_EL1_L1WSCTL
33 sysreg_bit_set CORTEX_A55_CPUACTLR_EL1, CORTEX_A55_CPUACTLR_EL1_DISABLE_WRITE_STREAMING
51 sysreg_bit_set CORTEX_A55_CPUACTLR_EL1, CORTEX_A55_CPUACTLR_EL1_DISABLE_L1_PAGEWALKS
66 sysreg_bit_set CORTEX_A55_CPUACTLR_EL1, CORTEX_A55_CPUACTLR_EL1_DISABLE_DUAL_ISSUE
72 sysreg_bit_set CORTEX_A55_CPUACTLR_EL1, CORTEX_A55_CPUACTLR_EL1_DISABLE_L1_PAGEWALKS
126 sysreg_bit_set CORTEX_A55_CPUPWRCTLR_EL1, CORTEX_A55_CORE_PWRDN_EN_MASK
H A Dneoverse_v1.S88 sysreg_bit_set NEOVERSE_V1_CPUECTLR_EL1, NEOVERSE_V1_CPUECTLR_EL1_BIT_53
95 sysreg_bit_set NEOVERSE_V1_ACTLR2_EL1, NEOVERSE_V1_ACTLR2_EL1_BIT_2
102 sysreg_bit_set NEOVERSE_V1_ACTLR2_EL1, NEOVERSE_V1_ACTLR2_EL1_BIT_28
109 sysreg_bit_set NEOVERSE_V1_CPUECTLR_EL1, NEOVERSE_V1_CPUECTLR_EL1_BIT_8
187 sysreg_bit_set NEOVERSE_V1_ACTLR2_EL1, NEOVERSE_V1_ACTLR2_EL1_BIT_0
194 sysreg_bit_set NEOVERSE_V1_ACTLR5_EL1, NEOVERSE_V1_ACTLR5_EL1_BIT_61
201 sysreg_bit_set NEOVERSE_V1_ACTLR2_EL1, NEOVERSE_V1_ACTLR2_EL1_BIT_40
215 sysreg_bit_set NEOVERSE_V1_ACTLR5_EL1, NEOVERSE_V1_ACTLR5_EL1_BIT_55
221 sysreg_bit_set NEOVERSE_V1_ACTLR3_EL1, NEOVERSE_V1_ACTLR3_EL1_BIT_47
241 sysreg_bit_set NEOVERSE_V1_CPUECTLR_EL1, BIT(46)
[all …]
H A Dcortex_a75.S29 sysreg_bit_set sctlr_el3, SCTLR_IESB_BIT
35 sysreg_bit_set CORTEX_A75_CPUACTLR_EL1, (1 << 13)
78 sysreg_bit_set CORTEX_A75_CPUACTLR_EL1, CORTEX_A75_CPUACTLR_EL1_DISABLE_LOAD_PASS_STORE
120 sysreg_bit_set actlr_el3, CORTEX_A75_ACTLR_AMEN_BIT
124 sysreg_bit_set actlr_el2, CORTEX_A75_ACTLR_AMEN_BIT
148 sysreg_bit_set CORTEX_A75_CPUPWRCTLR_EL1, \
H A Dc1_pro.S38 sysreg_bit_set C1_PRO_IMP_CPUACTLR2_EL1, BIT(27)
44 sysreg_bit_set C1_PRO_IMP_CPUACTLR2_EL1, BIT(42)
56 sysreg_bit_set C1_PRO_IMP_CPUECTLR_EL1, BIT(57)
85 sysreg_bit_set C1_PRO_IMP_CPUACTLR2_EL1, BIT(37)
101 sysreg_bit_set C1_PRO_IMP_CPUECTLR2_EL1, BIT(49)
H A Dneoverse_v3.S54 sysreg_bit_set NEOVERSE_V3_CPUACTLR6_EL1, BIT(41)
90 sysreg_bit_set NEOVERSE_V3_CPUACTLR2_EL1, BIT(22)
96 sysreg_bit_set NEOVERSE_V3_CPUACTLR4_EL1, BIT(57)
103 sysreg_bit_set NEOVERSE_V3_CPUECTLR_EL1, BIT(46)
115 sysreg_bit_set NEOVERSE_V3_CPUACTLR6_EL1, BIT(41)
152 sysreg_bit_set NEOVERSE_V3_CPUPWRCTLR_EL1, \
H A Dcortex_a78.S30 sysreg_bit_set CORTEX_A78_ACTLR2_EL1, CORTEX_A78_ACTLR2_EL1_BIT_1
36 sysreg_bit_set CORTEX_A78_ACTLR2_EL1, CORTEX_A78_ACTLR2_EL1_BIT_2
42 sysreg_bit_set CORTEX_A78_CPUECTLR_EL1, CORTEX_A78_CPUECTLR_EL1_BIT_8
116 sysreg_bit_set CORTEX_A78_ACTLR2_EL1, BIT(0)
122 sysreg_bit_set CORTEX_A78_ACTLR2_EL1, BIT(40)
145 sysreg_bit_set CORTEX_A78_ACTLR3_EL1, BIT(47)
164 sysreg_bit_set CORTEX_A78_CPUECTLR_EL1, BIT(46)
192 sysreg_bit_set CORTEX_A78_CPUPWRCTLR_EL1, CORTEX_A78_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT
H A Dcortex_a78_ae.S28 sysreg_bit_set CORTEX_A78_AE_CPUECTLR_EL1, CORTEX_A78_AE_CPUECTLR_EL1_BIT_8
72 sysreg_bit_set CORTEX_A78_AE_ACTLR2_EL1, CORTEX_A78_AE_ACTLR2_EL1_BIT_0
84 sysreg_bit_set CORTEX_A78_AE_ACTLR2_EL1, CORTEX_A78_AE_ACTLR2_EL1_BIT_40
103 sysreg_bit_set CORTEX_A78_AE_CPUECTLR_EL1, BIT(46)
135 sysreg_bit_set CORTEX_A78_CPUPWRCTLR_EL1, CORTEX_A78_CPUPWRCTLR_EL1_CORE_PWRDN_EN_BIT
H A Dcortex_a77.S71 sysreg_bit_set CORTEX_A77_ACTLR2_EL1, CORTEX_A77_ACTLR2_EL1_BIT_2
78 sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, CORTEX_A77_CPUECTLR_EL1_BIT_53
84 sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, CORTEX_A77_CPUECTLR_EL1_BIT_8
121 sysreg_bit_set CORTEX_A77_ACTLR2_EL1, CORTEX_A77_ACTLR2_EL1_BIT_0
148 sysreg_bit_set CORTEX_A77_CPUECTLR_EL1, BIT(46)
169 sysreg_bit_set CORTEX_A77_CPUPWRCTLR_EL1, \
H A Dcortex_a725.S31 sysreg_bit_set CORTEX_A725_CPUACTLR_EL1, BIT(57)
32 sysreg_bit_set CORTEX_A725_CPUACTLR_EL1, BIT(58)
48 sysreg_bit_set CORTEX_A725_CPUACTLR2_EL1, BIT(37)
101 sysreg_bit_set CORTEX_A725_CPUPWRCTLR_EL1, CORTEX_A725_CPUPWRCTLR_EL1_CORE_PWRDN_BIT

12