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Searched refs:pin (Results 1 – 21 of 21) sorted by relevance

/optee_os/core/drivers/amd/
H A Dps_gpio_driver.c39 uint32_t pin = 0; in ps_gpio_get_value() local
43 amd_gpio_get_bank_and_pin(ps->bdata, gpio_pin, &bank, &pin); in ps_gpio_get_value()
45 if (io_read32(ps->vbase + DATA_RO_OFFSET(bank)) & BIT(pin)) in ps_gpio_get_value()
56 uint32_t pin = 0; in ps_gpio_set_value() local
62 amd_gpio_get_bank_and_pin(ps->bdata, gpio_pin, &bank, &pin); in ps_gpio_set_value()
64 if (pin < GPIO_NUM_MAX) { in ps_gpio_set_value()
67 pin -= GPIO_NUM_MAX; in ps_gpio_set_value()
77 lvl = ~BIT32(pin + GPIO_NUM_MAX) & in ps_gpio_set_value()
78 (SHIFT_U32(lvl, pin) | GPIO_UPPER_MASK); in ps_gpio_set_value()
87 uint32_t pin = 0; in ps_gpio_get_dir() local
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H A Dgpio_common.c17 uint32_t *bank, uint32_t *pin) in amd_gpio_get_bank_and_pin() argument
27 *pin = gpio - bdata->bank_min[i]; in amd_gpio_get_bank_and_pin()
48 if (gpio->pin >= amd->bdata->ngpio) { in amd_gpio_get_dt()
H A Dgpio_private.h50 uint32_t *bank, uint32_t *pin);
/optee_os/core/drivers/
H A Dversal_gpio.c74 uint32_t *bank, uint32_t *pin) in versal_gpio_get_pin() argument
89 *pin = gpio - platdata->p_data->bank_min[bnk]; in versal_gpio_get_pin()
102 uint32_t pin = 0; in versal_gpio_get_value() local
104 versal_gpio_get_pin(chip, gpio, &bank, &pin); in versal_gpio_get_value()
106 return (io_read32(chip->base + DATA_RO_OFFSET(bank)) >> pin) & 1; in versal_gpio_get_value()
114 uint32_t pin = 0; in versal_gpio_set_value() local
116 versal_gpio_get_pin(chip, gpio, &bank, &pin); in versal_gpio_set_value()
130 val = ~BIT32(pin + VERSAL_GPIO_MID_PIN) & in versal_gpio_set_value()
131 (SHIFT_U32(val, pin) | VERSAL_GPIO_UPPER_MASK); in versal_gpio_set_value()
141 uint32_t pin = 0; in versal_gpio_set_direction() local
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H A Dstm32_gpio.c148 uint8_t pin; member
351 unsigned int pin);
360 unsigned int shift_1b = gpio->pin; in stm32_gpio_configure()
361 unsigned int shift_2b = SHIFT_U32(gpio->pin, 1); in stm32_gpio_configure()
408 state->gpio_pinctrl.pin == gpio->pin) { in stm32_gpio_put_gpio()
412 release_rif_semaphore_if_acquired(bank, gpio->pin); in stm32_gpio_put_gpio()
449 static bool pin_is_accessible(struct stm32_gpio_bank *bank, unsigned int pin) in pin_is_accessible() argument
460 cidcfgr = io_read32(bank->base + GPIO_CIDCFGR(pin)); in pin_is_accessible()
480 unsigned int pin) in acquire_rif_semaphore_if_needed() argument
492 cidcfgr = io_read32(bank->base + GPIO_CIDCFGR(pin)); in acquire_rif_semaphore_if_needed()
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H A Dbcm_gpio.c20 #define GPIO_BANK(pin) ((pin) / NGPIOS_PER_BANK) argument
22 #define IPROC_GPIO_REG(pin, reg) ((reg) + \ argument
23 GPIO_BANK(pin) * GPIO_BANK_SIZE)
25 #define IPROC_GPIO_SHIFT(pin) ((pin) % NGPIOS_PER_BANK) argument
29 #define IPROC_GPIO_SEC_CFG_REG(pin) \ argument
30 (((GPIO_BANK_CNT - 1) - GPIO_BANK(pin)) * SEC_GPIO_SIZE)
34 struct bcm_gpio_chip *bcm_gpio_pin_to_chip(unsigned int pin) in bcm_gpio_pin_to_chip() argument
39 if ((pin >= gc->gpio_base) && in bcm_gpio_pin_to_chip()
40 (pin < (gc->gpio_base + gc->ngpios))) in bcm_gpio_pin_to_chip()
H A Dls_sfp.c154 uint32_t pin = gpio_info.gpio_pin; in ls_sfp_program_fuses() local
162 (uint32_t)gpio_info.gpio_chip.gpio_controller, pin); in ls_sfp_program_fuses()
163 gc->ops->set_direction(gc, pin, GPIO_DIR_OUT); in ls_sfp_program_fuses()
164 gc->ops->set_value(gc, pin, GPIO_LEVEL_HIGH); in ls_sfp_program_fuses()
166 if (gc->ops->get_value(gc, pin) != GPIO_LEVEL_HIGH) { in ls_sfp_program_fuses()
189 gpio_info.gpio_chip.gpio_controller, pin); in ls_sfp_program_fuses()
190 gc->ops->set_value(gc, pin, GPIO_LEVEL_LOW); in ls_sfp_program_fuses()
191 gc->ops->set_direction(gc, pin, GPIO_DIR_IN); in ls_sfp_program_fuses()
H A Dstm32_tamp.c327 uint8_t pin; member
483 .id = EXT_TAMP1, .bank = GPIO_BANK('C'), .pin = 13,
487 .id = EXT_TAMP1, .bank = GPIO_BANK('F'), .pin = 10,
491 .id = EXT_TAMP2, .bank = GPIO_BANK('A'), .pin = 6,
495 .id = EXT_TAMP2, .bank = GPIO_BANK('I'), .pin = 1,
499 .id = EXT_TAMP3, .bank = GPIO_BANK('C'), .pin = 0,
503 .id = EXT_TAMP3, .bank = GPIO_BANK('I'), .pin = 2,
507 .id = EXT_TAMP4, .bank = GPIO_BANK('G'), .pin = 8,
511 .id = EXT_TAMP4, .bank = GPIO_BANK('I'), .pin = 3,
538 .id = EXT_TAMP1, .bank = GPIO_BANK('C'), .pin = 13,
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H A Datmel_piobu.c24 #define SECUMOD_PIN_VAL(pin) BIT(SECUMOD_PIN_SHIFT + (pin)) argument
243 if (gpio_protected & BIT32(gpio->pin)) { in secumod_dt_get()
/optee_os/core/include/drivers/
H A Dstm32_gpio.h28 unsigned int *bank, unsigned int *pin,
39 unsigned int *pin __unused, in stm32_gpio_pinctrl_bank_pin()
H A Dgpio.h113 unsigned int pin; member
124 gpio->chip->ops->set_direction(gpio->chip, gpio->pin, dir); in gpio_set_direction()
129 return gpio->chip->ops->get_direction(gpio->chip, gpio->pin); in gpio_get_direction()
137 gpio->chip->ops->set_value(gpio->chip, gpio->pin, value); in gpio_set_value()
144 value = gpio->chip->ops->get_value(gpio->chip, gpio->pin); in gpio_get_value()
H A Dbcm_gpio.h30 struct bcm_gpio_chip *bcm_gpio_pin_to_chip(unsigned int pin);
/optee_os/core/pta/tests/
H A Ddt_driver_test.c636 unsigned int pin; member
651 if (dtg->pin != gpio_pin) in dt_test_gpio_get_direction()
663 if (dtg->pin != gpio_pin) in dt_test_gpio_set_direction()
672 if (dtg->pin != gpio_pin) in dt_test_gpio_get_value()
684 if (dtg->pin != gpio_pin) in dt_test_gpio_set_value()
706 switch (gpio->pin) { in dt_test_gpio_get_dt()
724 EMSG("Unexpected pin ID %u", gpio->pin); in dt_test_gpio_get_dt()
749 gpios[0].pin = DT_TEST_GPIO0_PIN; in dt_test_gpio_provider_probe()
753 gpios[1].pin = DT_TEST_GPIO1_PIN; in dt_test_gpio_provider_probe()
/optee_os/ta/pkcs11/src/
H A Dpersistent_token.c74 static enum pkcs11_rc do_hash(uint32_t user, const uint8_t *pin, in do_hash() argument
88 res = TEE_DigestDoFinal(oh, pin, pin_size, hash, &sz); in do_hash()
98 enum pkcs11_rc hash_pin(enum pkcs11_user_type user, const uint8_t *pin, in hash_pin() argument
109 rc = do_hash(user, pin, pin_size, s, hash); in hash_pin()
115 enum pkcs11_rc verify_pin(enum pkcs11_user_type user, const uint8_t *pin, in verify_pin() argument
122 rc = do_hash(user, pin, pin_size, salt, tmp_hash); in verify_pin()
155 const uint8_t *pin, in setup_identity_auth_from_pin() argument
168 if (!pin) { in setup_identity_auth_from_pin()
183 TEE_MemMove(acl_string, pin, pin_size); in setup_identity_auth_from_pin()
H A Dpkcs11_token.c832 void *pin = NULL; in entry_ck_token_initialize() local
852 rc = serialargs_get_ptr(&ctrlargs, &pin, pin_size); in entry_ck_token_initialize()
890 rc = verify_pin(PKCS11_CKU_SO, pin, pin_size, in entry_ck_token_initialize()
914 if (IS_ENABLED(CFG_PKCS11_TA_AUTH_TEE_IDENTITY) && !pin) { in entry_ck_token_initialize()
928 rc = hash_pin(PKCS11_CKU_SO, pin, pin_size, in entry_ck_token_initialize()
1099 void *pin = NULL; in entry_ck_init_pin() local
1114 rc = serialargs_get_ptr(&ctrlargs, &pin, pin_size); in entry_ck_init_pin()
1128 return set_pin(session, pin, pin_size, PKCS11_CKU_USER); in entry_ck_init_pin()
1132 uint8_t *pin, size_t pin_size) in check_so_pin() argument
1161 rc = verify_pin(PKCS11_CKU_SO, pin, pin_size, in check_so_pin()
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H A Dpkcs11_token.h217 enum pkcs11_rc hash_pin(enum pkcs11_user_type user, const uint8_t *pin,
220 enum pkcs11_rc verify_pin(enum pkcs11_user_type user, const uint8_t *pin,
228 const uint8_t *pin,
242 const uint8_t *pin __unused, in setup_identity_auth_from_pin()
/optee_os/core/arch/arm/dts/
H A Dat91-sama5d27_wlsom1_ek.dts89 * There is no real pinmux for ADC, if the pin
95 * state when the pin is not muxed to the adc.
H A Dat91-sama5d2_xplained.dts424 * There is no real pinmux for ADC, if the pin
430 * state when the pin is not muxed to the adc.
450 * The ADTRG pin can work on any edge type.
H A Dstm32mp135f-dk.dts155 st,wakeup-pin-number = <1>;
H A Dstm32mp131.dtsi417 pinctrl: pin-controller@50002000 {
/optee_os/core/drivers/gpio/
H A Dgpio.c27 gpio->pin = pargs->args[0]; in gpio_dt_alloc_pin()