History log of /optee_os/core/drivers/stm32_gpio.c (Results 1 – 25 of 53)
Revision Date Author Comments
# 3f8e5418 06-May-2025 Patrick Delaunay <patrick.delaunay@foss.st.com>

drivers: stm32_gpio: move dt_flags support in the new ops configure

Move the GPIO configuration based on dt_flags previously done in
get_dt ops in the new gpio configure ops.

To avoid glitch on GPI

drivers: stm32_gpio: move dt_flags support in the new ops configure

Move the GPIO configuration based on dt_flags previously done in
get_dt ops in the new gpio configure ops.

To avoid glitch on GPIO line, the write in register GPIO_MODER is only
kept in the ops stm32_gpio_set_direction(), called by gpio framework
function gpio_configure() after the call of configure ops, so
we have no more transient GPIO input configuration.

Moreover, this patch allows to correctly apply the dt_flags when
they are modify after the call of stm32_gpio_get_dt(),
for example in drivers regulator fixed and gpio.

Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com>
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# b290af13 26-Jun-2025 Thomas Bourgoin <thomas.bourgoin@foss.st.com>

core: drivers: allow to configure RIF for GPIO not on the SoC package

The number of GPIO physically accessible depends on package.
Some GPIO pins might not be accessible but it is still possible to

core: drivers: allow to configure RIF for GPIO not on the SoC package

The number of GPIO physically accessible depends on package.
Some GPIO pins might not be accessible but it is still possible to write
RIF registers to block access.

The assert(nb_rif_conf <= bank->ngpios) mandate to have less or the same
number of RIF configuration than the number of GPIO pin describe with
the property gpio-ranges to have the same number.

Remove the assert and replace() it with MIN() to be less restrictive.

Fixes: bd03c8c3d70f ("drivers: stm32_gpio: add stm32mp25x support")
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 61bf256a 28-May-2025 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper

Add stm32_gpio_get_bank_id() helper function to get the STM32
GPIO bank ID related to its GPIO chip

Signed-off-by: Gatien Chevallier <gatien

drivers: stm32_gpio: add stm32_gpio_get_bank_id() helper

Add stm32_gpio_get_bank_id() helper function to get the STM32
GPIO bank ID related to its GPIO chip

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# c43b8cf7 11-Mar-2025 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: remove test on CFG_DRIVERS_GPIO

Remove test on CFG_DRIVERS_GPIO inside stm32_gpio.c C source file.
CFG_* dependencies are addressed in makefile file (e.g. plat-*/conf.mk),
not i

drivers: stm32_gpio: remove test on CFG_DRIVERS_GPIO

Remove test on CFG_DRIVERS_GPIO inside stm32_gpio.c C source file.
CFG_* dependencies are addressed in makefile file (e.g. plat-*/conf.mk),
not in the driver source file.

Fixes: 1001585e2e56 ("drivers: stm32_gpio: remove GPIO access specific API functions")
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jerome Forissier <jerome.forissier@linaro.org>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# 40848ef1 23-Oct-2024 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: shared_resources: remove pin/GPIO secure state management

Remove the pin and GPIO secure state management from shared_resources
platform driver since this is now managed using the fir

plat-stm32mp1: shared_resources: remove pin/GPIO secure state management

Remove the pin and GPIO secure state management from shared_resources
platform driver since this is now managed using the firewall framework.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# b3f7ebef 04-Jul-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO a

drivers: stm32_gpio: remove gpio/pinctrl API function to set secure state

Remove stm32_gpio_set_secure_cfg() and stm32_pinctrl_set_secure_cfg()
functions that are no more used since the STM32 GPIO and pins secure
configurations are managed only through the firewall framework
facilities.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 5f27da69 23-Oct-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: check secure state of pinctrl states

Make STM32 GPIO driver to verify that any all pins of applied pinctrl
states be accessed and has the expected secure hardening configuration

drivers: stm32_gpio: check secure state of pinctrl states

Make STM32 GPIO driver to verify that any all pins of applied pinctrl
states be accessed and has the expected secure hardening configuration
when used.

Non-secure pins must have the STM32_PIN_NSEC bit set in the pin
handler argument unless what the pin is expected to be secure. The
driver returns an error when the expected secure state of a pin does
not match its effective secure state or it cannot be accessed, unless
CFG_INSECURE is enabled in which case the driver only prints an info
level trace message.

If a driver attempts to consume a pinctrl with pins that do not exist,
core panics.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 4675225e 05-Dec-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: check secure state of consumed GPIOs

STM32 GPIO driver now verifies that any GPIO consumed by OP-TEE can
be accessed and has the expected secure hardening configuration.
If a dr

drivers: stm32_gpio: check secure state of consumed GPIOs

STM32 GPIO driver now verifies that any GPIO consumed by OP-TEE can
be accessed and has the expected secure hardening configuration.
If a driver attempts to consume a GPIO that cannot be accessed
by OP-TEE, core panics. When a GPIO is used with an inappropriate
secure configuration state, STM32 GPIO driver panics or prints an
info level message, depending on CFG_INSECURE.

This change is based on the recently added GPIO_STM32_NSEC bindings macro
in STM32 GPIO driver DT bindings header file that is a hint on whether
a consumed GPIO is expected secure or shared with non-secure world.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 430c415a 19-Jul-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: acquire semaphore when GPIO/pinctrl are used

Release RIF semaphore taken at GPIO bank initialization and acquire
them only when the GPIO or pinctrl is used or when a firewall
co

drivers: stm32_gpio: acquire semaphore when GPIO/pinctrl are used

Release RIF semaphore taken at GPIO bank initialization and acquire
them only when the GPIO or pinctrl is used or when a firewall
configuration is requested.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# a650c9cb 02-Sep-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: register to firewall framework

Register secure aware STM32 GPIO banks to the firewall framework
as a firewall controller to allow GPIO and pinctrl consumer devices
to load alter

drivers: stm32_gpio: register to firewall framework

Register secure aware STM32 GPIO banks to the firewall framework
as a firewall controller to allow GPIO and pinctrl consumer devices
to load alternate configurations for pins.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# a72f07da 02-Sep-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: factorize apply_rif_config()

Change apply_rif_config() to be able to call it for a subset of pins
in a GPIO bank.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: factorize apply_rif_config()

Change apply_rif_config() to be able to call it for a subset of pins
in a GPIO bank.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 7761b658 19-Jul-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: check GPIO is not already consumed

Check that a GPIO requested by a consumer is not already consumed by
another device.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.s

drivers: stm32_gpio: check GPIO is not already consumed

Check that a GPIO requested by a consumer is not already consumed by
another device.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>

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# 9def1fb7 13-Nov-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: update and fix RIF configuration handling

The conditions to acquire or release RIF semaphores when applying
the CID filtering configuration were incorrect. Add
handle_available_

drivers: stm32_gpio: update and fix RIF configuration handling

The conditions to acquire or release RIF semaphores when applying
the CID filtering configuration were incorrect. Add
handle_available_semaphores() to handle correctly the RIF semaphores.
Also remove FMC_NB_MAX_CID_SUPPORTED and use generic MAX_CID_SUPPORTED.

Also add a dummy apply_rif_config() when CFG_STM32_RIF is not defined.

Fix unfreed banks when they are removed from the bank list.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: bd03c8c3d70f ("drivers: stm32_gpio: add stm32mp25x support")

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# 646ad62b 13-Nov-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when deali

drivers: stm32_rif: update and fix RIF configuration parsing

Fix the parsing of the RIF configuration by using device tree bindings,
when necessary. Generalize RIF bit fields and use them when dealing
with generic RIF functions. Update drivers that use stm32_rif_parse_cfg()
accordingly.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
Fixes: 1506f47af917 ("drivers: firewall: add stm32_rif driver for common RIF features")

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# 6a0116ed 04-Oct-2024 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienn

drivers: use fdt_reg_info()

Use fdt_reg_info() instead of fdt_reg_base_address() and fdt_reg_size()
to optimize look up in the DT due to finding parent node.

Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
Acked-by: Jens Wiklander <jens.wiklander@linaro.org>

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# bfc43b68 28-Aug-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: save/restore consumed GPIOs in PM sequence

Save and restore during PM suspend/resume sequences the state of the
consumed GPIOs.

Consumers are expected to get their GPIOs using

drivers: stm32_gpio: save/restore consumed GPIOs in PM sequence

Save and restore during PM suspend/resume sequences the state of the
consumed GPIOs.

Consumers are expected to get their GPIOs using the DT resources hence
register a PM handle when the GPIO is requested (stm32_gpio_get_dt()) so
that the dependency order established during drivers initialization is
satisfied during PM suspend and resume sequences. PM handle is
unregistered when consumer releases the GPIO which requires the handles
to be referenced in a list so that we can find it back.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# bd03c8c3 28-Aug-2024 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: add stm32mp25x support

Add support for stm32mp25x platforms by adding RIF support to the driver.
GPIO banks are RIF-aware peripherals, meaning that they are responsible
for sett

drivers: stm32_gpio: add stm32mp25x support

Add support for stm32mp25x platforms by adding RIF support to the driver.
GPIO banks are RIF-aware peripherals, meaning that they are responsible
for setting their own RIF configuration.

While there, remove the use of set_bank_gpio_non_secure() as it is of no
use since a pin not configured as secured in the device tree will already
result being non-secure.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# b4893304 14-Dec-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: add secure configuration for GPIOs

This change adds security support for GPIOS. A bank of GPIO now has a
secure support and configuration.

Secure support is defined in the devi

drivers: stm32_gpio: add secure configuration for GPIOs

This change adds security support for GPIOS. A bank of GPIO now has a
secure support and configuration.

Secure support is defined in the device tree. If a GPIO bank is defined
as secure, the secure configuration is read through st,protreg device
tree property and is applied during probe.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 5eed568c 19-Jan-2022 Gatien Chevallier <gatien.chevallier@st.com>

drivers: stm32_gpio: fix coding style issues

Prefer U(x) in definition of macros for unsigned ints.

Signed-off-by: Gatien Chevallier <gatien.chevallier@st.com>
Reviewed-by: Etienne Carriere <etienn

drivers: stm32_gpio: fix coding style issues

Prefer U(x) in definition of macros for unsigned ints.

Signed-off-by: Gatien Chevallier <gatien.chevallier@st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 580e08cf 18-Dec-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: fix iteration in set_bank_gpio_non_secure()

The for loop iterates over one too many elements.

Fixes: be53ee7b15f6 ("plat-stm32mp1: fix default setting GPIO as non-secure")
Sign

drivers: stm32_gpio: fix iteration in set_bank_gpio_non_secure()

The for loop iterates over one too many elements.

Fixes: be53ee7b15f6 ("plat-stm32mp1: fix default setting GPIO as non-secure")
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 8370badb 30-Oct-2023 Gatien Chevallier <gatien.chevallier@foss.st.com>

drivers: stm32_gpio: remove unused APIs

Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count()
APIs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Eti

drivers: stm32_gpio: remove unused APIs

Remove unused stm32_get_gpio_bank_offset() and stm32_get_gpio_count()
APIs.

Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# e569f6ad 05-Oct-2023 Etienne Carriere <etienne.carriere@foss.st.com>

plat-stm32mp1: shared_resources: simplify GPIOZ bank pin count

Changes initialization of GPIOZ bank pin count from the DT bank
node now using the GPIO bank driver probing to get and save the
informa

plat-stm32mp1: shared_resources: simplify GPIOZ bank pin count

Changes initialization of GPIOZ bank pin count from the DT bank
node now using the GPIO bank driver probing to get and save the
information rather than service_init() initcall level as prior
this change.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Acked-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 69715ce9 25-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: move definitions to source file

Moves macros and structures definitions from stm32_gpio.h header file
to the driver source file as these definition do not need to be
visible fro

drivers: stm32_gpio: move definitions to source file

Moves macros and structures definitions from stm32_gpio.h header file
to the driver source file as these definition do not need to be
visible from other drivers thank to pin control abstraction.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 2c2f848f 25-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

drivers: stm32_gpio: remove cases when CFG_DRIVERS_PINCTRL is disabled

Removes implementation when CFG_DRIVERS_PINCTRL is disables as stm32mp1
platform configuration enforces the switch is enabled.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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# 7f823a77 26-May-2023 Etienne Carriere <etienne.carriere@foss.st.com>

drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()

Adds helper function stm32_pinctrl_set_secure_cfg() to set the
GPIO pin secure state (secure or non-secure) for each pin refer

drivers: stm32_gpio: add helper function stm32_pinctrl_set_secure_cfg()

Adds helper function stm32_pinctrl_set_secure_cfg() to set the
GPIO pin secure state (secure or non-secure) for each pin referenced
by a pin control state.

Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>

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