| #
078e2ad4 |
| 03-Jul-2025 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: remove activation of RTC nodes at board level
Remove unnecessary activation of RTC in stm32mp15xxdkx.dtsi and stm32mp135f-dk.dts. RTC node is default enabled in stm32mp131.dtsi and stm32
dts: stm32: remove activation of RTC nodes at board level
Remove unnecessary activation of RTC in stm32mp15xxdkx.dtsi and stm32mp135f-dk.dts. RTC node is default enabled in stm32mp131.dtsi and stm32mp151.dtsi.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
506dc87b |
| 28-May-2025 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add tamper event detection configuration for stm32mp135f-dk
Add and default enable support for the TAMP button present on the stm32mp135f-dk board. It relies on the external tamper 2. Se
dts: stm32: add tamper event detection configuration for stm32mp135f-dk
Add and default enable support for the TAMP button present on the stm32mp135f-dk board. It relies on the external tamper 2. Set GPIOA6 as secure as it now serve this purpose.
Add and default disable support for a test setup of an active tamper event detection that is feasible with the GPIO expansion present on the stm32mp135f-dk board.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
fb484158 |
| 25-Nov-2024 |
Pascal Paillet <p.paillet@foss.st.com> |
dts: stm32: describe CPU OPP for STM32MP13
Describe CPU operating points for STM32MP13 boards.
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@fos
dts: stm32: describe CPU OPP for STM32MP13
Describe CPU operating points for STM32MP13 boards.
Acked-by: Etienne Carriere <etienne.carriere@foss.st.com> Signed-off-by: Pascal Paillet <p.paillet@foss.st.com>
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| #
fc3dc05a |
| 20-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: enable HASH on stm32mp135f-dk
Sets HASH peripheral status to okay.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
14744162 |
| 23-Feb-2024 |
Thomas Bourgoin <thomas.bourgoin@foss.st.com> |
dts: stm32: enable PKA on stm32mp135f-dk
Sets PKA peripheral status to okay.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com
dts: stm32: enable PKA on stm32mp135f-dk
Sets PKA peripheral status to okay.
Signed-off-by: Thomas Bourgoin <thomas.bourgoin@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Reviewed-by: Gatien Chevallier <gatien.chevallier@foss.st.com>
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| #
78363cc5 |
| 02-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: secure optee_framebuffer memory region on stm32mp135f-dk
Add support for the TZC400 configuration for the optee_framebuffer memory region on the stm32mp135f-dk board
Signed-off-by: Gati
dts: stm32: secure optee_framebuffer memory region on stm32mp135f-dk
Add support for the TZC400 configuration for the optee_framebuffer memory region on the stm32mp135f-dk board
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
41115447 |
| 02-May-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add the ETZPC configuration table for stm32mp1x boards
Add the tables defining the ETZPC firewall controller configuration that will be set at boot time on stm32mp1x boards.
Signed-off-
dts: stm32: add the ETZPC configuration table for stm32mp1x boards
Add the tables defining the ETZPC firewall controller configuration that will be set at boot time on stm32mp1x boards.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com> Acked-by: Johann Neuhauser <jneuhauser@dh-electronics.com>
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| #
c3e0dd4c |
| 02-Oct-2024 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: disable ADC2 on stm32mp135f-dk
Remove ADC2 configuration in stm32mp135-dk.dts since OP-TEE does not use the device.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Revi
dts: stm32: disable ADC2 on stm32mp135f-dk
Remove ADC2 configuration in stm32mp135-dk.dts since OP-TEE does not use the device.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
e89ae2ca |
| 14-Dec-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: secure pins for peripherals used in the secure world
These pins are used by RCC MCO and the I2C4. As these peripherals are used in OP-TEE, secure them.
Signed-off-by: Gatien Chevallier
dts: stm32: secure pins for peripherals used in the secure world
These pins are used by RCC MCO and the I2C4. As these peripherals are used in OP-TEE, secure them.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
053956b0 |
| 02-Nov-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp13: IO domain regulators
Define STM32MP13 IO domains regulators of the stm32mp13f-dk board based on recently merge stm32mp1_regulator_io driver.
Acked-by: Patrick Delaunay <patrick.dela
dts: stm32mp13: IO domain regulators
Define STM32MP13 IO domains regulators of the stm32mp13f-dk board based on recently merge stm32mp1_regulator_io driver.
Acked-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
f55e624a |
| 02-Jun-2023 |
Etienne Carriere <etienne.carriere@foss.st.com> |
dts: stm32mp13: update stm32mp13 SoC and board DTS files
Updates STM32MP13* SoC DTSI files and STM32MP135F-DK board DTS file and related DT binding header files.
Acked-by: Gatien Chevallier <gatien
dts: stm32mp13: update stm32mp13 SoC and board DTS files
Updates STM32MP13* SoC DTSI files and STM32MP135F-DK board DTS file and related DT binding header files.
Acked-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Etienne Carriere <etienne.carriere@foss.st.com>
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| #
3f9d692c |
| 25-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: fix indentation and remove unused uart8 for STM32MP135F-DK
Removes uart8 node as it is unused.
Fixes indentation issue for reserved-memory node.
Signed-off-by: Gatien Chevallier <gatie
dts: stm32: fix indentation and remove unused uart8 for STM32MP135F-DK
Removes uart8 node as it is unused.
Fixes indentation issue for reserved-memory node.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
eb243bce |
| 18-Jan-2023 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
plat-stm32mp1: enable hardware rng for STM32MP13
Adds RNG node in stm32mp131.dtsi and enables it in stm32mp135f-dk.dts.
Default disables CFG_WITH_SOFTWARE_PRNG for STM32MP13: OP-TEE uses the HW RNG
plat-stm32mp1: enable hardware rng for STM32MP13
Adds RNG node in stm32mp131.dtsi and enables it in stm32mp135f-dk.dts.
Default disables CFG_WITH_SOFTWARE_PRNG for STM32MP13: OP-TEE uses the HW RNG support.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
0ec45216 |
| 12-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
drivers: stm32_bsec: st,non-secure-otp-provisioning property
Implementation of a new "st,non-secure-provisioning-otp" property, destined for non-secure OTP access with restrictions. At BSEC initiali
drivers: stm32_bsec: st,non-secure-otp-provisioning property
Implementation of a new "st,non-secure-provisioning-otp" property, destined for non-secure OTP access with restrictions. At BSEC initialization, OTPs defined with this property will grant their access to non-secure world only if the fuses are not permanently locked.
Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Reviewed-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
b867b07e |
| 07-Dec-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add nvmem layout
Add the nvmem layout for each BSEC associated fuses, update the SOC and ST boards device trees with OTP cells node.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.s
dts: stm32: add nvmem layout
Add the nvmem layout for each BSEC associated fuses, update the SOC and ST boards device trees with OTP cells node.
Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Signed-off-by: Patrick Delaunay <patrick.delaunay@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org>
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| #
40cc9401 |
| 06-Jul-2022 |
Gatien Chevallier <gatien.chevallier@foss.st.com> |
dts: stm32: add initial support of STM32MP135F-DK board
Add support of STM32MP135F discovery board (part number: STM32MP135F-DK) that integrates a STM32MP135F SoC with 512 MB of DDR3.
The board pro
dts: stm32: add initial support of STM32MP135F-DK board
Add support of STM32MP135F discovery board (part number: STM32MP135F-DK) that integrates a STM32MP135F SoC with 512 MB of DDR3.
The board provides SDcard and USB mass storage as persistent storage device interfaces.
Co-developed-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Alexandre Torgue <alexandre.torgue@foss.st.com> Signed-off-by: Gatien Chevallier <gatien.chevallier@foss.st.com> Signed-off-by: Lionel Debieve <lionel.debieve@foss.st.com> Acked-by: Etienne Carriere <etienne.carriere@linaro.org> Acked-by: Jens Wiklander <jens.wiklander@linaro.org>
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