1*d3c37848SAkshay Belsare // SPDX-License-Identifier: BSD-2-Clause
2*d3c37848SAkshay Belsare /*
3*d3c37848SAkshay Belsare * Copyright (C) 2002-2021 Xilinx, Inc. All rights reserved.
4*d3c37848SAkshay Belsare * Copyright (c) 2022 Foundries.io Ltd. (jorge@foundries.io)
5*d3c37848SAkshay Belsare * Copyright (c) 2024-2025, Advanced Micro Devices, Inc. All rights reserved.
6*d3c37848SAkshay Belsare *
7*d3c37848SAkshay Belsare */
8*d3c37848SAkshay Belsare
9*d3c37848SAkshay Belsare #include <assert.h>
10*d3c37848SAkshay Belsare #include <kernel/panic.h>
11*d3c37848SAkshay Belsare #include <malloc.h>
12*d3c37848SAkshay Belsare #include <trace.h>
13*d3c37848SAkshay Belsare
14*d3c37848SAkshay Belsare #include "gpio_private.h"
15*d3c37848SAkshay Belsare
amd_gpio_get_bank_and_pin(struct amd_gbank_data * bdata,uint32_t gpio,uint32_t * bank,uint32_t * pin)16*d3c37848SAkshay Belsare void amd_gpio_get_bank_and_pin(struct amd_gbank_data *bdata, uint32_t gpio,
17*d3c37848SAkshay Belsare uint32_t *bank, uint32_t *pin)
18*d3c37848SAkshay Belsare {
19*d3c37848SAkshay Belsare uint32_t i = 0;
20*d3c37848SAkshay Belsare
21*d3c37848SAkshay Belsare assert(gpio < bdata->ngpio);
22*d3c37848SAkshay Belsare
23*d3c37848SAkshay Belsare for (i = 0; i < bdata->max_bank; i++) {
24*d3c37848SAkshay Belsare if (gpio >= bdata->bank_min[i] &&
25*d3c37848SAkshay Belsare gpio <= bdata->bank_max[i]) {
26*d3c37848SAkshay Belsare *bank = i;
27*d3c37848SAkshay Belsare *pin = gpio - bdata->bank_min[i];
28*d3c37848SAkshay Belsare return;
29*d3c37848SAkshay Belsare }
30*d3c37848SAkshay Belsare }
31*d3c37848SAkshay Belsare
32*d3c37848SAkshay Belsare /* Ideally, should never reach over here */
33*d3c37848SAkshay Belsare EMSG("Invalid GPIO pin number: %"PRIu32, gpio);
34*d3c37848SAkshay Belsare panic();
35*d3c37848SAkshay Belsare }
36*d3c37848SAkshay Belsare
amd_gpio_get_dt(struct dt_pargs * pargs,void * data,struct gpio ** out_gpio)37*d3c37848SAkshay Belsare TEE_Result amd_gpio_get_dt(struct dt_pargs *pargs, void *data,
38*d3c37848SAkshay Belsare struct gpio **out_gpio)
39*d3c37848SAkshay Belsare {
40*d3c37848SAkshay Belsare TEE_Result res = TEE_ERROR_GENERIC;
41*d3c37848SAkshay Belsare struct amd_gpio_info *amd = (struct amd_gpio_info *)data;
42*d3c37848SAkshay Belsare struct gpio *gpio = NULL;
43*d3c37848SAkshay Belsare
44*d3c37848SAkshay Belsare res = gpio_dt_alloc_pin(pargs, &gpio);
45*d3c37848SAkshay Belsare if (res)
46*d3c37848SAkshay Belsare return res;
47*d3c37848SAkshay Belsare
48*d3c37848SAkshay Belsare if (gpio->pin >= amd->bdata->ngpio) {
49*d3c37848SAkshay Belsare DMSG("GPIO is outside of GPIO Range");
50*d3c37848SAkshay Belsare free(gpio);
51*d3c37848SAkshay Belsare return TEE_ERROR_GENERIC;
52*d3c37848SAkshay Belsare }
53*d3c37848SAkshay Belsare
54*d3c37848SAkshay Belsare gpio->chip = &amd->chip;
55*d3c37848SAkshay Belsare *out_gpio = gpio;
56*d3c37848SAkshay Belsare
57*d3c37848SAkshay Belsare return TEE_SUCCESS;
58*d3c37848SAkshay Belsare }
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