xref: /optee_os/core/include/drivers/bcm_gpio.h (revision fbe66cf83199aa6a2aca9f93384cf1ad9185a5f6)
1e61fc00fSSandeep Tripathy /* SPDX-License-Identifier: BSD-2-Clause */
2e61fc00fSSandeep Tripathy /*
3e61fc00fSSandeep Tripathy  * Copyright 2019 Broadcom.
4e61fc00fSSandeep Tripathy  */
5e61fc00fSSandeep Tripathy 
6*fbe66cf8SEtienne Carriere #ifndef __DRIVERS_BCM_GPIO_H
7*fbe66cf8SEtienne Carriere #define __DRIVERS_BCM_GPIO_H
8e61fc00fSSandeep Tripathy 
96dcd18c8SClément Léger #include <drivers/gpio.h>
10e61fc00fSSandeep Tripathy #include <stdlib.h>
11e61fc00fSSandeep Tripathy #include <sys/queue.h>
12e61fc00fSSandeep Tripathy 
13e61fc00fSSandeep Tripathy /**
14e61fc00fSSandeep Tripathy  * struct bcm_gpio_chip describes GPIO controller chip instance
15e61fc00fSSandeep Tripathy  * @chip:       generic GPIO chip handle.
16e61fc00fSSandeep Tripathy  * @gpio_base:  starting GPIO number managed by this GPIO controller.
17e61fc00fSSandeep Tripathy  * @ngpios:     number of GPIOs managed by this GPIO controller.
18e61fc00fSSandeep Tripathy  * @base:       virtual base address of the GPIO controller registers.
19e61fc00fSSandeep Tripathy  */
20e61fc00fSSandeep Tripathy struct bcm_gpio_chip {
21e61fc00fSSandeep Tripathy 	struct gpio_chip chip;
22e61fc00fSSandeep Tripathy 	unsigned int gpio_base;
23e61fc00fSSandeep Tripathy 	unsigned int ngpios;
24e61fc00fSSandeep Tripathy 	vaddr_t base;
25e61fc00fSSandeep Tripathy 
26e61fc00fSSandeep Tripathy 	SLIST_ENTRY(bcm_gpio_chip) link;
27e61fc00fSSandeep Tripathy };
28e61fc00fSSandeep Tripathy 
299246c1f6SSheetal Tigadoli /* Returns bcm_gpio_chip handle for a GPIO pin */
30e61fc00fSSandeep Tripathy struct bcm_gpio_chip *bcm_gpio_pin_to_chip(unsigned int pin);
319246c1f6SSheetal Tigadoli /* Set gpiopin as secure */
329246c1f6SSheetal Tigadoli void iproc_gpio_set_secure(int gpiopin);
33*fbe66cf8SEtienne Carriere #endif	/* __DRIVERS_BCM_GPIO_H */
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