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/OK3568_Linux_fs/u-boot/arch/x86/include/asm/arch-quark/
H A Dmsg_port.h109 #define msg_port_generic_clrsetbits(type, port, reg, clr, set) \ argument
112 & ~(clr)) | (set))
114 #define msg_port_clrbits(port, reg, clr) \ argument
115 msg_port_generic_clrsetbits(normal, port, reg, clr, 0)
118 #define msg_port_clrsetbits(port, reg, clr, set) \ argument
119 msg_port_generic_clrsetbits(normal, port, reg, clr, set)
121 #define msg_port_alt_clrbits(port, reg, clr) \ argument
122 msg_port_generic_clrsetbits(alt, port, reg, clr, 0)
125 #define msg_port_alt_clrsetbits(port, reg, clr, set) \ argument
126 msg_port_generic_clrsetbits(alt, port, reg, clr, set)
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/OK3568_Linux_fs/u-boot/board/samsung/odroid/
H A Dodroid.c96 unsigned int set, clr, clr_src_cpu, clr_pll_con0, clr_src_dmc; in board_clock_init() local
152 clr = CORE_RATIO(7) | COREM0_RATIO(7) | COREM1_RATIO(7) | in board_clock_init()
156 clrsetbits_le32(&clk->div_cpu0, clr, set); in board_clock_init()
168 clr = COPY_RATIO(7) | HPM_RATIO(7) | CORES_RATIO(7); in board_clock_init()
171 clrsetbits_le32(&clk->div_cpu1, clr, set); in board_clock_init()
224 clr = ACP_RATIO(7) | ACP_PCLK_RATIO(7) | DPHY_RATIO(7) | in board_clock_init()
241 clrsetbits_le32(&clk->div_dmc0, clr, set); in board_clock_init()
248 clr = G2D_ACP_RATIO(15) | C2C_RATIO(7) | PWI_RATIO(15) | in board_clock_init()
264 clrsetbits_le32(&clk->div_dmc1, clr, set); in board_clock_init()
271 clr = UART0_SEL(15) | UART1_SEL(15) | UART2_SEL(15) | in board_clock_init()
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/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-rockchip/
H A Dhardware.h10 #define RK_CLRSETBITS(clr, set) ((((clr) | (set)) << 16) | (set)) argument
12 #define RK_CLRBITS(clr) RK_CLRSETBITS(clr, 0) argument
16 #define rk_clrsetreg(addr, clr, set) \ argument
17 writel((((clr) | (set)) << 16) | (set), addr)
18 #define rk_clrreg(addr, clr) writel((clr) << 16, addr) argument
/OK3568_Linux_fs/kernel/include/trace/events/
H A Dthp.h49 TP_PROTO(unsigned long addr, unsigned long pte, unsigned long clr, unsigned long set),
50 TP_ARGS(addr, pte, clr, set),
54 __field(unsigned long, clr)
61 __entry->clr = clr;
66 …and pte = 0x%lx clr = 0x%lx, set = 0x%lx", __entry->addr, __entry->pte, __entry->clr, __entry->set)
/OK3568_Linux_fs/kernel/arch/arm/mach-rpc/
H A Dirq.c75 unsigned int irq, clr, set; in rpc_init_irq() local
86 clr = IRQ_NOREQUEST; in rpc_init_irq()
90 clr |= IRQ_NOPROBE; in rpc_init_irq()
100 irq_modify_status(irq, clr, set); in rpc_init_irq()
108 irq_modify_status(irq, clr, set); in rpc_init_irq()
116 irq_modify_status(irq, clr, set); in rpc_init_irq()
123 irq_modify_status(irq, clr, set); in rpc_init_irq()
/OK3568_Linux_fs/kernel/arch/sparc/lib/
H A Dffs.S14 clr %o0
21 clr %o1 /* 2 */
25 1: clr %o2
31 clr %o3
34 clr %o4
40 clr %o5
/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dtimer-armada-370-xp.c91 static void local_timer_ctrl_clrset(u32 clr, u32 set) in local_timer_ctrl_clrset() argument
93 writel((readl(local_base + TIMER_CTRL_OFF) & ~clr) | set, in local_timer_ctrl_clrset()
176 u32 clr = 0, set = 0; in armada_370_xp_timer_starting_cpu() local
181 clr = TIMER0_25MHZ; in armada_370_xp_timer_starting_cpu()
182 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_starting_cpu()
245 u32 clr = 0, set = 0; in armada_370_xp_timer_common_init() local
264 clr = TIMER0_25MHZ; in armada_370_xp_timer_common_init()
267 atomic_io_modify(timer_base + TIMER_CTRL_OFF, clr | set, set); in armada_370_xp_timer_common_init()
268 local_timer_ctrl_clrset(clr, set); in armada_370_xp_timer_common_init()
/OK3568_Linux_fs/kernel/arch/m68k/ifpsp060/src/
H A Ditest.S81 clr.l TESTCTR(%a6)
91 clr.l TESTCTR(%a6)
101 clr.l TESTCTR(%a6)
111 clr.l TESTCTR(%a6)
121 clr.l TESTCTR(%a6)
132 clr.l TESTCTR(%a6)
142 clr.l TESTCTR(%a6)
169 clr.l %d1
181 clr.l IREGS+0x8(%a6)
182 clr.l IREGS+0xc(%a6)
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H A Dilsp.S298 clr.l %d1
313 clr.w %d5
327 clr.l DDNORMAL(%a6) # count of shifts for normalization
328 clr.b DDSECOND(%a6) # clear flag for quotient digits
329 clr.l %d1 # %d1 will hold trial quotient
362 clr.w %d6 # word u3 left
405 clr.l %d2
408 clr.w %d3 # %d3 now ls word of divisor
412 clr.w %d3 # %d3 now ms word of divisor
421 clr.l %d1
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/OK3568_Linux_fs/u-boot/drivers/net/
H A Dpic32_eth.c64 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_mii_init()
78 writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */ in pic32_mii_init()
84 writel(EMAC_RMII_RESET, &emac_p->supp.clr); in pic32_mii_init()
142 writel(EMAC_FULLDUP, &emac_p->cfg2.clr); in pic32_mac_adjust_link()
151 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_adjust_link()
197 writel(EMAC_RMII_SPD100, &emac_p->supp.clr); in pic32_mac_init()
239 writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr); in pic32_ctrl_reset()
249 writel(0xffffffff, &ectl_p->irq.clr); in pic32_ctrl_reset()
252 writel(0xffffffff, &ectl_p->txst.clr); in pic32_ctrl_reset()
253 writel(0xffffffff, &ectl_p->rxst.clr); in pic32_ctrl_reset()
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/OK3568_Linux_fs/u-boot/drivers/video/
H A Dconsole_rotate.c15 static int console_set_row_1(struct udevice *dev, uint row, int clr) in console_set_row_1() argument
31 *dst++ = clr; in console_set_row_1()
40 *dst++ = clr; in console_set_row_1()
49 *dst++ = clr; in console_set_row_1()
147 static int console_set_row_2(struct udevice *dev, uint row, int clr) in console_set_row_2() argument
162 *dst++ = clr; in console_set_row_2()
171 *dst++ = clr; in console_set_row_2()
180 *dst++ = clr; in console_set_row_2()
274 static int console_set_row_3(struct udevice *dev, uint row, int clr) in console_set_row_3() argument
289 *dst++ = clr; in console_set_row_3()
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/OK3568_Linux_fs/kernel/arch/m68k/ifpsp060/
H A Dos.S94 clr.l %d1 | return success
101 clr.l %d1 | return success
127 clr.l %d1 | return success
134 clr.l %d1 | return success
151 clr.l %d0 | clear whole longword
152 clr.l %d1 | assume success
187 clr.l %d1 | assume success
188 clr.l %d0 | clear whole longword
223 clr.l %d1 | assume success
245 clr.l %d1 | assume success
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/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/nohash/32/
H A Dpgtable.h248 unsigned long clr, unsigned long set, int huge) in pte_update() argument
252 pte_basic_t new = (old & ~(pte_basic_t)clr) | set; in pte_update()
277 unsigned long clr, unsigned long set, int huge) in pte_update() argument
280 pte_basic_t new = (old & ~(pte_basic_t)clr) | set; in pte_update()
314 unsigned long clr = ~pte_val(pte_wrprotect(__pte(~0))); in ptep_set_wrprotect() local
317 pte_update(mm, addr, ptep, clr, set, 0); in ptep_set_wrprotect()
328 unsigned long clr = ~pte_val(entry) & ~pte_val(pte_clr); in __ptep_set_access_flags() local
331 pte_update(vma->vm_mm, address, ptep, clr, set, huge); in __ptep_set_access_flags()
/OK3568_Linux_fs/kernel/kernel/irq/
H A Ddevres.c236 unsigned int clr; member
244 irq_remove_generic_chip(this->gc, this->msk, this->clr, this->set); in devm_irq_remove_generic_chip()
264 unsigned int clr, unsigned int set) in devm_irq_setup_generic_chip() argument
273 irq_setup_generic_chip(gc, msk, flags, clr, set); in devm_irq_setup_generic_chip()
277 dr->clr = clr; in devm_irq_setup_generic_chip()
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/
H A Dar9003_wow.c127 u32 set, clr; in ath9k_hw_wow_apply_pattern() local
160 clr = AR_WOW_LENGTH1_MASK(pattern_count); in ath9k_hw_wow_apply_pattern()
161 REG_RMW(ah, AR_WOW_LENGTH1, set, clr); in ath9k_hw_wow_apply_pattern()
165 clr = AR_WOW_LENGTH2_MASK(pattern_count); in ath9k_hw_wow_apply_pattern()
166 REG_RMW(ah, AR_WOW_LENGTH2, set, clr); in ath9k_hw_wow_apply_pattern()
170 clr = AR_WOW_LENGTH3_MASK(pattern_count); in ath9k_hw_wow_apply_pattern()
171 REG_RMW(ah, AR_WOW_LENGTH3, set, clr); in ath9k_hw_wow_apply_pattern()
175 clr = AR_WOW_LENGTH4_MASK(pattern_count); in ath9k_hw_wow_apply_pattern()
176 REG_RMW(ah, AR_WOW_LENGTH4, set, clr); in ath9k_hw_wow_apply_pattern()
/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/
H A Ddcr-native.h112 unsigned clr, unsigned set) in __dcri_clrset() argument
120 val = (mfdcrx(base_data) & ~clr) | set; in __dcri_clrset()
124 val = (__mfdcr(base_data) & ~clr) | set; in __dcri_clrset()
138 #define dcri_clrset(base, reg, clr, set) __dcri_clrset(DCRN_ ## base ## _CONFIG_ADDR, \ argument
140 reg, clr, set)
H A Dcode-patching.h50 static inline int modify_instruction(unsigned int *addr, unsigned int clr, in modify_instruction() argument
53 return patch_instruction((struct ppc_inst *)addr, ppc_inst((*addr & ~clr) | set)); in modify_instruction()
56 static inline int modify_instruction_site(s32 *site, unsigned int clr, unsigned int set) in modify_instruction_site() argument
58 return modify_instruction((unsigned int *)patch_site_addr(site), clr, set); in modify_instruction_site()
/OK3568_Linux_fs/kernel/arch/m68k/math-emu/
H A Dfp_util.S70 2: clr.l %d0
99 clr.l %d1 | sign defaults to zero
109 clr.l (%a0)
116 clr.l (%a0)+
117 clr.l (%a0)+
118 clr.l (%a0)
142 clr.l (%a0) | low lword = 0
/OK3568_Linux_fs/debian/packages-patches/pcmanfm/1.3.1-1/
H A D0001-desktop-Support-outline-mode-in-paint_rubber_banding.patch27 …cairo_set_source_rgba(cr, (gdouble)clr.red/65535, (gdouble)clr.green/65536, (gdouble)clr.blue/6553…
35 gdk_cairo_set_source_color(cr, &clr);
/OK3568_Linux_fs/kernel/drivers/gpu/drm/nouveau/dispnv50/
H A Dhead.c42 union nv50_head_atom_mask clr = { in nv50_head_flush_clr() local
43 .mask = asyh->clr.mask & ~(flush ? 0 : asyh->set.mask), in nv50_head_flush_clr()
45 if (clr.crc) nv50_crc_atomic_clr(head); in nv50_head_flush_clr()
46 if (clr.olut) head->func->olut_clr(head); in nv50_head_flush_clr()
47 if (clr.core) head->func->core_clr(head); in nv50_head_flush_clr()
48 if (clr.curs) head->func->curs_clr(head); in nv50_head_flush_clr()
395 asyh->clr.core = true; in nv50_head_atomic_check()
403 asyh->clr.curs = true; in nv50_head_atomic_check()
411 asyh->clr.olut = true; in nv50_head_atomic_check()
414 asyh->clr.olut = armh->olut.visible; in nv50_head_atomic_check()
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H A Dwndw.c127 union nv50_wndw_atom_mask clr = { in nv50_wndw_flush_clr() local
128 .mask = asyw->clr.mask & ~(flush ? 0 : asyw->set.mask), in nv50_wndw_flush_clr()
130 if (clr.sema ) wndw->func-> sema_clr(wndw); in nv50_wndw_flush_clr()
131 if (clr.ntfy ) wndw->func-> ntfy_clr(wndw); in nv50_wndw_flush_clr()
132 if (clr.xlut ) wndw->func-> xlut_clr(wndw); in nv50_wndw_flush_clr()
133 if (clr.csc ) wndw->func-> csc_clr(wndw); in nv50_wndw_flush_clr()
134 if (clr.image) wndw->func->image_clr(wndw); in nv50_wndw_flush_clr()
413 asyw->clr.xlut = armw->xlut.handle != 0; in nv50_wndw_atomic_check_lut()
428 asyw->clr.csc = armw->csc.valid; in nv50_wndw_atomic_check_lut()
501 asyw->clr.ntfy = armw->ntfy.handle != 0; in nv50_wndw_atomic_check()
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/OK3568_Linux_fs/kernel/arch/powerpc/include/asm/book3s/64/
H A Dradix.h148 static inline unsigned long __radix_pte_update(pte_t *ptep, unsigned long clr, in __radix_pte_update() argument
160 : "r" (ptep), "r" (cpu_to_be64(set)), "r" (cpu_to_be64(clr)) in __radix_pte_update()
168 pte_t *ptep, unsigned long clr, in radix__pte_update() argument
174 old_pte = __radix_pte_update(ptep, clr, set); in radix__pte_update()
266 pmd_t *pmdp, unsigned long clr,
/OK3568_Linux_fs/u-boot/common/
H A Dlcd_console_rotation.c32 static inline void console_setrow90(struct console_t *pcons, u32 row, int clr) in console_setrow90() argument
41 *dst-- = clr; in console_setrow90()
87 static inline void console_setrow180(struct console_t *pcons, u32 row, int clr) in console_setrow180() argument
95 *dst++ = clr; in console_setrow180()
134 static inline void console_setrow270(struct console_t *pcons, u32 row, int clr) in console_setrow270() argument
142 *dst++ = clr; in console_setrow270()
/OK3568_Linux_fs/u-boot/drivers/spi/
H A Dbcm63xx_hsspi.c145 uint32_t clr, set; in bcm63xx_hsspi_activate_cs() local
156 clr = SPI_PFL_SIG_LAUNCHRIS_MASK | in bcm63xx_hsspi_activate_cs()
170 clrsetbits_be32(priv->regs + SPI_PFL_SIG_REG(plat->cs), clr, set); in bcm63xx_hsspi_activate_cs()
174 clr = 0; in bcm63xx_hsspi_activate_cs()
178 clr |= BIT(plat->cs); in bcm63xx_hsspi_activate_cs()
184 clr |= BIT(!plat->cs); in bcm63xx_hsspi_activate_cs()
188 clrsetbits_be32(priv->regs + SPI_CTL_REG, clr, set); in bcm63xx_hsspi_activate_cs()
/OK3568_Linux_fs/kernel/drivers/gpio/
H A Dgpio-mmio.c491 void __iomem *clr, in bgpio_setup_io() argument
499 if (set && clr) { in bgpio_setup_io()
501 gc->reg_clr = clr; in bgpio_setup_io()
504 } else if (set && !clr) { in bgpio_setup_io()
601 void __iomem *clr, void __iomem *dirout, void __iomem *dirin, in bgpio_init() argument
621 ret = bgpio_setup_io(gc, dat, set, clr, flags); in bgpio_init()
730 void __iomem *clr; in bgpio_pdev_probe() local
762 clr = bgpio_map(pdev, "clr", sz); in bgpio_pdev_probe()
763 if (IS_ERR(clr)) in bgpio_pdev_probe()
764 return PTR_ERR(clr); in bgpio_pdev_probe()
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