1*4882a593Smuzhiyun|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 2*4882a593Smuzhiyun|MOTOROLA MICROPROCESSOR & MEMORY TECHNOLOGY GROUP 3*4882a593Smuzhiyun|M68000 Hi-Performance Microprocessor Division 4*4882a593Smuzhiyun|M68060 Software Package 5*4882a593Smuzhiyun|Production Release P1.00 -- October 10, 1994 6*4882a593Smuzhiyun| 7*4882a593Smuzhiyun|M68060 Software Package Copyright © 1993, 1994 Motorola Inc. All rights reserved. 8*4882a593Smuzhiyun| 9*4882a593Smuzhiyun|THE SOFTWARE is provided on an "AS IS" basis and without warranty. 10*4882a593Smuzhiyun|To the maximum extent permitted by applicable law, 11*4882a593Smuzhiyun|MOTOROLA DISCLAIMS ALL WARRANTIES WHETHER EXPRESS OR IMPLIED, 12*4882a593Smuzhiyun|INCLUDING IMPLIED WARRANTIES OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE 13*4882a593Smuzhiyun|and any warranty against infringement with regard to the SOFTWARE 14*4882a593Smuzhiyun|(INCLUDING ANY MODIFIED VERSIONS THEREOF) and any accompanying written materials. 15*4882a593Smuzhiyun| 16*4882a593Smuzhiyun|To the maximum extent permitted by applicable law, 17*4882a593Smuzhiyun|IN NO EVENT SHALL MOTOROLA BE LIABLE FOR ANY DAMAGES WHATSOEVER 18*4882a593Smuzhiyun|(INCLUDING WITHOUT LIMITATION, DAMAGES FOR LOSS OF BUSINESS PROFITS, 19*4882a593Smuzhiyun|BUSINESS INTERRUPTION, LOSS OF BUSINESS INFORMATION, OR OTHER PECUNIARY LOSS) 20*4882a593Smuzhiyun|ARISING OF THE USE OR INABILITY TO USE THE SOFTWARE. 21*4882a593Smuzhiyun|Motorola assumes no responsibility for the maintenance and support of the SOFTWARE. 22*4882a593Smuzhiyun| 23*4882a593Smuzhiyun|You are hereby granted a copyright license to use, modify, and distribute the SOFTWARE 24*4882a593Smuzhiyun|so long as this entire notice is retained without alteration in any modified and/or 25*4882a593Smuzhiyun|redistributed versions, and that such modified versions are clearly identified as such. 26*4882a593Smuzhiyun|No licenses are granted by implication, estoppel or otherwise under any patents 27*4882a593Smuzhiyun|or trademarks of Motorola, Inc. 28*4882a593Smuzhiyun|~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 29*4882a593Smuzhiyun| os.s 30*4882a593Smuzhiyun| 31*4882a593Smuzhiyun| This file contains: 32*4882a593Smuzhiyun| - example "Call-Out"s required by both the ISP and FPSP. 33*4882a593Smuzhiyun| 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun#include <linux/linkage.h> 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun|################################ 38*4882a593Smuzhiyun| EXAMPLE CALL-OUTS # 39*4882a593Smuzhiyun| # 40*4882a593Smuzhiyun| _060_dmem_write() # 41*4882a593Smuzhiyun| _060_dmem_read() # 42*4882a593Smuzhiyun| _060_imem_read() # 43*4882a593Smuzhiyun| _060_dmem_read_byte() # 44*4882a593Smuzhiyun| _060_dmem_read_word() # 45*4882a593Smuzhiyun| _060_dmem_read_long() # 46*4882a593Smuzhiyun| _060_imem_read_word() # 47*4882a593Smuzhiyun| _060_imem_read_long() # 48*4882a593Smuzhiyun| _060_dmem_write_byte() # 49*4882a593Smuzhiyun| _060_dmem_write_word() # 50*4882a593Smuzhiyun| _060_dmem_write_long() # 51*4882a593Smuzhiyun| # 52*4882a593Smuzhiyun| _060_real_trace() # 53*4882a593Smuzhiyun| _060_real_access() # 54*4882a593Smuzhiyun|################################ 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun| 57*4882a593Smuzhiyun| Each IO routine checks to see if the memory write/read is to/from user 58*4882a593Smuzhiyun| or supervisor application space. The examples below use simple "move" 59*4882a593Smuzhiyun| instructions for supervisor mode applications and call _copyin()/_copyout() 60*4882a593Smuzhiyun| for user mode applications. 61*4882a593Smuzhiyun| When installing the 060SP, the _copyin()/_copyout() equivalents for a 62*4882a593Smuzhiyun| given operating system should be substituted. 63*4882a593Smuzhiyun| 64*4882a593Smuzhiyun| The addresses within the 060SP are guaranteed to be on the stack. 65*4882a593Smuzhiyun| The result is that Unix processes are allowed to sleep as a consequence 66*4882a593Smuzhiyun| of a page fault during a _copyout. 67*4882a593Smuzhiyun| 68*4882a593Smuzhiyun| Linux/68k: The _060_[id]mem_{read,write}_{byte,word,long} functions 69*4882a593Smuzhiyun| (i.e. all the known length <= 4) are implemented by single moves 70*4882a593Smuzhiyun| statements instead of (more expensive) copy{in,out} calls, if 71*4882a593Smuzhiyun| working in user space 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun| 74*4882a593Smuzhiyun| _060_dmem_write(): 75*4882a593Smuzhiyun| 76*4882a593Smuzhiyun| Writes to data memory while in supervisor mode. 77*4882a593Smuzhiyun| 78*4882a593Smuzhiyun| INPUTS: 79*4882a593Smuzhiyun| a0 - supervisor source address 80*4882a593Smuzhiyun| a1 - user destination address 81*4882a593Smuzhiyun| d0 - number of bytes to write 82*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 83*4882a593Smuzhiyun| OUTPUTS: 84*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 85*4882a593Smuzhiyun| 86*4882a593Smuzhiyun .global _060_dmem_write 87*4882a593Smuzhiyun_060_dmem_write: 88*4882a593Smuzhiyun subq.l #1,%d0 89*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 90*4882a593Smuzhiyun beqs user_write 91*4882a593Smuzhiyunsuper_write: 92*4882a593Smuzhiyun move.b (%a0)+,(%a1)+ | copy 1 byte 93*4882a593Smuzhiyun dbra %d0,super_write | quit if --ctr < 0 94*4882a593Smuzhiyun clr.l %d1 | return success 95*4882a593Smuzhiyun rts 96*4882a593Smuzhiyunuser_write: 97*4882a593Smuzhiyun move.b (%a0)+,%d1 | copy 1 byte 98*4882a593Smuzhiyuncopyoutae: 99*4882a593Smuzhiyun movs.b %d1,(%a1)+ 100*4882a593Smuzhiyun dbra %d0,user_write | quit if --ctr < 0 101*4882a593Smuzhiyun clr.l %d1 | return success 102*4882a593Smuzhiyun rts 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun| 105*4882a593Smuzhiyun| _060_imem_read(), _060_dmem_read(): 106*4882a593Smuzhiyun| 107*4882a593Smuzhiyun| Reads from data/instruction memory while in supervisor mode. 108*4882a593Smuzhiyun| 109*4882a593Smuzhiyun| INPUTS: 110*4882a593Smuzhiyun| a0 - user source address 111*4882a593Smuzhiyun| a1 - supervisor destination address 112*4882a593Smuzhiyun| d0 - number of bytes to read 113*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 114*4882a593Smuzhiyun| OUTPUTS: 115*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 116*4882a593Smuzhiyun| 117*4882a593Smuzhiyun .global _060_imem_read 118*4882a593Smuzhiyun .global _060_dmem_read 119*4882a593Smuzhiyun_060_imem_read: 120*4882a593Smuzhiyun_060_dmem_read: 121*4882a593Smuzhiyun subq.l #1,%d0 122*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 123*4882a593Smuzhiyun beqs user_read 124*4882a593Smuzhiyunsuper_read: 125*4882a593Smuzhiyun move.b (%a0)+,(%a1)+ | copy 1 byte 126*4882a593Smuzhiyun dbra %d0,super_read | quit if --ctr < 0 127*4882a593Smuzhiyun clr.l %d1 | return success 128*4882a593Smuzhiyun rts 129*4882a593Smuzhiyunuser_read: 130*4882a593Smuzhiyuncopyinae: 131*4882a593Smuzhiyun movs.b (%a0)+,%d1 132*4882a593Smuzhiyun move.b %d1,(%a1)+ | copy 1 byte 133*4882a593Smuzhiyun dbra %d0,user_read | quit if --ctr < 0 134*4882a593Smuzhiyun clr.l %d1 | return success 135*4882a593Smuzhiyun rts 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun| 138*4882a593Smuzhiyun| _060_dmem_read_byte(): 139*4882a593Smuzhiyun| 140*4882a593Smuzhiyun| Read a data byte from user memory. 141*4882a593Smuzhiyun| 142*4882a593Smuzhiyun| INPUTS: 143*4882a593Smuzhiyun| a0 - user source address 144*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 145*4882a593Smuzhiyun| OUTPUTS: 146*4882a593Smuzhiyun| d0 - data byte in d0 147*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 148*4882a593Smuzhiyun| 149*4882a593Smuzhiyun .global _060_dmem_read_byte 150*4882a593Smuzhiyun_060_dmem_read_byte: 151*4882a593Smuzhiyun clr.l %d0 | clear whole longword 152*4882a593Smuzhiyun clr.l %d1 | assume success 153*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 154*4882a593Smuzhiyun bnes dmrbs | supervisor 155*4882a593Smuzhiyundmrbuae:movs.b (%a0),%d0 | fetch user byte 156*4882a593Smuzhiyun rts 157*4882a593Smuzhiyundmrbs: move.b (%a0),%d0 | fetch super byte 158*4882a593Smuzhiyun rts 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun| 161*4882a593Smuzhiyun| _060_dmem_read_word(): 162*4882a593Smuzhiyun| 163*4882a593Smuzhiyun| Read a data word from user memory. 164*4882a593Smuzhiyun| 165*4882a593Smuzhiyun| INPUTS: 166*4882a593Smuzhiyun| a0 - user source address 167*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 168*4882a593Smuzhiyun| OUTPUTS: 169*4882a593Smuzhiyun| d0 - data word in d0 170*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 171*4882a593Smuzhiyun| 172*4882a593Smuzhiyun| _060_imem_read_word(): 173*4882a593Smuzhiyun| 174*4882a593Smuzhiyun| Read an instruction word from user memory. 175*4882a593Smuzhiyun| 176*4882a593Smuzhiyun| INPUTS: 177*4882a593Smuzhiyun| a0 - user source address 178*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 179*4882a593Smuzhiyun| OUTPUTS: 180*4882a593Smuzhiyun| d0 - instruction word in d0 181*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 182*4882a593Smuzhiyun| 183*4882a593Smuzhiyun .global _060_dmem_read_word 184*4882a593Smuzhiyun .global _060_imem_read_word 185*4882a593Smuzhiyun_060_dmem_read_word: 186*4882a593Smuzhiyun_060_imem_read_word: 187*4882a593Smuzhiyun clr.l %d1 | assume success 188*4882a593Smuzhiyun clr.l %d0 | clear whole longword 189*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 190*4882a593Smuzhiyun bnes dmrws | supervisor 191*4882a593Smuzhiyundmrwuae:movs.w (%a0), %d0 | fetch user word 192*4882a593Smuzhiyun rts 193*4882a593Smuzhiyundmrws: move.w (%a0), %d0 | fetch super word 194*4882a593Smuzhiyun rts 195*4882a593Smuzhiyun 196*4882a593Smuzhiyun| 197*4882a593Smuzhiyun| _060_dmem_read_long(): 198*4882a593Smuzhiyun| 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun| 201*4882a593Smuzhiyun| INPUTS: 202*4882a593Smuzhiyun| a0 - user source address 203*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 204*4882a593Smuzhiyun| OUTPUTS: 205*4882a593Smuzhiyun| d0 - data longword in d0 206*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 207*4882a593Smuzhiyun| 208*4882a593Smuzhiyun| _060_imem_read_long(): 209*4882a593Smuzhiyun| 210*4882a593Smuzhiyun| Read an instruction longword from user memory. 211*4882a593Smuzhiyun| 212*4882a593Smuzhiyun| INPUTS: 213*4882a593Smuzhiyun| a0 - user source address 214*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 215*4882a593Smuzhiyun| OUTPUTS: 216*4882a593Smuzhiyun| d0 - instruction longword in d0 217*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 218*4882a593Smuzhiyun| 219*4882a593Smuzhiyun .global _060_dmem_read_long 220*4882a593Smuzhiyun .global _060_imem_read_long 221*4882a593Smuzhiyun_060_dmem_read_long: 222*4882a593Smuzhiyun_060_imem_read_long: 223*4882a593Smuzhiyun clr.l %d1 | assume success 224*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 225*4882a593Smuzhiyun bnes dmrls | supervisor 226*4882a593Smuzhiyundmrluae:movs.l (%a0),%d0 | fetch user longword 227*4882a593Smuzhiyun rts 228*4882a593Smuzhiyundmrls: move.l (%a0),%d0 | fetch super longword 229*4882a593Smuzhiyun rts 230*4882a593Smuzhiyun 231*4882a593Smuzhiyun| 232*4882a593Smuzhiyun| _060_dmem_write_byte(): 233*4882a593Smuzhiyun| 234*4882a593Smuzhiyun| Write a data byte to user memory. 235*4882a593Smuzhiyun| 236*4882a593Smuzhiyun| INPUTS: 237*4882a593Smuzhiyun| a0 - user destination address 238*4882a593Smuzhiyun| d0 - data byte in d0 239*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 240*4882a593Smuzhiyun| OUTPUTS: 241*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 242*4882a593Smuzhiyun| 243*4882a593Smuzhiyun .global _060_dmem_write_byte 244*4882a593Smuzhiyun_060_dmem_write_byte: 245*4882a593Smuzhiyun clr.l %d1 | assume success 246*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 247*4882a593Smuzhiyun bnes dmwbs | supervisor 248*4882a593Smuzhiyundmwbuae:movs.b %d0,(%a0) | store user byte 249*4882a593Smuzhiyun rts 250*4882a593Smuzhiyundmwbs: move.b %d0,(%a0) | store super byte 251*4882a593Smuzhiyun rts 252*4882a593Smuzhiyun 253*4882a593Smuzhiyun| 254*4882a593Smuzhiyun| _060_dmem_write_word(): 255*4882a593Smuzhiyun| 256*4882a593Smuzhiyun| Write a data word to user memory. 257*4882a593Smuzhiyun| 258*4882a593Smuzhiyun| INPUTS: 259*4882a593Smuzhiyun| a0 - user destination address 260*4882a593Smuzhiyun| d0 - data word in d0 261*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 262*4882a593Smuzhiyun| OUTPUTS: 263*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 264*4882a593Smuzhiyun| 265*4882a593Smuzhiyun .global _060_dmem_write_word 266*4882a593Smuzhiyun_060_dmem_write_word: 267*4882a593Smuzhiyun clr.l %d1 | assume success 268*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 269*4882a593Smuzhiyun bnes dmwws | supervisor 270*4882a593Smuzhiyundmwwu: 271*4882a593Smuzhiyundmwwuae:movs.w %d0,(%a0) | store user word 272*4882a593Smuzhiyun bras dmwwr 273*4882a593Smuzhiyundmwws: move.w %d0,(%a0) | store super word 274*4882a593Smuzhiyundmwwr: clr.l %d1 | return success 275*4882a593Smuzhiyun rts 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun| 278*4882a593Smuzhiyun| _060_dmem_write_long(): 279*4882a593Smuzhiyun| 280*4882a593Smuzhiyun| Write a data longword to user memory. 281*4882a593Smuzhiyun| 282*4882a593Smuzhiyun| INPUTS: 283*4882a593Smuzhiyun| a0 - user destination address 284*4882a593Smuzhiyun| d0 - data longword in d0 285*4882a593Smuzhiyun| 0x4(%a6),bit5 - 1 = supervisor mode, 0 = user mode 286*4882a593Smuzhiyun| OUTPUTS: 287*4882a593Smuzhiyun| d1 - 0 = success, !0 = failure 288*4882a593Smuzhiyun| 289*4882a593Smuzhiyun .global _060_dmem_write_long 290*4882a593Smuzhiyun_060_dmem_write_long: 291*4882a593Smuzhiyun clr.l %d1 | assume success 292*4882a593Smuzhiyun btst #0x5,0x4(%a6) | check for supervisor state 293*4882a593Smuzhiyun bnes dmwls | supervisor 294*4882a593Smuzhiyundmwluae:movs.l %d0,(%a0) | store user longword 295*4882a593Smuzhiyun rts 296*4882a593Smuzhiyundmwls: move.l %d0,(%a0) | store super longword 297*4882a593Smuzhiyun rts 298*4882a593Smuzhiyun 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun#if 0 301*4882a593Smuzhiyun|############################################### 302*4882a593Smuzhiyun 303*4882a593Smuzhiyun| 304*4882a593Smuzhiyun| Use these routines if your kernel doesn't have _copyout/_copyin equivalents. 305*4882a593Smuzhiyun| Assumes that D0/D1/A0/A1 are scratch registers. The _copyin/_copyout 306*4882a593Smuzhiyun| below assume that the SFC/DFC have been set previously. 307*4882a593Smuzhiyun| 308*4882a593Smuzhiyun| Linux/68k: These are basically non-inlined versions of 309*4882a593Smuzhiyun| memcpy_{to,from}fs, but without long-transfer optimization 310*4882a593Smuzhiyun| Note: Assumed that SFC/DFC are pointing correctly to user data 311*4882a593Smuzhiyun| space... Should be right, or are there any exceptions? 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun| 314*4882a593Smuzhiyun| int _copyout(supervisor_addr, user_addr, nbytes) 315*4882a593Smuzhiyun| 316*4882a593Smuzhiyun .global _copyout 317*4882a593Smuzhiyun_copyout: 318*4882a593Smuzhiyun move.l 4(%sp),%a0 | source 319*4882a593Smuzhiyun move.l 8(%sp),%a1 | destination 320*4882a593Smuzhiyun move.l 12(%sp),%d0 | count 321*4882a593Smuzhiyun subq.l #1,%d0 322*4882a593Smuzhiyunmoreout: 323*4882a593Smuzhiyun move.b (%a0)+,%d1 | fetch supervisor byte 324*4882a593Smuzhiyuncopyoutae: 325*4882a593Smuzhiyun movs.b %d1,(%a1)+ | store user byte 326*4882a593Smuzhiyun dbra %d0,moreout | are we through yet? 327*4882a593Smuzhiyun moveq #0,%d0 | return success 328*4882a593Smuzhiyun rts 329*4882a593Smuzhiyun 330*4882a593Smuzhiyun| 331*4882a593Smuzhiyun| int _copyin(user_addr, supervisor_addr, nbytes) 332*4882a593Smuzhiyun| 333*4882a593Smuzhiyun .global _copyin 334*4882a593Smuzhiyun_copyin: 335*4882a593Smuzhiyun move.l 4(%sp),%a0 | source 336*4882a593Smuzhiyun move.l 8(%sp),%a1 | destination 337*4882a593Smuzhiyun move.l 12(%sp),%d0 | count 338*4882a593Smuzhiyun subq.l #1,%d0 339*4882a593Smuzhiyunmorein: 340*4882a593Smuzhiyuncopyinae: 341*4882a593Smuzhiyun movs.b (%a0)+,%d1 | fetch user byte 342*4882a593Smuzhiyun move.b %d1,(%a1)+ | write supervisor byte 343*4882a593Smuzhiyun dbra %d0,morein | are we through yet? 344*4882a593Smuzhiyun moveq #0,%d0 | return success 345*4882a593Smuzhiyun rts 346*4882a593Smuzhiyun#endif 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun|########################################################################### 349*4882a593Smuzhiyun 350*4882a593Smuzhiyun| 351*4882a593Smuzhiyun| _060_real_trace(): 352*4882a593Smuzhiyun| 353*4882a593Smuzhiyun| This is the exit point for the 060FPSP when an instruction is being traced 354*4882a593Smuzhiyun| and there are no other higher priority exceptions pending for this instruction 355*4882a593Smuzhiyun| or they have already been processed. 356*4882a593Smuzhiyun| 357*4882a593Smuzhiyun| The sample code below simply executes an "rte". 358*4882a593Smuzhiyun| 359*4882a593Smuzhiyun .global _060_real_trace 360*4882a593Smuzhiyun_060_real_trace: 361*4882a593Smuzhiyun bral trap 362*4882a593Smuzhiyun 363*4882a593Smuzhiyun| 364*4882a593Smuzhiyun| _060_real_access(): 365*4882a593Smuzhiyun| 366*4882a593Smuzhiyun| This is the exit point for the 060FPSP when an access error exception 367*4882a593Smuzhiyun| is encountered. The routine below should point to the operating system 368*4882a593Smuzhiyun| handler for access error exceptions. The exception stack frame is an 369*4882a593Smuzhiyun| 8-word access error frame. 370*4882a593Smuzhiyun| 371*4882a593Smuzhiyun| The sample routine below simply executes an "rte" instruction which 372*4882a593Smuzhiyun| is most likely the incorrect thing to do and could put the system 373*4882a593Smuzhiyun| into an infinite loop. 374*4882a593Smuzhiyun| 375*4882a593Smuzhiyun .global _060_real_access 376*4882a593Smuzhiyun_060_real_access: 377*4882a593Smuzhiyun bral buserr 378*4882a593Smuzhiyun 379*4882a593Smuzhiyun 380*4882a593Smuzhiyun 381*4882a593Smuzhiyun| Execption handling for movs access to illegal memory 382*4882a593Smuzhiyun .section .fixup,#alloc,#execinstr 383*4882a593Smuzhiyun .even 384*4882a593Smuzhiyun1: moveq #-1,%d1 385*4882a593Smuzhiyun rts 386*4882a593Smuzhiyun.section __ex_table,#alloc 387*4882a593Smuzhiyun .align 4 388*4882a593Smuzhiyun .long dmrbuae,1b 389*4882a593Smuzhiyun .long dmrwuae,1b 390*4882a593Smuzhiyun .long dmrluae,1b 391*4882a593Smuzhiyun .long dmwbuae,1b 392*4882a593Smuzhiyun .long dmwwuae,1b 393*4882a593Smuzhiyun .long dmwluae,1b 394*4882a593Smuzhiyun .long copyoutae,1b 395*4882a593Smuzhiyun .long copyinae,1b 396*4882a593Smuzhiyun .text 397