64 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);  in pic32_mii_init()
78 	writel(EMAC_SOFTRESET, &emac_p->cfg1.clr); /* reset deassert */  in pic32_mii_init()
84 		writel(EMAC_RMII_RESET, &emac_p->supp.clr);  in pic32_mii_init()
142 		writel(EMAC_FULLDUP, &emac_p->cfg2.clr);  in pic32_mac_adjust_link()
151 		writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_adjust_link()
197 	writel(EMAC_RMII_SPD100, &emac_p->supp.clr);  in pic32_mac_init()
239 	writel(ETHCON_ON | ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);  in pic32_ctrl_reset()
249 	writel(0xffffffff, &ectl_p->irq.clr);  in pic32_ctrl_reset()
252 	writel(0xffffffff, &ectl_p->txst.clr);  in pic32_ctrl_reset()
253 	writel(0xffffffff, &ectl_p->rxst.clr);  in pic32_ctrl_reset()
256 	writel(0x00ff, &ectl_p->rxfc.clr);  in pic32_ctrl_reset()
363 	writel(ETHCON_TXRTS | ETHCON_RXEN, &ectl_p->con1.clr);  in pic32_eth_stop()
374 	writel(ETHCON_ON, &ectl_p->con1.clr);  in pic32_eth_stop()
382 	writel(0xffffffff, &ectl_p->irq.clr);  in pic32_eth_stop()