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Searched refs:clksrc (Results 1 – 25 of 34) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/clocksource/
H A Dmmio.c12 struct clocksource clksrc; member
17 return container_of(c, struct clocksource_mmio, clksrc); in to_mmio_clksrc()
64 cs->clksrc.name = name; in clocksource_mmio_init()
65 cs->clksrc.rating = rating; in clocksource_mmio_init()
66 cs->clksrc.read = read; in clocksource_mmio_init()
67 cs->clksrc.mask = CLOCKSOURCE_MASK(bits); in clocksource_mmio_init()
68 cs->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in clocksource_mmio_init()
70 return clocksource_register_hz(&cs->clksrc, hz); in clocksource_mmio_init()
H A Dtimer-atmel-pit.c40 struct clocksource clksrc; member
49 static inline struct pit_data *clksrc_to_pit_data(struct clocksource *clksrc) in clksrc_to_pit_data() argument
51 return container_of(clksrc, struct pit_data, clksrc); in clksrc_to_pit_data()
221 data->clksrc.mask = CLOCKSOURCE_MASK(bits); in at91sam926x_pit_dt_init()
222 data->clksrc.name = "pit"; in at91sam926x_pit_dt_init()
223 data->clksrc.rating = 175; in at91sam926x_pit_dt_init()
224 data->clksrc.read = read_pit_clk; in at91sam926x_pit_dt_init()
225 data->clksrc.flags = CLOCK_SOURCE_IS_CONTINUOUS; in at91sam926x_pit_dt_init()
227 ret = clocksource_register_hz(&data->clksrc, pit_rate); in at91sam926x_pit_dt_init()
239 clocksource_unregister(&data->clksrc); in at91sam926x_pit_dt_init()
H A Dtimer-sun5i.c53 struct clocksource clksrc; member
57 container_of(x, struct sun5i_timer_clksrc, clksrc)
156 static u64 sun5i_clksrc_read(struct clocksource *clksrc) in sun5i_clksrc_read() argument
158 struct sun5i_timer_clksrc *cs = to_sun5i_timer_clksrc(clksrc); in sun5i_clksrc_read()
172 clocksource_unregister(&cs->clksrc); in sun5i_rate_cb_clksrc()
176 clocksource_register_hz(&cs->clksrc, ndata->new_rate); in sun5i_rate_cb_clksrc()
226 cs->clksrc.name = node->name; in sun5i_setup_clocksource()
227 cs->clksrc.rating = 340; in sun5i_setup_clocksource()
228 cs->clksrc.read = sun5i_clksrc_read; in sun5i_setup_clocksource()
229 cs->clksrc.mask = CLOCKSOURCE_MASK(32); in sun5i_setup_clocksource()
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H A Dtimer-ti-dm-systimer.c714 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); in dmtimer_clocksource_read_cycles() local
715 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_read_cycles()
729 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); in dmtimer_clocksource_suspend() local
730 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_suspend()
732 clksrc->loadval = readl_relaxed(t->base + t->counter); in dmtimer_clocksource_suspend()
739 struct dmtimer_clocksource *clksrc = to_dmtimer_clocksource(cs); in dmtimer_clocksource_resume() local
740 struct dmtimer_systimer *t = &clksrc->t; in dmtimer_clocksource_resume()
748 writel_relaxed(clksrc->loadval, t->base + t->counter); in dmtimer_clocksource_resume()
755 struct dmtimer_clocksource *clksrc; in dmtimer_clocksource_init() local
760 clksrc = kzalloc(sizeof(*clksrc), GFP_KERNEL); in dmtimer_clocksource_init()
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H A Dtimer-atmel-tcb.c113 static struct clocksource clksrc = { variable
124 return tc_get_cycles(&clksrc); in tc_sched_clock_read()
129 return tc_get_cycles32(&clksrc); in tc_sched_clock_read32()
136 return tc_get_cycles(&clksrc); in tc_delay_timer_read()
141 return tc_get_cycles32(&clksrc); in tc_delay_timer_read32()
450 clksrc.name = kbasename(node->parent->full_name); in tcb_clksrc_init()
452 pr_debug("%s at %d.%03d MHz\n", clksrc.name, divided_rate / 1000000, in tcb_clksrc_init()
459 clksrc.read = tc_get_cycles32; in tcb_clksrc_init()
480 ret = clocksource_register_hz(&clksrc, divided_rate); in tcb_clksrc_init()
497 clocksource_unregister(&clksrc); in tcb_clksrc_init()
/OK3568_Linux_fs/kernel/drivers/net/dsa/sja1105/
H A Dsja1105_clocking.c42 u64 clksrc; member
89 u64 clksrc; member
99 sja1105_packing(buf, &idiv->clksrc, 28, 24, size, op); in sja1105_cgu_idiv_packing()
119 idiv.clksrc = 0x0A; /* 25MHz */ in sja1105_cgu_idiv_config()
135 sja1105_packing(buf, &cmd->clksrc, 28, 24, size, op); in sja1105_cgu_mii_control_packing()
160 int clksrc; in sja1105_cgu_mii_tx_clk_config() local
163 clksrc = mac_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
165 clksrc = phy_clk_sources[port]; in sja1105_cgu_mii_tx_clk_config()
168 mii_tx_clk.clksrc = clksrc; in sja1105_cgu_mii_tx_clk_config()
192 mii_rx_clk.clksrc = clk_sources[port]; in sja1105_cgu_mii_rx_clk_config()
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/clock/ti/davinci/
H A Dpll.txt14 - for "ti,da850-pll0", shall be "clksrc", "extclksrc"
15 - for "ti,da850-pll1", shall be "clksrc"
60 clock-names = "clksrc", "extclksrc";
84 clock-names = "clksrc";
H A Dda8xx-cfgchip.txt40 - compatible: shall be "ti,da850-async1-clksrc".
48 - compatible: shall be "ti,da850-async3-clksrc".
78 compatible = "ti,da850-async1-clksrc";
84 compatible = "ti,da850-async3-clksrc";
/OK3568_Linux_fs/kernel/arch/m68k/atari/
H A Ddebug.c219 int clksrc, clkmode, div, reg3, reg5; in atari_init_scc_port() local
227 clksrc = clksrc_table[baud]; in atari_init_scc_port()
232 clksrc = 0x28; /* TRxC */ in atari_init_scc_port()
252 SCC_WRITE(11, clksrc); /* main clock source */ in atari_init_scc_port()
/OK3568_Linux_fs/kernel/drivers/spi/
H A Dspi-rspi.c255 unsigned long clksrc; in rspi_set_rate() local
258 clksrc = clk_get_rate(rspi->clk); in rspi_set_rate()
259 spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz) - 1; in rspi_set_rate()
267 rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * (spbr + 1)); in rspi_set_rate()
340 unsigned long clksrc; in qspi_set_config_register() local
347 clksrc = clk_get_rate(rspi->clk); in qspi_set_config_register()
348 if (rspi->speed_hz >= clksrc) { in qspi_set_config_register()
350 rspi->speed_hz = clksrc; in qspi_set_config_register()
352 spbr = DIV_ROUND_UP(clksrc, 2 * rspi->speed_hz); in qspi_set_config_register()
358 rspi->speed_hz = DIV_ROUND_UP(clksrc, (2U << brdv) * spbr); in qspi_set_config_register()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-davinci/
H A Ddm365_lowlevel.c28 unsigned int clksrc = 0x0; in dm365_pll1_init() local
35 clksrc << PLLCTL_CLOCK_MODE_SHIFT); in dm365_pll1_init()
105 unsigned int clksrc = 0x0; in dm365_pll2_init() local
117 clksrc << PLLCTL_CLOCK_MODE_SHIFT); in dm365_pll2_init()
/OK3568_Linux_fs/kernel/include/linux/
H A Dsm501.h13 int clksrc, unsigned long freq);
16 int clksrc, unsigned long req_freq);
/OK3568_Linux_fs/kernel/drivers/memory/tegra/
H A Dtegra210-emc-core.c720 static void tegra210_emc_set_clock(struct tegra210_emc *emc, u32 clksrc) in tegra210_emc_set_clock() argument
722 emc->sequence->set_clock(emc, clksrc); in tegra210_emc_set_clock()
731 u32 clksrc) in tegra210_change_dll_src() argument
737 emc_clk_src = (clksrc & EMC_CLK_EMC_2X_CLK_SRC_MASK) >> in tegra210_change_dll_src()
739 emc_clk_div = (clksrc & EMC_CLK_EMC_2X_CLK_DIVISOR_MASK) >> in tegra210_change_dll_src()
792 u32 clksrc; in tegra210_emc_set_refresh() local
794 clksrc = emc->provider.configs[index].value | in tegra210_emc_set_refresh()
800 tegra210_emc_set_clock(emc, clksrc); in tegra210_emc_set_refresh()
839 void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc) in tegra210_emc_do_clock_change() argument
846 tegra210_clk_emc_update_setting(clksrc); in tegra210_emc_do_clock_change()
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H A Dtegra210-emc.h939 void (*set_clock)(struct tegra210_emc *emc, u32 clksrc);
994 void tegra210_emc_do_clock_change(struct tegra210_emc *emc, u32 clksrc);
1008 u32 tegra210_emc_dll_prelock(struct tegra210_emc *emc, u32 clksrc);
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dcs35l36.c54 int clksrc; member
1013 prev_clksrc = cs35l36->clksrc; in cs35l36_component_set_sysclk()
1017 cs35l36->clksrc = CS35L36_PLLSRC_SCLK; in cs35l36_component_set_sysclk()
1020 cs35l36->clksrc = CS35L36_PLLSRC_LRCLK; in cs35l36_component_set_sysclk()
1023 cs35l36->clksrc = CS35L36_PLLSRC_PDMCLK; in cs35l36_component_set_sysclk()
1026 cs35l36->clksrc = CS35L36_PLLSRC_SELF; in cs35l36_component_set_sysclk()
1029 cs35l36->clksrc = CS35L36_PLLSRC_MCLK; in cs35l36_component_set_sysclk()
1052 cs35l36->clksrc); in cs35l36_component_set_sysclk()
1083 if (cs35l36->clksrc == CS35L36_PLLSRC_PDMCLK) { in cs35l36_component_set_sysclk()
H A Dcs35l35.c716 int clksrc; in cs35l35_component_set_sysclk() local
721 clksrc = CS35L35_CLK_SOURCE_MCLK; in cs35l35_component_set_sysclk()
724 clksrc = CS35L35_CLK_SOURCE_SCLK; in cs35l35_component_set_sysclk()
727 clksrc = CS35L35_CLK_SOURCE_PDM; in cs35l35_component_set_sysclk()
754 clksrc << CS35L35_CLK_SOURCE_SHIFT); in cs35l35_component_set_sysclk()
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dstm32mp157a-dk1-u-boot.dtsi6 #include <dt-bindings/clock/stm32mp1-clksrc.h>
76 st,clksrc = <
/OK3568_Linux_fs/kernel/sound/soc/fsl/
H A Dfsl_esai.c268 struct clk *clksrc = esai_priv->extalclk; in fsl_esai_set_dai_sysclk() local
298 clksrc = esai_priv->fsysclk; in fsl_esai_set_dai_sysclk()
310 if (IS_ERR(clksrc)) { in fsl_esai_set_dai_sysclk()
313 return PTR_ERR(clksrc); in fsl_esai_set_dai_sysclk()
315 clk_rate = clk_get_rate(clksrc); in fsl_esai_set_dai_sysclk()
333 if (ratio == 1 && clksrc == esai_priv->extalclk) { in fsl_esai_set_dai_sysclk()
H A Dfsl_spdif.c393 u8 clksrc = spdif_priv->rxclk_src; in spdif_set_rx_clksrc() local
395 if (clksrc >= SRPC_CLKSRC_MAX || gainsel >= GAINSEL_MULTI_MAX) in spdif_set_rx_clksrc()
400 SRPC_CLKSRC_SEL_SET(clksrc) | SRPC_GAINSEL_SET(gainsel)); in spdif_set_rx_clksrc()
849 u8 clksrc; in spdif_get_rxclk_rate() local
854 clksrc = (phaseconf >> SRPC_CLKSRC_SEL_OFFSET) & 0xf; in spdif_get_rxclk_rate()
857 if (srpc_dpll_locked[clksrc] && (phaseconf & SRPC_DPLL_LOCKED)) in spdif_get_rxclk_rate()
/OK3568_Linux_fs/kernel/drivers/gpu/drm/shmobile/
H A Dshmob_drm_drv.c69 enum shmob_drm_clk_source clksrc) in shmob_drm_setup_clocks() argument
74 switch (clksrc) { in shmob_drm_setup_clocks()
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dpcc.c121 clksrc_type = pcc_arrays[clk].clksrc; in pcc_clock_sel()
222 clksrc_type = pcc_arrays[clk].clksrc; in pcc_clock_get_clksrc()
/OK3568_Linux_fs/kernel/drivers/mfd/
H A Dsm501.c509 int clksrc, in sm501_set_clock() argument
526 switch (clksrc) { in sm501_set_clock()
590 clock = clock & ~(0xFF << clksrc); in sm501_set_clock()
591 clock |= reg<<clksrc; in sm501_set_clock()
640 int clksrc, in sm501_find_clock() argument
647 switch (clksrc) { in sm501_find_clock()
/OK3568_Linux_fs/kernel/drivers/mmc/host/
H A Dsdhci-s3c.c182 struct clk *clksrc = ourhost->clk_bus[src]; in sdhci_s3c_consider_clock() local
185 if (IS_ERR(clksrc)) in sdhci_s3c_consider_clock()
193 rate = clk_round_rate(clksrc, wanted); in sdhci_s3c_consider_clock()
/OK3568_Linux_fs/kernel/drivers/tty/serial/
H A Dmax310x.c558 unsigned int div, clksrc, pllcfg = 0; in max310x_set_ref_clk() local
600 clksrc = MAX310X_CLKSRC_EXTCLK_BIT | (xtal ? MAX310X_CLKSRC_CRYST_BIT : 0); in max310x_set_ref_clk()
604 clksrc |= MAX310X_CLKSRC_PLL_BIT; in max310x_set_ref_clk()
607 clksrc |= MAX310X_CLKSRC_PLLBYP_BIT; in max310x_set_ref_clk()
609 regmap_write(s->regmap, MAX310X_CLKSRC_REG, clksrc); in max310x_set_ref_clk()
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dda850.dtsi139 clock-names = "clksrc", "extclksrc";
407 compatible = "ti,da850-async1-clksrc";
413 compatible = "ti,da850-async3-clksrc";
704 clock-names = "clksrc";

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