1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun /* include/linux/sm501.h 3*4882a593Smuzhiyun * 4*4882a593Smuzhiyun * Copyright (c) 2006 Simtec Electronics 5*4882a593Smuzhiyun * Ben Dooks <ben@simtec.co.uk> 6*4882a593Smuzhiyun * Vincent Sanders <vince@simtec.co.uk> 7*4882a593Smuzhiyun */ 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun extern int sm501_unit_power(struct device *dev, 10*4882a593Smuzhiyun unsigned int unit, unsigned int to); 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun extern unsigned long sm501_set_clock(struct device *dev, 13*4882a593Smuzhiyun int clksrc, unsigned long freq); 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun extern unsigned long sm501_find_clock(struct device *dev, 16*4882a593Smuzhiyun int clksrc, unsigned long req_freq); 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun /* sm501_misc_control 19*4882a593Smuzhiyun * 20*4882a593Smuzhiyun * Modify the SM501's MISC_CONTROL register 21*4882a593Smuzhiyun */ 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun extern int sm501_misc_control(struct device *dev, 24*4882a593Smuzhiyun unsigned long set, unsigned long clear); 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun /* sm501_modify_reg 27*4882a593Smuzhiyun * 28*4882a593Smuzhiyun * Modify a register in the SM501 which may be shared with other 29*4882a593Smuzhiyun * drivers. 30*4882a593Smuzhiyun */ 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun extern unsigned long sm501_modify_reg(struct device *dev, 33*4882a593Smuzhiyun unsigned long reg, 34*4882a593Smuzhiyun unsigned long set, 35*4882a593Smuzhiyun unsigned long clear); 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun /* Platform data definitions */ 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun #define SM501FB_FLAG_USE_INIT_MODE (1<<0) 41*4882a593Smuzhiyun #define SM501FB_FLAG_DISABLE_AT_EXIT (1<<1) 42*4882a593Smuzhiyun #define SM501FB_FLAG_USE_HWCURSOR (1<<2) 43*4882a593Smuzhiyun #define SM501FB_FLAG_USE_HWACCEL (1<<3) 44*4882a593Smuzhiyun #define SM501FB_FLAG_PANEL_NO_FPEN (1<<4) 45*4882a593Smuzhiyun #define SM501FB_FLAG_PANEL_NO_VBIASEN (1<<5) 46*4882a593Smuzhiyun #define SM501FB_FLAG_PANEL_INV_FPEN (1<<6) 47*4882a593Smuzhiyun #define SM501FB_FLAG_PANEL_INV_VBIASEN (1<<7) 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun struct sm501_platdata_fbsub { 50*4882a593Smuzhiyun struct fb_videomode *def_mode; 51*4882a593Smuzhiyun unsigned int def_bpp; 52*4882a593Smuzhiyun unsigned long max_mem; 53*4882a593Smuzhiyun unsigned int flags; 54*4882a593Smuzhiyun }; 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun enum sm501_fb_routing { 57*4882a593Smuzhiyun SM501_FB_OWN = 0, /* CRT=>CRT, Panel=>Panel */ 58*4882a593Smuzhiyun SM501_FB_CRT_PANEL = 1, /* Panel=>CRT, Panel=>Panel */ 59*4882a593Smuzhiyun }; 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun /* sm501_platdata_fb flag field bit definitions */ 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun #define SM501_FBPD_SWAP_FB_ENDIAN (1<<0) /* need to endian swap */ 64*4882a593Smuzhiyun 65*4882a593Smuzhiyun /* sm501_platdata_fb 66*4882a593Smuzhiyun * 67*4882a593Smuzhiyun * configuration data for the framebuffer driver 68*4882a593Smuzhiyun */ 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun struct sm501_platdata_fb { 71*4882a593Smuzhiyun enum sm501_fb_routing fb_route; 72*4882a593Smuzhiyun unsigned int flags; 73*4882a593Smuzhiyun struct sm501_platdata_fbsub *fb_crt; 74*4882a593Smuzhiyun struct sm501_platdata_fbsub *fb_pnl; 75*4882a593Smuzhiyun }; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun /* gpio i2c 78*4882a593Smuzhiyun * 79*4882a593Smuzhiyun * Note, we have to pass in the bus number, as the number used will be 80*4882a593Smuzhiyun * passed to the i2c-gpio driver's platform_device.id, subsequently used 81*4882a593Smuzhiyun * to register the i2c bus. 82*4882a593Smuzhiyun */ 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun struct sm501_platdata_gpio_i2c { 85*4882a593Smuzhiyun unsigned int bus_num; 86*4882a593Smuzhiyun unsigned int pin_sda; 87*4882a593Smuzhiyun unsigned int pin_scl; 88*4882a593Smuzhiyun int udelay; 89*4882a593Smuzhiyun int timeout; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun /* sm501_initdata 93*4882a593Smuzhiyun * 94*4882a593Smuzhiyun * use for initialising values that may not have been setup 95*4882a593Smuzhiyun * before the driver is loaded. 96*4882a593Smuzhiyun */ 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun struct sm501_reg_init { 99*4882a593Smuzhiyun unsigned long set; 100*4882a593Smuzhiyun unsigned long mask; 101*4882a593Smuzhiyun }; 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun #define SM501_USE_USB_HOST (1<<0) 104*4882a593Smuzhiyun #define SM501_USE_USB_SLAVE (1<<1) 105*4882a593Smuzhiyun #define SM501_USE_SSP0 (1<<2) 106*4882a593Smuzhiyun #define SM501_USE_SSP1 (1<<3) 107*4882a593Smuzhiyun #define SM501_USE_UART0 (1<<4) 108*4882a593Smuzhiyun #define SM501_USE_UART1 (1<<5) 109*4882a593Smuzhiyun #define SM501_USE_FBACCEL (1<<6) 110*4882a593Smuzhiyun #define SM501_USE_AC97 (1<<7) 111*4882a593Smuzhiyun #define SM501_USE_I2S (1<<8) 112*4882a593Smuzhiyun #define SM501_USE_GPIO (1<<9) 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun #define SM501_USE_ALL (0xffffffff) 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun struct sm501_initdata { 117*4882a593Smuzhiyun struct sm501_reg_init gpio_low; 118*4882a593Smuzhiyun struct sm501_reg_init gpio_high; 119*4882a593Smuzhiyun struct sm501_reg_init misc_timing; 120*4882a593Smuzhiyun struct sm501_reg_init misc_control; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun unsigned long devices; 123*4882a593Smuzhiyun unsigned long mclk; /* non-zero to modify */ 124*4882a593Smuzhiyun unsigned long m1xclk; /* non-zero to modify */ 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun 127*4882a593Smuzhiyun /* sm501_init_gpio 128*4882a593Smuzhiyun * 129*4882a593Smuzhiyun * default gpio settings 130*4882a593Smuzhiyun */ 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun struct sm501_init_gpio { 133*4882a593Smuzhiyun struct sm501_reg_init gpio_data_low; 134*4882a593Smuzhiyun struct sm501_reg_init gpio_data_high; 135*4882a593Smuzhiyun struct sm501_reg_init gpio_ddr_low; 136*4882a593Smuzhiyun struct sm501_reg_init gpio_ddr_high; 137*4882a593Smuzhiyun }; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #define SM501_FLAG_SUSPEND_OFF (1<<4) 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun /* sm501_platdata 142*4882a593Smuzhiyun * 143*4882a593Smuzhiyun * This is passed with the platform device to allow the board 144*4882a593Smuzhiyun * to control the behaviour of the SM501 driver(s) which attach 145*4882a593Smuzhiyun * to the device. 146*4882a593Smuzhiyun * 147*4882a593Smuzhiyun */ 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun struct sm501_platdata { 150*4882a593Smuzhiyun struct sm501_initdata *init; 151*4882a593Smuzhiyun struct sm501_init_gpio *init_gpiop; 152*4882a593Smuzhiyun struct sm501_platdata_fb *fb; 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun int flags; 155*4882a593Smuzhiyun int gpio_base; 156*4882a593Smuzhiyun 157*4882a593Smuzhiyun int (*get_power)(struct device *dev); 158*4882a593Smuzhiyun int (*set_power)(struct device *dev, unsigned int on); 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun struct sm501_platdata_gpio_i2c *gpio_i2c; 161*4882a593Smuzhiyun unsigned int gpio_i2c_nr; 162*4882a593Smuzhiyun }; 163*4882a593Smuzhiyun 164*4882a593Smuzhiyun #if defined(CONFIG_PPC32) 165*4882a593Smuzhiyun #define smc501_readl(addr) ioread32be((addr)) 166*4882a593Smuzhiyun #define smc501_writel(val, addr) iowrite32be((val), (addr)) 167*4882a593Smuzhiyun #else 168*4882a593Smuzhiyun #define smc501_readl(addr) readl(addr) 169*4882a593Smuzhiyun #define smc501_writel(val, addr) writel(val, addr) 170*4882a593Smuzhiyun #endif 171