| /OK3568_Linux_fs/kernel/drivers/gpu/drm/ingenic/ |
| H A D | Kconfig | 21 bool "IPU support for Ingenic SoCs"
23 Choose this option to enable support for the IPU found in Ingenic SoCs.
25 The Image Processing Unit (IPU) will appear as a second primary plane.
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| /OK3568_Linux_fs/u-boot/board/aristainetos/ |
| H A D | axi.cfg | 17 /* enable AXI cache for VDOA/VPU/IPU */
20 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/advantech/dms-ba16/ |
| H A D | clocks.cfg | 10 /* enable AXI cache for VDOA/VPU/IPU */
12 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/tqc/tqma6/ |
| H A D | clocks.cfg | 20 /* enable AXI cache for VDOA/VPU/IPU */
22 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/imx/ |
| H A D | fsl-imx-drm.txt | 5 IPU or other display interface nodes that comprise the graphics subsystem.
10 of IPU devices
36 - fsl,prg: phandle to prg node associated with this IPU instance
127 Port 0 is the input port connected to the IPU display interface,
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| H A D | ldb.txt | 14 multiplexer in the front to select any of the four IPU display
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| /OK3568_Linux_fs/u-boot/board/toradex/apalis_imx6/ |
| H A D | clocks.cfg | 27 /* enable AXI cache for VDOA/VPU/IPU */
29 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/toradex/colibri_imx6/ |
| H A D | clocks.cfg | 27 /* enable AXI cache for VDOA/VPU/IPU */
29 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/boundary/nitrogen6x/ |
| H A D | clocks.cfg | 26 /* enable AXI cache for VDOA/VPU/IPU */
28 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/freescale/mx6qarm2/ |
| H A D | imximage.cfg | 205 /* enable AXI cache for VDOA/VPU/IPU */
207 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
332 /* enable AXI cache for VDOA/VPU/IPU */
334 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/ |
| H A D | imx.txt | 14 sensor interface ports of IPU devices
34 to the i.MX IPU CSIs.
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| /OK3568_Linux_fs/u-boot/board/logicpd/imx6/ |
| H A D | mx6q_2x_MT41K512M16HA.cfg | 108 /* enable AXI cache for VDOA/VPU/IPU */
110 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | dra74-ipu-dsp-common.dtsi | 3 * Common IPU and DSP data for TI DRA74x/DRA76x/AM572x/AM574x platforms
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| H A D | dra7-ipu-dsp-common.dtsi | 3 * Common IPU and DSP data for TI DRA7xx/AM57xx platforms
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| H A D | imx53-qsb-common.dtsi | 315 fsl,hsync-pin = <7>; /* IPU DI1 PIN7 via EIM_OE */
316 fsl,vsync-pin = <8>; /* IPU DI1 PIN8 via EIM_RW */
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| /OK3568_Linux_fs/u-boot/board/ge/bx50v3/ |
| H A D | bx50v3.cfg | 136 /* enable AXI cache for VDOA/VPU/IPU */
138 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/kernel/drivers/gpu/ipu-v3/ |
| H A D | Kconfig | 11 Processing Unit. This option only enables IPU base support.
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| /OK3568_Linux_fs/u-boot/board/seco/mx6quq7/ |
| H A D | mx6quq7-2g.cfg | 167 /* enable AXI cache for VDOA/VPU/IPU */
170 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/u-boot/board/barco/titanium/ |
| H A D | imximage.cfg | 163 /* enable AXI cache for VDOA/VPU/IPU */
165 /* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/mediatek/ |
| H A D | mediatek,ipu.txt | 1 Mediatek IPU controller
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| /OK3568_Linux_fs/kernel/Documentation/userspace-api/media/drivers/ |
| H A D | imx-uapi.rst | 34 this happens, the IPU triggers a mechanism to re-establish vertical
46 While the reason for this observation isn't known (the IPU dummy
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| /OK3568_Linux_fs/buildroot/package/gstreamer1/gst1-imx/ |
| H A D | Config.in | 41 Elements leveraging the IPU
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| /OK3568_Linux_fs/kernel/Documentation/admin-guide/media/ |
| H A D | imx.rst | 9 The Freescale i.MX5/6 contains an Image Processing Unit (IPU), which
13 For image capture, the IPU contains the following internal subunits:
43 The IPU time-shares the IC task operations. The time-slice granularity
63 In addition to the IPU internal subunits, there are also two units
64 outside the IPU that are also involved in video capture on i.MX:
148 is a "CSI-2 to IPU gasket". The gasket acts as a demultiplexer of the
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/dma/ |
| H A D | fsl-imx-sdma.txt | 51 19 IPU Memory
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| /OK3568_Linux_fs/kernel/Documentation/admin-guide/hw-vuln/ |
| H A D | processor_mmio_stale_data.rst | 241 Intel processors or platforms, utilizing the Intel Platform Update (IPU)
245 longer provide Servicing, such as through IPU or other similar update
|