1*4882a593Smuzhiyun/* 2*4882a593Smuzhiyun * Copyright (C) 2013 Boundary Devices 3*4882a593Smuzhiyun * Copyright (C) 2013, 2014 Markus Niebel <Markus.Niebel@tq-group.com> 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+ 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Refer doc/README.imximage for more details about how-to configure 8*4882a593Smuzhiyun * and create imximage boot image 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/* set the default clock gate to save power */ 12*4882a593SmuzhiyunDATA 4, CCM_CCGR0, 0x00C03F3F 13*4882a593SmuzhiyunDATA 4, CCM_CCGR1, 0x0030FC03 14*4882a593SmuzhiyunDATA 4, CCM_CCGR2, 0x0FFFC000 15*4882a593SmuzhiyunDATA 4, CCM_CCGR3, 0x3FF00000 16*4882a593SmuzhiyunDATA 4, CCM_CCGR4, 0x00FFF300 17*4882a593SmuzhiyunDATA 4, CCM_CCGR5, 0x0F0000C3 18*4882a593SmuzhiyunDATA 4, CCM_CCGR6, 0x000003FF 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun/* enable AXI cache for VDOA/VPU/IPU */ 21*4882a593SmuzhiyunDATA 4, MX6_IOMUXC_GPR4, 0xF00000CF 22*4882a593Smuzhiyun/* set IPU AXI-id0 Qos=0xf(bypass) AXI-id1 Qos=0x7 */ 23*4882a593SmuzhiyunDATA 4, MX6_IOMUXC_GPR6, 0x007F007F 24*4882a593SmuzhiyunDATA 4, MX6_IOMUXC_GPR7, 0x007F007F 25