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Searched refs:CLK_TOP_CAMTG_SEL (Results 1 – 10 of 10) sorted by relevance

/OK3568_Linux_fs/kernel/include/dt-bindings/clock/
H A Dmt8135-clk.h90 #define CLK_TOP_CAMTG_SEL 79 macro
H A Dmt6765-clk.h137 #define CLK_TOP_CAMTG_SEL 102 macro
H A Dmt8173-clk.h100 #define CLK_TOP_CAMTG_SEL 90 macro
H A Dmt2712-clk.h137 #define CLK_TOP_CAMTG_SEL 106 macro
H A Dmt2701-clk.h91 #define CLK_TOP_CAMTG_SEL 80 macro
/OK3568_Linux_fs/kernel/drivers/clk/mediatek/
H A Dclk-mt8135.c376 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0158, 8, 3, 15),
H A Dclk-mt2701.c503 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents,
H A Dclk-mt8173.c552 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel", camtg_parents, 0x0060, 0, 3, 7),
H A Dclk-mt6765.c386 MUX_GATE_CLR_SET_UPD(CLK_TOP_CAMTG_SEL, "camtg_sel",
H A Dclk-mt2712.c754 MUX_GATE(CLK_TOP_CAMTG_SEL, "camtg_sel",