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/rk3399_ARM-atf/plat/intel/soc/common/
H A Dsocfpga_delay_timer.cf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/agilex/include/
H A Dagilex_clock_manager.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
H A Dsocfpga_plat_def.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/stratix10/soc/
H A Ds10_clock_manager.cf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/stratix10/include/
H A Ds10_clock_manager.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
H A Dsocfpga_plat_def.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/common/include/
H A Dsocfpga_private.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
H A Dplatform_def.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/agilex/soc/
H A Dagilex_clock_manager.cf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/n5x/include/
H A Dsocfpga_plat_def.hf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/stratix10/
H A Dplatform.mkf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422
/rk3399_ARM-atf/plat/intel/soc/agilex/
H A Dplatform.mkf65bdf3a54eed8f7651761c25bf6cc7437f4474b Wed Apr 06 02:19:16 UTC 2022 BenjaminLimJL <jit.loon.lim@intel.com> feat(intel): implement timer init divider via cpu frequency. (#1)

Get cpu frequency and update the timer init div with it.
The timer is vary based on the cpu frequency instead of hardcoded.
The implementation shall apply to only Agilex and S10

Signed-off-by: Jit Loon Lim <jit.loon.lim@intel.com>
Change-Id: I61684d9762ad34e5a60b8b176b60c8848db4b422