Searched +full:sun8i +full:- +full:a83t +full:- +full:ccu (Results 1 – 25 of 25) sorted by relevance
6 * This file is dual-licensed: you can use it either under the terms45 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/clock/sun8i-a83t-ccu.h>48 #include <dt-bindings/clock/sun8i-de2.h>49 #include <dt-bindings/clock/sun8i-r-ccu.h>50 #include <dt-bindings/reset/sun8i-a83t-ccu.h>51 #include <dt-bindings/reset/sun8i-de2.h>52 #include <dt-bindings/reset/sun8i-r-ccu.h>53 #include <dt-bindings/thermal/thermal.h>56 interrupt-parent = <&gic>;[all …]
4 * This file is dual-licensed: you can use it either under the terms43 #include <dt-bindings/clock/sun8i-de2.h>44 #include <dt-bindings/clock/sun8i-h3-ccu.h>45 #include <dt-bindings/clock/sun8i-r-ccu.h>46 #include <dt-bindings/interrupt-controller/arm-gic.h>47 #include <dt-bindings/reset/sun8i-de2.h>48 #include <dt-bindings/reset/sun8i-h3-ccu.h>49 #include <dt-bindings/reset/sun8i-r-ccu.h>52 interrupt-parent = <&gic>;53 #address-cells = <1>;[all …]
2 * Copyright 2017 Chen-Yu Tsai <wens@csie.org>5 * This file is dual-licensed: you can use it either under the terms44 #include <dt-bindings/interrupt-controller/arm-gic.h>45 #include <dt-bindings/clock/sun8i-de2.h>46 #include <dt-bindings/clock/sun8i-r40-ccu.h>47 #include <dt-bindings/clock/sun8i-tcon-top.h>48 #include <dt-bindings/reset/sun8i-r40-ccu.h>49 #include <dt-bindings/reset/sun8i-de2.h>50 #include <dt-bindings/thermal/thermal.h>53 #address-cells = <1>;[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/display/allwinner,sun4i-a10-tcon.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>18 "#clock-cells":23 - const: allwinner,sun4i-a10-tcon24 - const: allwinner,sun5i-a13-tcon25 - const: allwinner,sun6i-a31-tcon[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-dw-hdmi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83t DWC HDMI TX Encoder Device Tree Bindings16 the following device-specific properties.19 - Chen-Yu Tsai <wens@csie.org>20 - Maxime Ripard <mripard@kernel.org>23 "#phy-cells":28 - const: allwinner,sun8i-a83t-dw-hdmi[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-a83t-hdmi-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83t HDMI PHY Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#phy-cells":19 - allwinner,sun8i-a83t-hdmi-phy20 - allwinner,sun8i-h3-hdmi-phy[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/phy/allwinner,sun8i-a83t-usb-phy.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83t USB PHY Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#phy-cells":18 const: allwinner,sun8i-a83t-usb-phy22 - description: PHY Control registers[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun4i-a10-ccu.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#clock-cells":17 "#reset-cells":22 - allwinner,sun4i-a10-ccu23 - allwinner,sun5i-a10s-ccu[all …]
1 # SPDX-License-Identifier: GPL-2.0+3 ---4 $id: http://devicetree.org/schemas/clock/allwinner,sun8i-a83t-de2-clk.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83t Display Engine 2/3 Clock Controller Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#clock-cells":17 "#reset-cells":22 - const: allwinner,sun8i-a83t-de2-clk[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/net/allwinner,sun8i-a83t-emac.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner A83t EMAC Device Tree Bindings10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 - const: allwinner,sun8i-a83t-emac17 - const: allwinner,sun8i-h3-emac18 - const: allwinner,sun8i-r40-emac[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/crypto/allwinner,sun8i-ss.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Corentin Labbe <corentin.labbe@gmail.com>15 - allwinner,sun8i-a83t-crypto16 - allwinner,sun9i-a80-crypto26 - description: Bus clock27 - description: Module clock29 clock-names:[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/thermal/allwinner,sun8i-a83t-ths.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#7 title: Allwinner SUN8I Thermal Controller Device Tree Bindings10 - Vasily Khoruzhick <anarsoul@gmail.com>11 - Yangtao Li <tiny.windzz@gmail.com>16 - allwinner,sun8i-a83t-ths17 - allwinner,sun8i-h3-ths18 - allwinner,sun8i-r40-ths[all …]
1 # SPDX-License-Identifier: GPL-2.03 obj-y += ccu_common.o4 obj-y += ccu_mmc_timing.o5 obj-y += ccu_reset.o8 obj-y += ccu_div.o9 obj-y += ccu_frac.o10 obj-y += ccu_gate.o11 obj-y += ccu_mux.o12 obj-y += ccu_mult.o13 obj-y += ccu_phase.o[all …]
1 /* SPDX-License-Identifier: GPL-2.0-or-later */3 * Copyright 2016 Chen-Yu Tsai5 * Chen-Yu Tsai <wens@csie.org>11 #include <dt-bindings/clock/sun8i-a83t-ccu.h>12 #include <dt-bindings/reset/sun8i-a83t-ccu.h>21 /* pll-periph is exported to the PRCM block */26 /* pll-de is exported for the display engine */
1 // SPDX-License-Identifier: GPL-2.0-only6 #include <linux/clk-provider.h>18 #include "ccu-sun8i-r.h"23 { .fw_name = "pll-periph" },59 * non-const so we can change it on the A83T.62 static SUNXI_CCU_GATE_HWS(apb0_pio_clk, "apb0-pio",64 static SUNXI_CCU_GATE_HWS(apb0_ir_clk, "apb0-ir",66 static SUNXI_CCU_GATE_HWS(apb0_timer_clk, "apb0-timer",68 static SUNXI_CCU_GATE_HWS(apb0_rsb_clk, "apb0-rsb",70 static SUNXI_CCU_GATE_HWS(apb0_uart_clk, "apb0-uart",[all …]
1 // SPDX-License-Identifier: GPL-2.0-only7 #include <linux/clk-provider.h>18 #include "ccu-sun8i-de2.h"20 static SUNXI_CCU_GATE(bus_mixer0_clk, "bus-mixer0", "bus-de",22 static SUNXI_CCU_GATE(bus_mixer1_clk, "bus-mixer1", "bus-de",24 static SUNXI_CCU_GATE(bus_wb_clk, "bus-wb", "bus-de",26 static SUNXI_CCU_GATE(bus_rot_clk, "bus-rot", "bus-de",29 static SUNXI_CCU_GATE(mixer0_clk, "mixer0", "mixer0-div",31 static SUNXI_CCU_GATE(mixer1_clk, "mixer1", "mixer1-div",33 static SUNXI_CCU_GATE(wb_clk, "wb", "wb-div",[all …]
1 // SPDX-License-Identifier: GPL-2.0-only3 * Copyright (c) 2017 Chen-Yu Tsai. All rights reserved.6 #include <linux/clk-provider.h>22 #include "ccu-sun8i-a83t.h"29 * Neither mainline Linux, U-boot, nor the vendor BSPs use these.44 .hw.init = CLK_HW_INIT("pll-c0cpux", "osc24M",58 .hw.init = CLK_HW_INIT("pll-c1cpux", "osc24M",92 .hw.init = CLK_HW_INIT("pll-audio", "osc24M",109 .hw.init = CLK_HW_INIT("pll-video0", "osc24M",125 .hw.init = CLK_HW_INIT("pll-ve", "osc24M",[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/pinctrl/allwinner,sun4i-a10-pinctrl.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#gpio-cells":21 "#interrupt-cells":30 - allwinner,sun4i-a10-pinctrl31 - allwinner,sun5i-a10s-pinctrl[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/media/allwinner,sun6i-a31-csi.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>16 - allwinner,sun6i-a31-csi17 - allwinner,sun8i-a83t-csi18 - allwinner,sun8i-h3-csi19 - allwinner,sun8i-v3s-csi[all …]
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)6 #include <dt-bindings/clock/sun50i-a64-ccu.h>7 #include <dt-bindings/clock/sun8i-de2.h>8 #include <dt-bindings/clock/sun8i-r-ccu.h>9 #include <dt-bindings/interrupt-controller/arm-gic.h>10 #include <dt-bindings/reset/sun50i-a64-ccu.h>11 #include <dt-bindings/reset/sun8i-de2.h>12 #include <dt-bindings/reset/sun8i-r-ccu.h>13 #include <dt-bindings/thermal/thermal.h>16 interrupt-parent = <&gic>;[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/mailbox/allwinner,sun6i-a31-msgbox.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Samuel Holland <samuel@sholland.org>13 The hardware message box on sun6i, sun8i, sun9i, and sun50i SoCs is a14 two-user mailbox controller containing 8 unidirectional FIFOs. An interrupt17 hold four 32-bit messages; when a FIFO is full, clients must wait before20 Refer to ./mailbox.txt for generic information about mailbox device-tree26 - items:[all …]
1 # SPDX-License-Identifier: GPL-2.03 ---4 $id: http://devicetree.org/schemas/pwm/allwinner,sun4i-a10-pwm.yaml#5 $schema: http://devicetree.org/meta-schemas/core.yaml#10 - Chen-Yu Tsai <wens@csie.org>11 - Maxime Ripard <mripard@kernel.org>14 "#pwm-cells":19 - const: allwinner,sun4i-a10-pwm20 - const: allwinner,sun5i-a10s-pwm21 - const: allwinner,sun5i-a13-pwm[all …]
1 // SPDX-License-Identifier: GPL-2.03 * Copyright (c) 2018 Chen-Yu Tsai5 * Chen-Yu Tsai <wens@csie.org>7 * arch/arm/mach-sunxi/mc_smp.c9 * Based on Allwinner code, arch/arm/mach-exynos/mcpm-exynos.c, and10 * arch/arm/mach-hisi/platmcpm.c14 #include <linux/arm-cci.h>19 #include <linux/irqchip/arm-gic.h>64 /* The power off register for clusters are different from a80 and a83t */71 /* R_CPUCFG registers, specific to sun8i-a83t */[all …]
1 // SPDX-License-Identifier: GPL-2.0-or-later3 * dwmac-sun8i.c - Allwinner sun8i DWMAC specific glue layer11 #include <linux/mdio-mux.h>26 /* General notes on dwmac-sun8i:31 /* struct emac_variant - Describe dwmac-sun8i hardware variant59 /* struct sunxi_priv_data - hold all sunxi private data68 * @mux_handle: Internal pointer used by mdio-mux lib89 /* EMAC clock register @ 0x164 in the CCU address range */147 * co-packaged AC200 chip instead.267 /* sun8i_dwmac_dma_reset() - reset the EMAC[all …]
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