| /OK3568_Linux_fs/u-boot/arch/arm/dts/ |
| H A D | zynq-zc702.dts | 4 * Copyright (C) 2011 - 2015 Xilinx 7 * SPDX-License-Identifier: GPL-2.0+ 9 /dts-v1/; 10 #include "zynq-7000.dtsi" 14 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; 31 stdout-path = "serial0:115200n8"; 34 gpio-keys { 35 compatible = "gpio-keys"; 36 #address-cells = <1>; 37 #size-cells = <0>; [all …]
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| H A D | zynq-zc706.dts | 4 * Copyright (C) 2011 - 2015 Xilinx 7 * SPDX-License-Identifier: GPL-2.0+ 9 /dts-v1/; 10 #include "zynq-7000.dtsi" 14 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; 31 stdout-path = "serial0:115200n8"; 35 compatible = "usb-nop-xceiv"; 36 #phy-cells = <0>; 41 ps-clk-frequency = <33333333>; 46 phy-mode = "rgmii-id"; [all …]
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| H A D | tegra124-cei-tk1-som.dts | 1 /dts-v1/; 6 model = "Colorado Engineering TK1-SOM"; 7 compatible = "nvidia,cei-tk1-som", "nvidia,tegra124"; 10 stdout-path = &uartd; 32 pcie-controller@01003000 { 35 avddio-pex-supply = <&vdd_1v05_run>; 36 dvddio-pex-supply = <&vdd_1v05_run>; 37 avdd-pex-pll-supply = <&vdd_1v05_run>; 38 hvdd-pex-supply = <&vdd_3v3_lp0>; 39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>; [all …]
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| H A D | tegra124-jetson-tk1.dts | 1 /dts-v1/; 7 compatible = "nvidia,jetson-tk1", "nvidia,tegra124"; 10 stdout-path = &uartd; 32 pcie-controller@01003000 { 35 avddio-pex-supply = <&vdd_1v05_run>; 36 dvddio-pex-supply = <&vdd_1v05_run>; 37 avdd-pex-pll-supply = <&vdd_1v05_run>; 38 hvdd-pex-supply = <&vdd_3v3_lp0>; 39 hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>; 40 vddio-pex-ctl-supply = <&vdd_3v3_lp0>; [all …]
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| H A D | tegra124-nyan.dtsi | 1 #include <dt-bindings/input/input.h> 19 vdd-supply = <&vdd_3v3_hdmi>; 20 pll-supply = <&vdd_hdmi_pll>; 21 hdmi-supply = <&vdd_5v0_hdmi>; 23 nvidia,ddc-i2c-bus = <&hdmi_ddc>; 24 nvidia,hpd-gpio = 36 vdd-supply = <&vdd_3v3_panel>; 52 clock-frequency = <100000>; 54 acodec: audio-codec@10 { 57 interrupt-parent = <&gpio>; [all …]
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| /OK3568_Linux_fs/kernel/arch/arm/boot/dts/ |
| H A D | zynq-zc702.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 #include "zynq-7000.dtsi" 11 compatible = "xlnx,zynq-zc702", "xlnx,zynq-7000"; 27 stdout-path = "serial0:115200n8"; 30 gpio-keys { 31 compatible = "gpio-keys"; 37 wakeup-source; 44 wakeup-source; [all …]
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| H A D | zynq-zc706.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 #include "zynq-7000.dtsi" 11 compatible = "xlnx,zynq-zc706", "xlnx,zynq-7000"; 27 stdout-path = "serial0:115200n8"; 31 compatible = "usb-nop-xceiv"; 32 #phy-cells = <0>; 37 ps-clk-frequency = <33333333>; 42 phy-mode = "rgmii-id"; [all …]
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| H A D | zynq-microzed.dts | 1 // SPDX-License-Identifier: GPL-2.0 3 * Copyright (C) 2011 - 2014 Xilinx 6 /dts-v1/; 7 /include/ "zynq-7000.dtsi" 11 compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000"; 25 stdout-path = "serial0:115200n8"; 29 compatible = "usb-nop-xceiv"; 30 #phy-cells = <0>; 35 ps-clk-frequency = <33333333>; 40 phy-mode = "rgmii-id"; [all …]
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| H A D | qcom-apq8060-dragonboard.dts | 23 #include <dt-bindings/input/input.h> 24 #include <dt-bindings/gpio/gpio.h> 25 #include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 26 #include <dt-bindings/pinctrl/qcom,pmic-mpp.h> 27 #include "qcom-msm8660.dtsi" 31 compatible = "qcom,apq8060-dragonboard", "qcom,msm8660"; 38 stdout-path = "serial0:115200n8"; 42 compatible = "simple-bus"; 45 vph: regulator-fixed { 46 compatible = "regulator-fixed"; [all …]
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| H A D | tegra124-nyan.dtsi | 1 // SPDX-License-Identifier: GPL-2.0 2 #include <dt-bindings/input/input.h> 13 stdout-path = "serial0:115200n8"; 19 * missing a unit-address. However, the bootloader on these Chromebook 21 * Adding the unit-address causes the bootloader to create a /memory 33 /delete-node/ memory@80000000; 39 vdd-supply = <&vdd_3v3_hdmi>; 40 pll-supply = <&vdd_hdmi_pll>; 41 hdmi-supply = <&vdd_5v0_hdmi>; 43 nvidia,ddc-i2c-bus = <&hdmi_ddc>; [all …]
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| /OK3568_Linux_fs/buildroot/board/qmtech/zynq/patches/linux/ |
| H A D | 0001-DTS-for-QMTech-Zynq-starter-kit.patch | 6 Signed-off-by: Martin Chabot <martin.chabot@gmail.com> 7 Signed-off-by: Julien Olivain <juju@cotds.org> 8 --- 9 arch/arm/boot/dts/zynq-qmtech.dts | 397 ++++++++++++++++++++++++++++++ 11 create mode 100644 arch/arm/boot/dts/zynq-qmtech.dts 13 diff --git a/arch/arm/boot/dts/zynq-qmtech.dts b/arch/arm/boot/dts/zynq-qmtech.dts 16 --- /dev/null 17 +++ b/arch/arm/boot/dts/zynq-qmtech.dts 18 @@ -0,0 +1,397 @@ 19 +// SPDX-License-Identifier: GPL-2.0+ [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/ |
| H A D | pincfg-node.yaml | 1 # SPDX-License-Identifier: GPL-2.0-only 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/pincfg-node.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Linus Walleij <linus.walleij@linaro.org> 21 bias-disable: 23 description: disable any pin bias 25 bias-high-impedance: 27 description: high impedance mode ("third-state", "floating") 29 bias-bus-hold: [all …]
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| H A D | xlnx,zynq-pinctrl.txt | 4 - compatible: "xlnx,zynq-pinctrl" 5 - syscon: phandle to SLCR 6 - reg: Offset and length of pinctrl space in SLCR 8 Please refer to pinctrl-bindings.txt in this directory for details of the 16 parameters, such as pull-up, slew rate, etc. 25 - groups: A list of pinmux groups. 26 - function: The name of a pinmux function to activate for the specified set 31 - pins: a list of pin names 32 - groups: A list of pinmux groups. 34 The following generic properties as defined in pinctrl-bindings.txt are valid [all …]
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| H A D | img,pistachio-pinctrl.txt | 8 each. The GPIO banks are represented as sub-nodes of the pad controller node. 10 Please refer to pinctrl-bindings.txt, ../gpio/gpio.txt, and 11 ../interrupt-controller/interrupts.txt for generic information regarding 15 -------------------------------------------- 16 - compatible: "img,pistachio-system-pinctrl". 17 - reg: Address range of the pinctrl registers. 19 Required properties for GPIO bank sub-nodes: 20 -------------------------------------------- 21 - interrupts: Interrupt line for the GPIO bank. 22 - gpio-controller: Indicates the device is a GPIO controller. [all …]
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| H A D | actions,s900-pinctrl.txt | 7 - compatible: Should be "actions,s900-pinctrl" 8 - reg: Should contain the register base address and size of 10 - clocks: phandle of the clock feeding the pin controller 11 - gpio-controller: Marks the device node as a GPIO controller. 12 - gpio-ranges: Specifies the mapping between gpio controller and 13 pin-controller pins. 14 - #gpio-cells: Should be two. The first cell is the gpio pin number 16 - interrupt-controller: Marks the device node as an interrupt controller. 17 - #interrupt-cells: Specifies the number of cells needed to encode an 21 bindings/interrupt-controller/interrupts.txt [all …]
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| H A D | renesas,rzn1-pinctrl.yaml | 1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) 3 --- 4 $id: http://devicetree.org/schemas/pinctrl/renesas,rzn1-pinctrl.yaml# 5 $schema: http://devicetree.org/meta-schemas/core.yaml# 10 - Gareth Williams <gareth.williams.jx@renesas.com> 11 - Geert Uytterhoeven <geert+renesas@glider.be> 16 - enum: 17 - renesas,r9a06g032-pinctrl # RZ/N1D 18 - renesas,r9a06g033-pinctrl # RZ/N1S 19 - const: renesas,rzn1-pinctrl # Generic RZ/N1 [all …]
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| H A D | qcom,pmic-mpp.txt | 1 Qualcomm PMIC Multi-Purpose Pin (MPP) block 6 - compatible: 10 "qcom,pm8018-mpp", 11 "qcom,pm8038-mpp", 12 "qcom,pm8058-mpp", 13 "qcom,pm8821-mpp", 14 "qcom,pm8841-mpp", 15 "qcom,pm8916-mpp", 16 "qcom,pm8917-mpp", 17 "qcom,pm8921-mpp", [all …]
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| H A D | qcom,pmic-gpio.txt | 6 - compatible: 10 "qcom,pm8005-gpio" 11 "qcom,pm8018-gpio" 12 "qcom,pm8038-gpio" 13 "qcom,pm8058-gpio" 14 "qcom,pm8916-gpio" 15 "qcom,pm8917-gpio" 16 "qcom,pm8921-gpio" 17 "qcom,pm8941-gpio" 18 "qcom,pm8950-gpio" [all …]
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| /OK3568_Linux_fs/u-boot/doc/device-tree-bindings/pinctrl/ |
| H A D | pinctrl-bindings.txt | 4 such as pull-up/down, tri-state, drive-strength etc are designated as pin 15 need to reconfigure pins at run-time, for example to tri-state pins when the 47 pinctrl-0: List of phandles, each pointing at a pin configuration 65 pinctrl-1: List of phandles, each pointing at a pin configuration 68 pinctrl-n: List of phandles, each pointing at a pin configuration 70 pinctrl-names: The list of names to assign states. List entry 0 defines the 78 pinctrl-names = "active", "idle"; 79 pinctrl-0 = <&state_0_node_a>; 80 pinctrl-1 = <&state_1_node_a &state_1_node_b>; 85 pinctrl-0 = <&state_0_node_a>; [all …]
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| /OK3568_Linux_fs/kernel/drivers/pinctrl/ |
| H A D | pinconf-generic.c | 1 // SPDX-License-Identifier: GPL-2.0-only 5 * Copyright (C) 2011 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 22 #include <linux/pinctrl/pinconf-generic.h> 26 #include "pinctrl-utils.h" 30 PCONFDUMP(PIN_CONFIG_BIAS_BUS_HOLD, "input bias bus hold", NULL, false), 31 PCONFDUMP(PIN_CONFIG_BIAS_DISABLE, "input bias disabled", NULL, false), 32 PCONFDUMP(PIN_CONFIG_BIAS_HIGH_IMPEDANCE, "input bias high impedance", NULL, false), 33 PCONFDUMP(PIN_CONFIG_BIAS_PULL_DOWN, "input bias pull down", "ohms", true), 35 "input bias pull to pin specific state", "ohms", true), [all …]
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| /OK3568_Linux_fs/kernel/include/linux/pinctrl/ |
| H A D | pinconf-generic.h | 1 /* SPDX-License-Identifier: GPL-2.0-only */ 5 * Copyright (C) 2011 ST-Ericsson SA 6 * Written on behalf of Linaro for ST-Ericsson 21 * enum pin_config_param - possible pin configuration parameters 25 * bus to change the value by driving the bus high or low and switching to 27 * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a 28 * transition from say pull-up to pull-down implies that you disable 29 * pull-up in the process, this setting disables all biasing. 30 * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance 31 * mode, also know as "third-state" (tristate) or "high-Z" or "floating". [all …]
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| /OK3568_Linux_fs/u-boot/drivers/pinctrl/ |
| H A D | pinctrl-sandbox.c | 4 * SPDX-License-Identifier: GPL-2.0+ 34 { "bias-disable", PIN_CONFIG_BIAS_DISABLE, 0 }, 35 { "bias-high-impedance", PIN_CONFIG_BIAS_HIGH_IMPEDANCE, 0 }, 36 { "bias-bus-hold", PIN_CONFIG_BIAS_BUS_HOLD, 0 }, 37 { "bias-pull-up", PIN_CONFIG_BIAS_PULL_UP, 1 }, 38 { "bias-pull-down", PIN_CONFIG_BIAS_PULL_DOWN, 1 }, 39 { "bias-pull-pin-default", PIN_CONFIG_BIAS_PULL_PIN_DEFAULT, 1 }, 40 { "drive-open-drain", PIN_CONFIG_DRIVE_OPEN_DRAIN, 0 }, 41 { "drive-open-source", PIN_CONFIG_DRIVE_OPEN_SOURCE, 0 }, 42 { "drive-strength", PIN_CONFIG_DRIVE_STRENGTH, 0 }, [all …]
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| /OK3568_Linux_fs/kernel/drivers/acpi/acpica/ |
| H A D | utresdecode.c | 1 // SPDX-License-Identifier: BSD-3-Clause OR GPL-2.0 4 * Module Name: utresdecode - Resource descriptor keyword strings 28 "0 - Good Configuration", 29 "1 - Acceptable Configuration", 30 "2 - Suboptimal Configuration", 31 "3 - ***Invalid Configuration***", 264 "Bias Pull-up", 265 "Bias Pull-down", 266 "Bias Default", 267 "Bias Disable", [all …]
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| /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/ |
| H A D | as3722.txt | 4 ------------------- 5 - compatible: Must be "ams,as3722". 6 - reg: I2C device address. 7 - interrupt-controller: AS3722 has internal interrupt controller which takes the 8 interrupt request from internal sub-blocks like RTC, regulators, GPIOs as well 10 - #interrupt-cells: Should be set to 2 for IRQ number and flags. 12 of AS3722 are defined at dt-bindings/mfd/as3722.h 14 interrupts.txt, using dt-bindings/irq. 17 -------------------- 18 - ams,enable-internal-int-pullup: Boolean property, to enable internal pullup on [all …]
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| /OK3568_Linux_fs/u-boot/include/dm/ |
| H A D | pinctrl.h | 4 * SPDX-License-Identifier: GPL-2.0+ 11 * struct pinconf_param - pin config parameters 25 * struct pinctrl_ops - pin control operations, to be implemented by 45 * in this driver. (necessary for pin-muxing) 48 * certain device to. (necessary for pin-muxing) 52 * may be ignored. (necessary for pin-muxing against a single pin) 57 * (necessary for pin-muxing against a pin group) 58 * @pinconf_num_params: number of driver-specific parameters to be parsed 59 * from device trees (necessary for pin-configuration) 61 * device trees (necessary for pin-configuration) [all …]
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