xref: /OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/qcom,pmic-mpp.txt (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593SmuzhiyunQualcomm PMIC Multi-Purpose Pin (MPP) block
2*4882a593Smuzhiyun
3*4882a593SmuzhiyunThis binding describes the MPP block(s) found in the 8xxx series
4*4882a593Smuzhiyunof PMIC's from Qualcomm.
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun- compatible:
7*4882a593Smuzhiyun	Usage: required
8*4882a593Smuzhiyun	Value type: <string>
9*4882a593Smuzhiyun	Definition: Should contain one of:
10*4882a593Smuzhiyun		    "qcom,pm8018-mpp",
11*4882a593Smuzhiyun		    "qcom,pm8038-mpp",
12*4882a593Smuzhiyun		    "qcom,pm8058-mpp",
13*4882a593Smuzhiyun		    "qcom,pm8821-mpp",
14*4882a593Smuzhiyun		    "qcom,pm8841-mpp",
15*4882a593Smuzhiyun		    "qcom,pm8916-mpp",
16*4882a593Smuzhiyun		    "qcom,pm8917-mpp",
17*4882a593Smuzhiyun		    "qcom,pm8921-mpp",
18*4882a593Smuzhiyun		    "qcom,pm8941-mpp",
19*4882a593Smuzhiyun		    "qcom,pm8950-mpp",
20*4882a593Smuzhiyun		    "qcom,pmi8950-mpp",
21*4882a593Smuzhiyun		    "qcom,pm8994-mpp",
22*4882a593Smuzhiyun		    "qcom,pma8084-mpp",
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun		    And must contain either "qcom,spmi-mpp" or "qcom,ssbi-mpp"
25*4882a593Smuzhiyun		    if the device is on an spmi bus or an ssbi bus respectively.
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun- reg:
28*4882a593Smuzhiyun	Usage: required
29*4882a593Smuzhiyun	Value type: <prop-encoded-array>
30*4882a593Smuzhiyun	Definition: Register base of the MPP block and length.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun- interrupts:
33*4882a593Smuzhiyun	Usage: required
34*4882a593Smuzhiyun	Value type: <prop-encoded-array>
35*4882a593Smuzhiyun	Definition: Must contain an array of encoded interrupt specifiers for
36*4882a593Smuzhiyun		    each available MPP
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun- gpio-controller:
39*4882a593Smuzhiyun	Usage: required
40*4882a593Smuzhiyun	Value type: <none>
41*4882a593Smuzhiyun	Definition: Mark the device node as a GPIO controller
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun- #gpio-cells:
44*4882a593Smuzhiyun	Usage: required
45*4882a593Smuzhiyun	Value type: <u32>
46*4882a593Smuzhiyun	Definition: Must be 2;
47*4882a593Smuzhiyun		    the first cell will be used to define MPP number and the
48*4882a593Smuzhiyun		    second denotes the flags for this MPP
49*4882a593Smuzhiyun
50*4882a593SmuzhiyunPlease refer to ../gpio/gpio.txt and ../interrupt-controller/interrupts.txt for
51*4882a593Smuzhiyuna general description of GPIO and interrupt bindings.
52*4882a593Smuzhiyun
53*4882a593SmuzhiyunPlease refer to pinctrl-bindings.txt in this directory for details of the
54*4882a593Smuzhiyuncommon pinctrl bindings used by client devices, including the meaning of the
55*4882a593Smuzhiyunphrase "pin configuration node".
56*4882a593Smuzhiyun
57*4882a593SmuzhiyunThe pin configuration nodes act as a container for an arbitrary number of
58*4882a593Smuzhiyunsubnodes. Each of these subnodes represents some desired configuration for a
59*4882a593Smuzhiyunpin or a list of pins. This configuration can include the
60*4882a593Smuzhiyunmux function to select on those pin(s), and various pin configuration
61*4882a593Smuzhiyunparameters, as listed below.
62*4882a593Smuzhiyun
63*4882a593SmuzhiyunSUBNODES:
64*4882a593Smuzhiyun
65*4882a593SmuzhiyunThe name of each subnode is not important; all subnodes should be enumerated
66*4882a593Smuzhiyunand processed purely based on their content.
67*4882a593Smuzhiyun
68*4882a593SmuzhiyunEach subnode only affects those parameters that are explicitly listed. In
69*4882a593Smuzhiyunother words, a subnode that lists a mux function but no pin configuration
70*4882a593Smuzhiyunparameters implies no information about any pin configuration parameters.
71*4882a593SmuzhiyunSimilarly, a pin subnode that describes a pullup parameter implies no
72*4882a593Smuzhiyuninformation about e.g. the mux function.
73*4882a593Smuzhiyun
74*4882a593SmuzhiyunThe following generic properties as defined in pinctrl-bindings.txt are valid
75*4882a593Smuzhiyunto specify in a pin configuration subnode:
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun- pins:
78*4882a593Smuzhiyun	Usage: required
79*4882a593Smuzhiyun	Value type: <string-array>
80*4882a593Smuzhiyun	Definition: List of MPP pins affected by the properties specified in
81*4882a593Smuzhiyun		    this subnode.  Valid pins are:
82*4882a593Smuzhiyun		    mpp1-mpp4 for pm8841
83*4882a593Smuzhiyun		    mpp1-mpp4 for pm8916
84*4882a593Smuzhiyun		    mpp1-mpp8 for pm8941
85*4882a593Smuzhiyun		    mpp1-mpp4 for pm8950
86*4882a593Smuzhiyun		    mpp1-mpp4 for pmi8950
87*4882a593Smuzhiyun		    mpp1-mpp4 for pma8084
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun- function:
90*4882a593Smuzhiyun	Usage: required
91*4882a593Smuzhiyun	Value type: <string>
92*4882a593Smuzhiyun	Definition: Specify the alternative function to be configured for the
93*4882a593Smuzhiyun		    specified pins.  Valid values are:
94*4882a593Smuzhiyun		    "digital",
95*4882a593Smuzhiyun		    "analog",
96*4882a593Smuzhiyun		    "sink"
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun- bias-disable:
99*4882a593Smuzhiyun	Usage: optional
100*4882a593Smuzhiyun	Value type: <none>
101*4882a593Smuzhiyun	Definition: The specified pins should be configured as no pull.
102*4882a593Smuzhiyun
103*4882a593Smuzhiyun- bias-pull-up:
104*4882a593Smuzhiyun	Usage: optional
105*4882a593Smuzhiyun	Value type: <u32>
106*4882a593Smuzhiyun	Definition: The specified pins should be configured as pull up.
107*4882a593Smuzhiyun		    Valid values are 600, 10000 and 30000 in bidirectional mode
108*4882a593Smuzhiyun		    only, i.e. when operating in qcom,analog-mode and input and
109*4882a593Smuzhiyun		    outputs are enabled. The hardware ignores the configuration
110*4882a593Smuzhiyun		    when operating in other modes.
111*4882a593Smuzhiyun
112*4882a593Smuzhiyun- bias-high-impedance:
113*4882a593Smuzhiyun	Usage: optional
114*4882a593Smuzhiyun	Value type: <none>
115*4882a593Smuzhiyun	Definition: The specified pins will put in high-Z mode and disabled.
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun- input-enable:
118*4882a593Smuzhiyun	Usage: optional
119*4882a593Smuzhiyun	Value type: <none>
120*4882a593Smuzhiyun	Definition: The specified pins are put in input mode, i.e. their input
121*4882a593Smuzhiyun		    buffer is enabled
122*4882a593Smuzhiyun
123*4882a593Smuzhiyun- output-high:
124*4882a593Smuzhiyun	Usage: optional
125*4882a593Smuzhiyun	Value type: <none>
126*4882a593Smuzhiyun	Definition: The specified pins are configured in output mode, driven
127*4882a593Smuzhiyun		    high.
128*4882a593Smuzhiyun
129*4882a593Smuzhiyun- output-low:
130*4882a593Smuzhiyun	Usage: optional
131*4882a593Smuzhiyun	Value type: <none>
132*4882a593Smuzhiyun	Definition: The specified pins are configured in output mode, driven
133*4882a593Smuzhiyun		    low.
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun- power-source:
136*4882a593Smuzhiyun	Usage: optional
137*4882a593Smuzhiyun	Value type: <u32>
138*4882a593Smuzhiyun	Definition: Selects the power source for the specified pins. Valid power
139*4882a593Smuzhiyun		    sources are defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun- qcom,analog-level:
142*4882a593Smuzhiyun	Usage: optional
143*4882a593Smuzhiyun	Value type: <u32>
144*4882a593Smuzhiyun	Definition: Selects the source for analog output. Valued values are
145*4882a593Smuzhiyun		    defined in <dt-binding/pinctrl/qcom,pmic-mpp.h>
146*4882a593Smuzhiyun		    PMIC_MPP_AOUT_LVL_*
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun- qcom,dtest:
149*4882a593Smuzhiyun	Usage: optional
150*4882a593Smuzhiyun	Value type: <u32>
151*4882a593Smuzhiyun	Definition: Selects which dtest rail to be routed in the various functions.
152*4882a593Smuzhiyun		    Valid values are 1-4
153*4882a593Smuzhiyun
154*4882a593Smuzhiyun- qcom,amux-route:
155*4882a593Smuzhiyun	Usage: optional
156*4882a593Smuzhiyun	Value type: <u32>
157*4882a593Smuzhiyun	Definition: Selects the source for analog input. Valid values are
158*4882a593Smuzhiyun		    defined in <dt-bindings/pinctrl/qcom,pmic-mpp.h>
159*4882a593Smuzhiyun		    PMIC_MPP_AMUX_ROUTE_CH5, PMIC_MPP_AMUX_ROUTE_CH6...
160*4882a593Smuzhiyun- qcom,paired:
161*4882a593Smuzhiyun	Usage: optional
162*4882a593Smuzhiyun	Value type: <none>
163*4882a593Smuzhiyun	Definition: Indicates that the pin should be operating in paired mode.
164*4882a593Smuzhiyun
165*4882a593SmuzhiyunExample:
166*4882a593Smuzhiyun
167*4882a593Smuzhiyun	mpps@a000 {
168*4882a593Smuzhiyun		compatible = "qcom,pm8841-mpp", "qcom,spmi-mpp";
169*4882a593Smuzhiyun		reg = <0xa000>;
170*4882a593Smuzhiyun		gpio-controller;
171*4882a593Smuzhiyun		#gpio-cells = <2>;
172*4882a593Smuzhiyun		interrupts = <4 0xa0 0 0>, <4 0xa1 0 0>, <4 0xa2 0 0>, <4 0xa3 0 0>;
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun		pinctrl-names = "default";
175*4882a593Smuzhiyun		pinctrl-0 = <&pm8841_default>;
176*4882a593Smuzhiyun
177*4882a593Smuzhiyun		pm8841_default: default {
178*4882a593Smuzhiyun			gpio {
179*4882a593Smuzhiyun				pins = "mpp1", "mpp2", "mpp3", "mpp4";
180*4882a593Smuzhiyun				function = "digital";
181*4882a593Smuzhiyun				input-enable;
182*4882a593Smuzhiyun				power-source = <PM8841_MPP_S3>;
183*4882a593Smuzhiyun			};
184*4882a593Smuzhiyun		};
185*4882a593Smuzhiyun	};
186