xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/zynq-microzed.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981) 
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2011 - 2014 Xilinx
4*4882a593Smuzhiyun * Copyright (C) 2016 Jagan Teki <jteki@openedev.com>
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun/include/ "zynq-7000.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "Avnet MicroZed board";
11*4882a593Smuzhiyun	compatible = "avnet,zynq-microzed", "xlnx,zynq-microzed", "xlnx,zynq-7000";
12*4882a593Smuzhiyun
13*4882a593Smuzhiyun	aliases {
14*4882a593Smuzhiyun		ethernet0 = &gem0;
15*4882a593Smuzhiyun		serial0 = &uart1;
16*4882a593Smuzhiyun	};
17*4882a593Smuzhiyun
18*4882a593Smuzhiyun	memory@0 {
19*4882a593Smuzhiyun		device_type = "memory";
20*4882a593Smuzhiyun		reg = <0x0 0x40000000>;
21*4882a593Smuzhiyun	};
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun	chosen {
24*4882a593Smuzhiyun		bootargs = "earlycon";
25*4882a593Smuzhiyun		stdout-path = "serial0:115200n8";
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	usb_phy0: phy0 {
29*4882a593Smuzhiyun		compatible = "usb-nop-xceiv";
30*4882a593Smuzhiyun		#phy-cells = <0>;
31*4882a593Smuzhiyun	};
32*4882a593Smuzhiyun};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun&clkc {
35*4882a593Smuzhiyun	ps-clk-frequency = <33333333>;
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&gem0 {
39*4882a593Smuzhiyun	status = "okay";
40*4882a593Smuzhiyun	phy-mode = "rgmii-id";
41*4882a593Smuzhiyun	phy-handle = <&ethernet_phy>;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun	ethernet_phy: ethernet-phy@0 {
44*4882a593Smuzhiyun		reg = <0>;
45*4882a593Smuzhiyun	};
46*4882a593Smuzhiyun};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun&sdhci0 {
49*4882a593Smuzhiyun	status = "okay";
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&uart1 {
53*4882a593Smuzhiyun	status = "okay";
54*4882a593Smuzhiyun};
55*4882a593Smuzhiyun
56*4882a593Smuzhiyun&usb0 {
57*4882a593Smuzhiyun	status = "okay";
58*4882a593Smuzhiyun	dr_mode = "host";
59*4882a593Smuzhiyun	usb-phy = <&usb_phy0>;
60*4882a593Smuzhiyun	pinctrl-names = "default";
61*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_usb0_default>;
62*4882a593Smuzhiyun};
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun&pinctrl0 {
65*4882a593Smuzhiyun	pinctrl_usb0_default: usb0-default {
66*4882a593Smuzhiyun		mux {
67*4882a593Smuzhiyun			groups = "usb0_0_grp";
68*4882a593Smuzhiyun			function = "usb0";
69*4882a593Smuzhiyun		};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun		conf {
72*4882a593Smuzhiyun			groups = "usb0_0_grp";
73*4882a593Smuzhiyun			slew-rate = <0>;
74*4882a593Smuzhiyun			io-standard = <1>;
75*4882a593Smuzhiyun		};
76*4882a593Smuzhiyun
77*4882a593Smuzhiyun		conf-rx {
78*4882a593Smuzhiyun			pins = "MIO29", "MIO31", "MIO36";
79*4882a593Smuzhiyun			bias-high-impedance;
80*4882a593Smuzhiyun		};
81*4882a593Smuzhiyun
82*4882a593Smuzhiyun		conf-tx {
83*4882a593Smuzhiyun			pins = "MIO28", "MIO30", "MIO32", "MIO33", "MIO34",
84*4882a593Smuzhiyun			       "MIO35", "MIO37", "MIO38", "MIO39";
85*4882a593Smuzhiyun			bias-disable;
86*4882a593Smuzhiyun		};
87*4882a593Smuzhiyun	};
88*4882a593Smuzhiyun};
89