1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 3*4882a593Smuzhiyun#include "tegra124.dtsi" 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun/ { 6*4882a593Smuzhiyun aliases { 7*4882a593Smuzhiyun rtc0 = "/i2c@7000d000/pmic@40"; 8*4882a593Smuzhiyun rtc1 = "/rtc@7000e000"; 9*4882a593Smuzhiyun serial0 = &uarta; 10*4882a593Smuzhiyun }; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun chosen { 13*4882a593Smuzhiyun stdout-path = "serial0:115200n8"; 14*4882a593Smuzhiyun }; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun /* 17*4882a593Smuzhiyun * Note that recent version of the device tree compiler (starting with 18*4882a593Smuzhiyun * version 1.4.2) warn about this node containing a reg property, but 19*4882a593Smuzhiyun * missing a unit-address. However, the bootloader on these Chromebook 20*4882a593Smuzhiyun * devices relies on the full name of this node to be exactly /memory. 21*4882a593Smuzhiyun * Adding the unit-address causes the bootloader to create a /memory 22*4882a593Smuzhiyun * node and write the memory bank configuration to that node, which in 23*4882a593Smuzhiyun * turn leads the kernel to believe that the device has 2 GiB of 24*4882a593Smuzhiyun * memory instead of the amount detected by the bootloader. 25*4882a593Smuzhiyun * 26*4882a593Smuzhiyun * The name of this node is effectively ABI and must not be changed. 27*4882a593Smuzhiyun */ 28*4882a593Smuzhiyun memory { 29*4882a593Smuzhiyun device_type = "memory"; 30*4882a593Smuzhiyun reg = <0x0 0x80000000 0x0 0x80000000>; 31*4882a593Smuzhiyun }; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun /delete-node/ memory@80000000; 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun host1x@50000000 { 36*4882a593Smuzhiyun hdmi@54280000 { 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun vdd-supply = <&vdd_3v3_hdmi>; 40*4882a593Smuzhiyun pll-supply = <&vdd_hdmi_pll>; 41*4882a593Smuzhiyun hdmi-supply = <&vdd_5v0_hdmi>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun nvidia,ddc-i2c-bus = <&hdmi_ddc>; 44*4882a593Smuzhiyun nvidia,hpd-gpio = 45*4882a593Smuzhiyun <&gpio TEGRA_GPIO(N, 7) GPIO_ACTIVE_HIGH>; 46*4882a593Smuzhiyun }; 47*4882a593Smuzhiyun 48*4882a593Smuzhiyun sor@54540000 { 49*4882a593Smuzhiyun status = "okay"; 50*4882a593Smuzhiyun 51*4882a593Smuzhiyun avdd-io-hdmi-dp-supply = <&vdd_3v3_hdmi>; 52*4882a593Smuzhiyun vdd-hdmi-dp-pll-supply = <&vdd_hdmi_pll>; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun nvidia,dpaux = <&dpaux>; 55*4882a593Smuzhiyun nvidia,panel = <&panel>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun dpaux@545c0000 { 59*4882a593Smuzhiyun vdd-supply = <&vdd_3v3_panel>; 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun }; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun gpu@0,57000000 { 65*4882a593Smuzhiyun status = "okay"; 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun vdd-supply = <&vdd_gpu>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun serial@70006000 { 71*4882a593Smuzhiyun /* Debug connector on the bottom of the board near SD card. */ 72*4882a593Smuzhiyun status = "okay"; 73*4882a593Smuzhiyun }; 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun pwm@7000a000 { 76*4882a593Smuzhiyun status = "okay"; 77*4882a593Smuzhiyun }; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun i2c@7000c000 { 80*4882a593Smuzhiyun status = "okay"; 81*4882a593Smuzhiyun clock-frequency = <100000>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun acodec: audio-codec@10 { 84*4882a593Smuzhiyun compatible = "maxim,max98090"; 85*4882a593Smuzhiyun reg = <0x10>; 86*4882a593Smuzhiyun interrupt-parent = <&gpio>; 87*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(H, 4) IRQ_TYPE_EDGE_FALLING>; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun temperature-sensor@4c { 91*4882a593Smuzhiyun compatible = "ti,tmp451"; 92*4882a593Smuzhiyun reg = <0x4c>; 93*4882a593Smuzhiyun interrupt-parent = <&gpio>; 94*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(I, 6) IRQ_TYPE_LEVEL_LOW>; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun #thermal-sensor-cells = <1>; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun }; 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun i2c@7000c400 { 101*4882a593Smuzhiyun status = "okay"; 102*4882a593Smuzhiyun clock-frequency = <100000>; 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun trackpad@15 { 105*4882a593Smuzhiyun compatible = "elan,ekth3000"; 106*4882a593Smuzhiyun reg = <0x15>; 107*4882a593Smuzhiyun interrupt-parent = <&gpio>; 108*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(W, 3) IRQ_TYPE_EDGE_FALLING>; 109*4882a593Smuzhiyun wakeup-source; 110*4882a593Smuzhiyun }; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun i2c@7000c500 { 114*4882a593Smuzhiyun status = "okay"; 115*4882a593Smuzhiyun clock-frequency = <400000>; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun tpm@20 { 118*4882a593Smuzhiyun compatible = "infineon,slb9645tt"; 119*4882a593Smuzhiyun reg = <0x20>; 120*4882a593Smuzhiyun }; 121*4882a593Smuzhiyun }; 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun hdmi_ddc: i2c@7000c700 { 124*4882a593Smuzhiyun status = "okay"; 125*4882a593Smuzhiyun clock-frequency = <100000>; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun 128*4882a593Smuzhiyun i2c@7000d000 { 129*4882a593Smuzhiyun status = "okay"; 130*4882a593Smuzhiyun clock-frequency = <400000>; 131*4882a593Smuzhiyun 132*4882a593Smuzhiyun pmic: pmic@40 { 133*4882a593Smuzhiyun compatible = "ams,as3722"; 134*4882a593Smuzhiyun reg = <0x40>; 135*4882a593Smuzhiyun interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>; 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun ams,system-power-controller; 138*4882a593Smuzhiyun 139*4882a593Smuzhiyun #interrupt-cells = <2>; 140*4882a593Smuzhiyun interrupt-controller; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun gpio-controller; 143*4882a593Smuzhiyun #gpio-cells = <2>; 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun pinctrl-names = "default"; 146*4882a593Smuzhiyun pinctrl-0 = <&as3722_default>; 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun as3722_default: pinmux { 149*4882a593Smuzhiyun gpio0 { 150*4882a593Smuzhiyun pins = "gpio0"; 151*4882a593Smuzhiyun function = "gpio"; 152*4882a593Smuzhiyun bias-pull-down; 153*4882a593Smuzhiyun }; 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun gpio1 { 156*4882a593Smuzhiyun pins = "gpio1"; 157*4882a593Smuzhiyun function = "gpio"; 158*4882a593Smuzhiyun bias-pull-up; 159*4882a593Smuzhiyun }; 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun gpio2_4_7 { 162*4882a593Smuzhiyun pins = "gpio2", "gpio4", "gpio7"; 163*4882a593Smuzhiyun function = "gpio"; 164*4882a593Smuzhiyun bias-pull-up; 165*4882a593Smuzhiyun }; 166*4882a593Smuzhiyun 167*4882a593Smuzhiyun gpio3_6 { 168*4882a593Smuzhiyun pins = "gpio3", "gpio6"; 169*4882a593Smuzhiyun bias-high-impedance; 170*4882a593Smuzhiyun }; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun gpio5 { 173*4882a593Smuzhiyun pins = "gpio5"; 174*4882a593Smuzhiyun function = "clk32k-out"; 175*4882a593Smuzhiyun bias-pull-down; 176*4882a593Smuzhiyun }; 177*4882a593Smuzhiyun }; 178*4882a593Smuzhiyun 179*4882a593Smuzhiyun regulators { 180*4882a593Smuzhiyun vsup-sd2-supply = <&vdd_5v0_sys>; 181*4882a593Smuzhiyun vsup-sd3-supply = <&vdd_5v0_sys>; 182*4882a593Smuzhiyun vsup-sd4-supply = <&vdd_5v0_sys>; 183*4882a593Smuzhiyun vsup-sd5-supply = <&vdd_5v0_sys>; 184*4882a593Smuzhiyun vin-ldo0-supply = <&vdd_1v35_lp0>; 185*4882a593Smuzhiyun vin-ldo1-6-supply = <&vdd_3v3_run>; 186*4882a593Smuzhiyun vin-ldo2-5-7-supply = <&vddio_1v8>; 187*4882a593Smuzhiyun vin-ldo3-4-supply = <&vdd_3v3_sys>; 188*4882a593Smuzhiyun vin-ldo9-10-supply = <&vdd_5v0_sys>; 189*4882a593Smuzhiyun vin-ldo11-supply = <&vdd_3v3_run>; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun vdd_cpu: sd0 { 192*4882a593Smuzhiyun regulator-name = "+VDD_CPU_AP"; 193*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 194*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 195*4882a593Smuzhiyun regulator-min-microamp = <3500000>; 196*4882a593Smuzhiyun regulator-max-microamp = <3500000>; 197*4882a593Smuzhiyun regulator-always-on; 198*4882a593Smuzhiyun regulator-boot-on; 199*4882a593Smuzhiyun ams,ext-control = <2>; 200*4882a593Smuzhiyun }; 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun sd1 { 203*4882a593Smuzhiyun regulator-name = "+VDD_CORE"; 204*4882a593Smuzhiyun regulator-min-microvolt = <700000>; 205*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 206*4882a593Smuzhiyun regulator-min-microamp = <2500000>; 207*4882a593Smuzhiyun regulator-max-microamp = <4000000>; 208*4882a593Smuzhiyun regulator-always-on; 209*4882a593Smuzhiyun regulator-boot-on; 210*4882a593Smuzhiyun ams,ext-control = <1>; 211*4882a593Smuzhiyun }; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun vdd_1v35_lp0: sd2 { 214*4882a593Smuzhiyun regulator-name = "+1.35V_LP0(sd2)"; 215*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 216*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 217*4882a593Smuzhiyun regulator-always-on; 218*4882a593Smuzhiyun regulator-boot-on; 219*4882a593Smuzhiyun }; 220*4882a593Smuzhiyun 221*4882a593Smuzhiyun sd3 { 222*4882a593Smuzhiyun regulator-name = "+1.35V_LP0(sd3)"; 223*4882a593Smuzhiyun regulator-min-microvolt = <1350000>; 224*4882a593Smuzhiyun regulator-max-microvolt = <1350000>; 225*4882a593Smuzhiyun regulator-always-on; 226*4882a593Smuzhiyun regulator-boot-on; 227*4882a593Smuzhiyun }; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun vdd_1v05_run: sd4 { 230*4882a593Smuzhiyun regulator-name = "+1.05V_RUN"; 231*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 232*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 233*4882a593Smuzhiyun }; 234*4882a593Smuzhiyun 235*4882a593Smuzhiyun vddio_1v8: sd5 { 236*4882a593Smuzhiyun regulator-name = "+1.8V_VDDIO"; 237*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 238*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 239*4882a593Smuzhiyun regulator-always-on; 240*4882a593Smuzhiyun }; 241*4882a593Smuzhiyun 242*4882a593Smuzhiyun vdd_gpu: sd6 { 243*4882a593Smuzhiyun regulator-name = "+VDD_GPU_AP"; 244*4882a593Smuzhiyun regulator-min-microvolt = <650000>; 245*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 246*4882a593Smuzhiyun regulator-min-microamp = <3500000>; 247*4882a593Smuzhiyun regulator-max-microamp = <3500000>; 248*4882a593Smuzhiyun regulator-boot-on; 249*4882a593Smuzhiyun regulator-always-on; 250*4882a593Smuzhiyun }; 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun avdd_1v05_run: ldo0 { 253*4882a593Smuzhiyun regulator-name = "+1.05V_RUN_AVDD"; 254*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 255*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 256*4882a593Smuzhiyun regulator-boot-on; 257*4882a593Smuzhiyun regulator-always-on; 258*4882a593Smuzhiyun ams,ext-control = <1>; 259*4882a593Smuzhiyun }; 260*4882a593Smuzhiyun 261*4882a593Smuzhiyun ldo1 { 262*4882a593Smuzhiyun regulator-name = "+1.8V_RUN_CAM"; 263*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 264*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun ldo2 { 268*4882a593Smuzhiyun regulator-name = "+1.2V_GEN_AVDD"; 269*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 270*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 271*4882a593Smuzhiyun regulator-boot-on; 272*4882a593Smuzhiyun regulator-always-on; 273*4882a593Smuzhiyun }; 274*4882a593Smuzhiyun 275*4882a593Smuzhiyun ldo3 { 276*4882a593Smuzhiyun regulator-name = "+1.00V_LP0_VDD_RTC"; 277*4882a593Smuzhiyun regulator-min-microvolt = <1000000>; 278*4882a593Smuzhiyun regulator-max-microvolt = <1000000>; 279*4882a593Smuzhiyun regulator-boot-on; 280*4882a593Smuzhiyun regulator-always-on; 281*4882a593Smuzhiyun ams,enable-tracking; 282*4882a593Smuzhiyun }; 283*4882a593Smuzhiyun 284*4882a593Smuzhiyun vdd_run_cam: ldo4 { 285*4882a593Smuzhiyun regulator-name = "+3.3V_RUN_CAM"; 286*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 287*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 288*4882a593Smuzhiyun }; 289*4882a593Smuzhiyun 290*4882a593Smuzhiyun ldo5 { 291*4882a593Smuzhiyun regulator-name = "+1.2V_RUN_CAM_FRONT"; 292*4882a593Smuzhiyun regulator-min-microvolt = <1200000>; 293*4882a593Smuzhiyun regulator-max-microvolt = <1200000>; 294*4882a593Smuzhiyun }; 295*4882a593Smuzhiyun 296*4882a593Smuzhiyun vddio_sdmmc3: ldo6 { 297*4882a593Smuzhiyun regulator-name = "+VDDIO_SDMMC3"; 298*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 299*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 300*4882a593Smuzhiyun }; 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun ldo7 { 303*4882a593Smuzhiyun regulator-name = "+1.05V_RUN_CAM_REAR"; 304*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 305*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 306*4882a593Smuzhiyun }; 307*4882a593Smuzhiyun 308*4882a593Smuzhiyun ldo9 { 309*4882a593Smuzhiyun regulator-name = "+2.8V_RUN_TOUCH"; 310*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 311*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 312*4882a593Smuzhiyun }; 313*4882a593Smuzhiyun 314*4882a593Smuzhiyun ldo10 { 315*4882a593Smuzhiyun regulator-name = "+2.8V_RUN_CAM_AF"; 316*4882a593Smuzhiyun regulator-min-microvolt = <2800000>; 317*4882a593Smuzhiyun regulator-max-microvolt = <2800000>; 318*4882a593Smuzhiyun }; 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun ldo11 { 321*4882a593Smuzhiyun regulator-name = "+1.8V_RUN_VPP_FUSE"; 322*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 323*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 324*4882a593Smuzhiyun }; 325*4882a593Smuzhiyun }; 326*4882a593Smuzhiyun }; 327*4882a593Smuzhiyun }; 328*4882a593Smuzhiyun 329*4882a593Smuzhiyun spi@7000d400 { 330*4882a593Smuzhiyun status = "okay"; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun cros_ec: cros-ec@0 { 333*4882a593Smuzhiyun compatible = "google,cros-ec-spi"; 334*4882a593Smuzhiyun spi-max-frequency = <3000000>; 335*4882a593Smuzhiyun interrupt-parent = <&gpio>; 336*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(C, 7) IRQ_TYPE_LEVEL_LOW>; 337*4882a593Smuzhiyun reg = <0>; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun google,cros-ec-spi-msg-delay = <2000>; 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun i2c-tunnel { 342*4882a593Smuzhiyun compatible = "google,cros-ec-i2c-tunnel"; 343*4882a593Smuzhiyun #address-cells = <1>; 344*4882a593Smuzhiyun #size-cells = <0>; 345*4882a593Smuzhiyun 346*4882a593Smuzhiyun google,remote-bus = <0>; 347*4882a593Smuzhiyun 348*4882a593Smuzhiyun charger: bq24735@9 { 349*4882a593Smuzhiyun compatible = "ti,bq24735"; 350*4882a593Smuzhiyun reg = <0x9>; 351*4882a593Smuzhiyun interrupt-parent = <&gpio>; 352*4882a593Smuzhiyun interrupts = <TEGRA_GPIO(J, 0) 353*4882a593Smuzhiyun IRQ_TYPE_EDGE_BOTH>; 354*4882a593Smuzhiyun ti,ac-detect-gpios = <&gpio 355*4882a593Smuzhiyun TEGRA_GPIO(J, 0) 356*4882a593Smuzhiyun GPIO_ACTIVE_HIGH>; 357*4882a593Smuzhiyun ti,external-control; 358*4882a593Smuzhiyun }; 359*4882a593Smuzhiyun 360*4882a593Smuzhiyun battery: sbs-battery@b { 361*4882a593Smuzhiyun compatible = "sbs,sbs-battery"; 362*4882a593Smuzhiyun reg = <0xb>; 363*4882a593Smuzhiyun sbs,i2c-retry-count = <2>; 364*4882a593Smuzhiyun sbs,poll-retry-count = <10>; 365*4882a593Smuzhiyun power-supplies = <&charger>; 366*4882a593Smuzhiyun }; 367*4882a593Smuzhiyun }; 368*4882a593Smuzhiyun }; 369*4882a593Smuzhiyun }; 370*4882a593Smuzhiyun 371*4882a593Smuzhiyun spi@7000da00 { 372*4882a593Smuzhiyun status = "okay"; 373*4882a593Smuzhiyun spi-max-frequency = <25000000>; 374*4882a593Smuzhiyun 375*4882a593Smuzhiyun flash@0 { 376*4882a593Smuzhiyun compatible = "winbond,w25q32dw", "jedec,spi-nor"; 377*4882a593Smuzhiyun spi-max-frequency = <25000000>; 378*4882a593Smuzhiyun reg = <0>; 379*4882a593Smuzhiyun }; 380*4882a593Smuzhiyun }; 381*4882a593Smuzhiyun 382*4882a593Smuzhiyun pmc@7000e400 { 383*4882a593Smuzhiyun nvidia,invert-interrupt; 384*4882a593Smuzhiyun nvidia,suspend-mode = <0>; 385*4882a593Smuzhiyun nvidia,cpu-pwr-good-time = <500>; 386*4882a593Smuzhiyun nvidia,cpu-pwr-off-time = <300>; 387*4882a593Smuzhiyun nvidia,core-pwr-good-time = <641 3845>; 388*4882a593Smuzhiyun nvidia,core-pwr-off-time = <61036>; 389*4882a593Smuzhiyun nvidia,core-power-req-active-high; 390*4882a593Smuzhiyun nvidia,sys-clock-req-active-high; 391*4882a593Smuzhiyun }; 392*4882a593Smuzhiyun 393*4882a593Smuzhiyun hda@70030000 { 394*4882a593Smuzhiyun status = "okay"; 395*4882a593Smuzhiyun }; 396*4882a593Smuzhiyun 397*4882a593Smuzhiyun usb@70090000 { 398*4882a593Smuzhiyun phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, /* 1st USB A */ 399*4882a593Smuzhiyun <&{/padctl@7009f000/pads/usb2/lanes/usb2-1}>, /* Internal USB */ 400*4882a593Smuzhiyun <&{/padctl@7009f000/pads/usb2/lanes/usb2-2}>, /* 2nd USB A */ 401*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, /* 1st USB A */ 402*4882a593Smuzhiyun <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>; /* 2nd USB A */ 403*4882a593Smuzhiyun phy-names = "usb2-0", "usb2-1", "usb2-2", "usb3-0", "usb3-1"; 404*4882a593Smuzhiyun 405*4882a593Smuzhiyun avddio-pex-supply = <&vdd_1v05_run>; 406*4882a593Smuzhiyun dvddio-pex-supply = <&vdd_1v05_run>; 407*4882a593Smuzhiyun avdd-usb-supply = <&vdd_3v3_lp0>; 408*4882a593Smuzhiyun avdd-pll-utmip-supply = <&vddio_1v8>; 409*4882a593Smuzhiyun avdd-pll-erefe-supply = <&avdd_1v05_run>; 410*4882a593Smuzhiyun avdd-usb-ss-pll-supply = <&vdd_1v05_run>; 411*4882a593Smuzhiyun hvdd-usb-ss-supply = <&vdd_3v3_lp0>; 412*4882a593Smuzhiyun hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; 413*4882a593Smuzhiyun 414*4882a593Smuzhiyun status = "okay"; 415*4882a593Smuzhiyun }; 416*4882a593Smuzhiyun 417*4882a593Smuzhiyun padctl@7009f000 { 418*4882a593Smuzhiyun status = "okay"; 419*4882a593Smuzhiyun 420*4882a593Smuzhiyun avdd-pll-utmip-supply = <&vddio_1v8>; 421*4882a593Smuzhiyun avdd-pll-erefe-supply = <&avdd_1v05_run>; 422*4882a593Smuzhiyun avdd-pex-pll-supply = <&vdd_1v05_run>; 423*4882a593Smuzhiyun hvdd-pex-pll-e-supply = <&vdd_3v3_lp0>; 424*4882a593Smuzhiyun 425*4882a593Smuzhiyun pads { 426*4882a593Smuzhiyun usb2 { 427*4882a593Smuzhiyun status = "okay"; 428*4882a593Smuzhiyun 429*4882a593Smuzhiyun lanes { 430*4882a593Smuzhiyun usb2-0 { 431*4882a593Smuzhiyun nvidia,function = "xusb"; 432*4882a593Smuzhiyun status = "okay"; 433*4882a593Smuzhiyun }; 434*4882a593Smuzhiyun 435*4882a593Smuzhiyun usb2-1 { 436*4882a593Smuzhiyun nvidia,function = "xusb"; 437*4882a593Smuzhiyun status = "okay"; 438*4882a593Smuzhiyun }; 439*4882a593Smuzhiyun 440*4882a593Smuzhiyun usb2-2 { 441*4882a593Smuzhiyun nvidia,function = "xusb"; 442*4882a593Smuzhiyun status = "okay"; 443*4882a593Smuzhiyun }; 444*4882a593Smuzhiyun }; 445*4882a593Smuzhiyun }; 446*4882a593Smuzhiyun 447*4882a593Smuzhiyun pcie { 448*4882a593Smuzhiyun status = "okay"; 449*4882a593Smuzhiyun 450*4882a593Smuzhiyun lanes { 451*4882a593Smuzhiyun pcie-0 { 452*4882a593Smuzhiyun nvidia,function = "usb3-ss"; 453*4882a593Smuzhiyun status = "okay"; 454*4882a593Smuzhiyun }; 455*4882a593Smuzhiyun 456*4882a593Smuzhiyun pcie-1 { 457*4882a593Smuzhiyun nvidia,function = "usb3-ss"; 458*4882a593Smuzhiyun status = "okay"; 459*4882a593Smuzhiyun }; 460*4882a593Smuzhiyun }; 461*4882a593Smuzhiyun }; 462*4882a593Smuzhiyun }; 463*4882a593Smuzhiyun 464*4882a593Smuzhiyun ports { 465*4882a593Smuzhiyun usb2-0 { 466*4882a593Smuzhiyun vbus-supply = <&vdd_usb1_vbus>; 467*4882a593Smuzhiyun status = "okay"; 468*4882a593Smuzhiyun mode = "otg"; 469*4882a593Smuzhiyun }; 470*4882a593Smuzhiyun 471*4882a593Smuzhiyun usb2-1 { 472*4882a593Smuzhiyun vbus-supply = <&vdd_run_cam>; 473*4882a593Smuzhiyun status = "okay"; 474*4882a593Smuzhiyun mode = "host"; 475*4882a593Smuzhiyun }; 476*4882a593Smuzhiyun 477*4882a593Smuzhiyun usb2-2 { 478*4882a593Smuzhiyun vbus-supply = <&vdd_usb3_vbus>; 479*4882a593Smuzhiyun status = "okay"; 480*4882a593Smuzhiyun mode = "host"; 481*4882a593Smuzhiyun }; 482*4882a593Smuzhiyun 483*4882a593Smuzhiyun usb3-0 { 484*4882a593Smuzhiyun nvidia,usb2-companion = <0>; 485*4882a593Smuzhiyun status = "okay"; 486*4882a593Smuzhiyun }; 487*4882a593Smuzhiyun 488*4882a593Smuzhiyun usb3-1 { 489*4882a593Smuzhiyun nvidia,usb2-companion = <1>; 490*4882a593Smuzhiyun status = "okay"; 491*4882a593Smuzhiyun }; 492*4882a593Smuzhiyun }; 493*4882a593Smuzhiyun }; 494*4882a593Smuzhiyun 495*4882a593Smuzhiyun sdhci0_pwrseq: sdhci0_pwrseq { 496*4882a593Smuzhiyun compatible = "mmc-pwrseq-simple"; 497*4882a593Smuzhiyun 498*4882a593Smuzhiyun reset-gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 499*4882a593Smuzhiyun }; 500*4882a593Smuzhiyun 501*4882a593Smuzhiyun mmc@700b0000 { /* WiFi/BT on this bus */ 502*4882a593Smuzhiyun status = "okay"; 503*4882a593Smuzhiyun bus-width = <4>; 504*4882a593Smuzhiyun no-1-8-v; 505*4882a593Smuzhiyun non-removable; 506*4882a593Smuzhiyun mmc-pwrseq = <&sdhci0_pwrseq>; 507*4882a593Smuzhiyun vmmc-supply = <&vdd_3v3_lp0>; 508*4882a593Smuzhiyun vqmmc-supply = <&vddio_1v8>; 509*4882a593Smuzhiyun keep-power-in-suspend; 510*4882a593Smuzhiyun }; 511*4882a593Smuzhiyun 512*4882a593Smuzhiyun mmc@700b0400 { /* SD Card on this bus */ 513*4882a593Smuzhiyun status = "okay"; 514*4882a593Smuzhiyun cd-gpios = <&gpio TEGRA_GPIO(V, 2) GPIO_ACTIVE_LOW>; 515*4882a593Smuzhiyun power-gpios = <&gpio TEGRA_GPIO(R, 0) GPIO_ACTIVE_HIGH>; 516*4882a593Smuzhiyun bus-width = <4>; 517*4882a593Smuzhiyun no-1-8-v; 518*4882a593Smuzhiyun vqmmc-supply = <&vddio_sdmmc3>; 519*4882a593Smuzhiyun }; 520*4882a593Smuzhiyun 521*4882a593Smuzhiyun mmc@700b0600 { /* eMMC on this bus */ 522*4882a593Smuzhiyun status = "okay"; 523*4882a593Smuzhiyun bus-width = <8>; 524*4882a593Smuzhiyun no-1-8-v; 525*4882a593Smuzhiyun non-removable; 526*4882a593Smuzhiyun }; 527*4882a593Smuzhiyun 528*4882a593Smuzhiyun /* CPU DFLL clock */ 529*4882a593Smuzhiyun clock@70110000 { 530*4882a593Smuzhiyun status = "disabled"; 531*4882a593Smuzhiyun vdd-cpu-supply = <&vdd_cpu>; 532*4882a593Smuzhiyun nvidia,i2c-fs-rate = <400000>; 533*4882a593Smuzhiyun }; 534*4882a593Smuzhiyun 535*4882a593Smuzhiyun ahub@70300000 { 536*4882a593Smuzhiyun i2s@70301100 { 537*4882a593Smuzhiyun status = "okay"; 538*4882a593Smuzhiyun }; 539*4882a593Smuzhiyun }; 540*4882a593Smuzhiyun 541*4882a593Smuzhiyun backlight: backlight { 542*4882a593Smuzhiyun compatible = "pwm-backlight"; 543*4882a593Smuzhiyun 544*4882a593Smuzhiyun enable-gpios = <&gpio TEGRA_GPIO(H, 2) GPIO_ACTIVE_HIGH>; 545*4882a593Smuzhiyun power-supply = <&vdd_led>; 546*4882a593Smuzhiyun pwms = <&pwm 1 1000000>; 547*4882a593Smuzhiyun 548*4882a593Smuzhiyun default-brightness-level = <224>; 549*4882a593Smuzhiyun brightness-levels = 550*4882a593Smuzhiyun < 0 1 2 3 4 5 6 7 551*4882a593Smuzhiyun 8 9 10 11 12 13 14 15 552*4882a593Smuzhiyun 16 17 18 19 20 21 22 23 553*4882a593Smuzhiyun 24 25 26 27 28 29 30 31 554*4882a593Smuzhiyun 32 33 34 35 36 37 38 39 555*4882a593Smuzhiyun 40 41 42 43 44 45 46 47 556*4882a593Smuzhiyun 48 49 50 51 52 53 54 55 557*4882a593Smuzhiyun 56 57 58 59 60 61 62 63 558*4882a593Smuzhiyun 64 65 66 67 68 69 70 71 559*4882a593Smuzhiyun 72 73 74 75 76 77 78 79 560*4882a593Smuzhiyun 80 81 82 83 84 85 86 87 561*4882a593Smuzhiyun 88 89 90 91 92 93 94 95 562*4882a593Smuzhiyun 96 97 98 99 100 101 102 103 563*4882a593Smuzhiyun 104 105 106 107 108 109 110 111 564*4882a593Smuzhiyun 112 113 114 115 116 117 118 119 565*4882a593Smuzhiyun 120 121 122 123 124 125 126 127 566*4882a593Smuzhiyun 128 129 130 131 132 133 134 135 567*4882a593Smuzhiyun 136 137 138 139 140 141 142 143 568*4882a593Smuzhiyun 144 145 146 147 148 149 150 151 569*4882a593Smuzhiyun 152 153 154 155 156 157 158 159 570*4882a593Smuzhiyun 160 161 162 163 164 165 166 167 571*4882a593Smuzhiyun 168 169 170 171 172 173 174 175 572*4882a593Smuzhiyun 176 177 178 179 180 181 182 183 573*4882a593Smuzhiyun 184 185 186 187 188 189 190 191 574*4882a593Smuzhiyun 192 193 194 195 196 197 198 199 575*4882a593Smuzhiyun 200 201 202 203 204 205 206 207 576*4882a593Smuzhiyun 208 209 210 211 212 213 214 215 577*4882a593Smuzhiyun 216 217 218 219 220 221 222 223 578*4882a593Smuzhiyun 224 225 226 227 228 229 230 231 579*4882a593Smuzhiyun 232 233 234 235 236 237 238 239 580*4882a593Smuzhiyun 240 241 242 243 244 245 246 247 581*4882a593Smuzhiyun 248 249 250 251 252 253 254 255 582*4882a593Smuzhiyun 256>; 583*4882a593Smuzhiyun }; 584*4882a593Smuzhiyun 585*4882a593Smuzhiyun clk32k_in: clock@0 { 586*4882a593Smuzhiyun compatible = "fixed-clock"; 587*4882a593Smuzhiyun clock-frequency = <32768>; 588*4882a593Smuzhiyun #clock-cells = <0>; 589*4882a593Smuzhiyun }; 590*4882a593Smuzhiyun 591*4882a593Smuzhiyun cpus { 592*4882a593Smuzhiyun cpu@0 { 593*4882a593Smuzhiyun vdd-cpu-supply = <&vdd_cpu>; 594*4882a593Smuzhiyun }; 595*4882a593Smuzhiyun }; 596*4882a593Smuzhiyun 597*4882a593Smuzhiyun gpio-keys { 598*4882a593Smuzhiyun compatible = "gpio-keys"; 599*4882a593Smuzhiyun 600*4882a593Smuzhiyun lid { 601*4882a593Smuzhiyun label = "Lid"; 602*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(R, 4) GPIO_ACTIVE_LOW>; 603*4882a593Smuzhiyun linux,input-type = <5>; 604*4882a593Smuzhiyun linux,code = <KEY_RESERVED>; 605*4882a593Smuzhiyun debounce-interval = <1>; 606*4882a593Smuzhiyun wakeup-source; 607*4882a593Smuzhiyun }; 608*4882a593Smuzhiyun 609*4882a593Smuzhiyun power { 610*4882a593Smuzhiyun label = "Power"; 611*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(Q, 0) GPIO_ACTIVE_LOW>; 612*4882a593Smuzhiyun linux,code = <KEY_POWER>; 613*4882a593Smuzhiyun debounce-interval = <30>; 614*4882a593Smuzhiyun wakeup-source; 615*4882a593Smuzhiyun }; 616*4882a593Smuzhiyun }; 617*4882a593Smuzhiyun 618*4882a593Smuzhiyun vdd_mux: regulator@0 { 619*4882a593Smuzhiyun compatible = "regulator-fixed"; 620*4882a593Smuzhiyun regulator-name = "+VDD_MUX"; 621*4882a593Smuzhiyun regulator-min-microvolt = <12000000>; 622*4882a593Smuzhiyun regulator-max-microvolt = <12000000>; 623*4882a593Smuzhiyun regulator-always-on; 624*4882a593Smuzhiyun regulator-boot-on; 625*4882a593Smuzhiyun }; 626*4882a593Smuzhiyun 627*4882a593Smuzhiyun vdd_5v0_sys: regulator@1 { 628*4882a593Smuzhiyun compatible = "regulator-fixed"; 629*4882a593Smuzhiyun regulator-name = "+5V_SYS"; 630*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 631*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 632*4882a593Smuzhiyun regulator-always-on; 633*4882a593Smuzhiyun regulator-boot-on; 634*4882a593Smuzhiyun vin-supply = <&vdd_mux>; 635*4882a593Smuzhiyun }; 636*4882a593Smuzhiyun 637*4882a593Smuzhiyun vdd_3v3_sys: regulator@2 { 638*4882a593Smuzhiyun compatible = "regulator-fixed"; 639*4882a593Smuzhiyun regulator-name = "+3.3V_SYS"; 640*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 641*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 642*4882a593Smuzhiyun regulator-always-on; 643*4882a593Smuzhiyun regulator-boot-on; 644*4882a593Smuzhiyun vin-supply = <&vdd_mux>; 645*4882a593Smuzhiyun }; 646*4882a593Smuzhiyun 647*4882a593Smuzhiyun vdd_3v3_run: regulator@3 { 648*4882a593Smuzhiyun compatible = "regulator-fixed"; 649*4882a593Smuzhiyun regulator-name = "+3.3V_RUN"; 650*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 651*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 652*4882a593Smuzhiyun regulator-always-on; 653*4882a593Smuzhiyun regulator-boot-on; 654*4882a593Smuzhiyun gpio = <&pmic 1 GPIO_ACTIVE_HIGH>; 655*4882a593Smuzhiyun enable-active-high; 656*4882a593Smuzhiyun vin-supply = <&vdd_3v3_sys>; 657*4882a593Smuzhiyun }; 658*4882a593Smuzhiyun 659*4882a593Smuzhiyun vdd_3v3_hdmi: regulator@4 { 660*4882a593Smuzhiyun compatible = "regulator-fixed"; 661*4882a593Smuzhiyun regulator-name = "+3.3V_AVDD_HDMI_AP_GATED"; 662*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 663*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 664*4882a593Smuzhiyun vin-supply = <&vdd_3v3_run>; 665*4882a593Smuzhiyun }; 666*4882a593Smuzhiyun 667*4882a593Smuzhiyun vdd_led: regulator@5 { 668*4882a593Smuzhiyun compatible = "regulator-fixed"; 669*4882a593Smuzhiyun regulator-name = "+VDD_LED"; 670*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(P, 2) GPIO_ACTIVE_HIGH>; 671*4882a593Smuzhiyun enable-active-high; 672*4882a593Smuzhiyun vin-supply = <&vdd_mux>; 673*4882a593Smuzhiyun }; 674*4882a593Smuzhiyun 675*4882a593Smuzhiyun vdd_5v0_ts: regulator@6 { 676*4882a593Smuzhiyun compatible = "regulator-fixed"; 677*4882a593Smuzhiyun regulator-name = "+5V_VDD_TS_SW"; 678*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 679*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 680*4882a593Smuzhiyun regulator-boot-on; 681*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(K, 1) GPIO_ACTIVE_HIGH>; 682*4882a593Smuzhiyun enable-active-high; 683*4882a593Smuzhiyun vin-supply = <&vdd_5v0_sys>; 684*4882a593Smuzhiyun }; 685*4882a593Smuzhiyun 686*4882a593Smuzhiyun vdd_usb1_vbus: regulator@7 { 687*4882a593Smuzhiyun compatible = "regulator-fixed"; 688*4882a593Smuzhiyun regulator-name = "+5V_USB_HS"; 689*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 690*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 691*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(N, 4) GPIO_ACTIVE_HIGH>; 692*4882a593Smuzhiyun enable-active-high; 693*4882a593Smuzhiyun gpio-open-drain; 694*4882a593Smuzhiyun vin-supply = <&vdd_5v0_sys>; 695*4882a593Smuzhiyun }; 696*4882a593Smuzhiyun 697*4882a593Smuzhiyun vdd_usb3_vbus: regulator@8 { 698*4882a593Smuzhiyun compatible = "regulator-fixed"; 699*4882a593Smuzhiyun regulator-name = "+5V_USB_SS"; 700*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 701*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 702*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(N, 5) GPIO_ACTIVE_HIGH>; 703*4882a593Smuzhiyun enable-active-high; 704*4882a593Smuzhiyun gpio-open-drain; 705*4882a593Smuzhiyun vin-supply = <&vdd_5v0_sys>; 706*4882a593Smuzhiyun }; 707*4882a593Smuzhiyun 708*4882a593Smuzhiyun vdd_3v3_panel: regulator@9 { 709*4882a593Smuzhiyun compatible = "regulator-fixed"; 710*4882a593Smuzhiyun regulator-name = "+3.3V_PANEL"; 711*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 712*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 713*4882a593Smuzhiyun gpio = <&pmic 4 GPIO_ACTIVE_HIGH>; 714*4882a593Smuzhiyun enable-active-high; 715*4882a593Smuzhiyun vin-supply = <&vdd_3v3_run>; 716*4882a593Smuzhiyun }; 717*4882a593Smuzhiyun 718*4882a593Smuzhiyun vdd_3v3_lp0: regulator@10 { 719*4882a593Smuzhiyun compatible = "regulator-fixed"; 720*4882a593Smuzhiyun regulator-name = "+3.3V_LP0"; 721*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 722*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 723*4882a593Smuzhiyun /* 724*4882a593Smuzhiyun * TODO: find a way to wire this up with the USB EHCI 725*4882a593Smuzhiyun * controllers so that it can be enabled on demand. 726*4882a593Smuzhiyun */ 727*4882a593Smuzhiyun regulator-always-on; 728*4882a593Smuzhiyun gpio = <&pmic 2 GPIO_ACTIVE_HIGH>; 729*4882a593Smuzhiyun enable-active-high; 730*4882a593Smuzhiyun vin-supply = <&vdd_3v3_sys>; 731*4882a593Smuzhiyun }; 732*4882a593Smuzhiyun 733*4882a593Smuzhiyun vdd_hdmi_pll: regulator@11 { 734*4882a593Smuzhiyun compatible = "regulator-fixed"; 735*4882a593Smuzhiyun regulator-name = "+1.05V_RUN_AVDD_HDMI_PLL"; 736*4882a593Smuzhiyun regulator-min-microvolt = <1050000>; 737*4882a593Smuzhiyun regulator-max-microvolt = <1050000>; 738*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(H, 7) GPIO_ACTIVE_LOW>; 739*4882a593Smuzhiyun vin-supply = <&vdd_1v05_run>; 740*4882a593Smuzhiyun }; 741*4882a593Smuzhiyun 742*4882a593Smuzhiyun vdd_5v0_hdmi: regulator@12 { 743*4882a593Smuzhiyun compatible = "regulator-fixed"; 744*4882a593Smuzhiyun regulator-name = "+5V_HDMI_CON"; 745*4882a593Smuzhiyun regulator-min-microvolt = <5000000>; 746*4882a593Smuzhiyun regulator-max-microvolt = <5000000>; 747*4882a593Smuzhiyun gpio = <&gpio TEGRA_GPIO(K, 6) GPIO_ACTIVE_HIGH>; 748*4882a593Smuzhiyun enable-active-high; 749*4882a593Smuzhiyun vin-supply = <&vdd_5v0_sys>; 750*4882a593Smuzhiyun }; 751*4882a593Smuzhiyun 752*4882a593Smuzhiyun sound { 753*4882a593Smuzhiyun nvidia,audio-routing = 754*4882a593Smuzhiyun "Headphones", "HPR", 755*4882a593Smuzhiyun "Headphones", "HPL", 756*4882a593Smuzhiyun "Speakers", "SPKR", 757*4882a593Smuzhiyun "Speakers", "SPKL", 758*4882a593Smuzhiyun "Mic Jack", "MICBIAS", 759*4882a593Smuzhiyun "DMICL", "Int Mic", 760*4882a593Smuzhiyun "DMICR", "Int Mic", 761*4882a593Smuzhiyun "IN34", "Mic Jack"; 762*4882a593Smuzhiyun 763*4882a593Smuzhiyun nvidia,i2s-controller = <&tegra_i2s1>; 764*4882a593Smuzhiyun nvidia,audio-codec = <&acodec>; 765*4882a593Smuzhiyun 766*4882a593Smuzhiyun clocks = <&tegra_car TEGRA124_CLK_PLL_A>, 767*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 768*4882a593Smuzhiyun <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 769*4882a593Smuzhiyun clock-names = "pll_a", "pll_a_out0", "mclk"; 770*4882a593Smuzhiyun 771*4882a593Smuzhiyun assigned-clocks = <&tegra_car TEGRA124_CLK_EXTERN1>, 772*4882a593Smuzhiyun <&tegra_pmc TEGRA_PMC_CLK_OUT_1>; 773*4882a593Smuzhiyun 774*4882a593Smuzhiyun assigned-clock-parents = <&tegra_car TEGRA124_CLK_PLL_A_OUT0>, 775*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_EXTERN1>; 776*4882a593Smuzhiyun 777*4882a593Smuzhiyun nvidia,hp-det-gpios = <&gpio TEGRA_GPIO(I, 7) GPIO_ACTIVE_HIGH>; 778*4882a593Smuzhiyun nvidia,mic-det-gpios = 779*4882a593Smuzhiyun <&gpio TEGRA_GPIO(R, 7) GPIO_ACTIVE_HIGH>; 780*4882a593Smuzhiyun }; 781*4882a593Smuzhiyun 782*4882a593Smuzhiyun gpio-restart { 783*4882a593Smuzhiyun compatible = "gpio-restart"; 784*4882a593Smuzhiyun gpios = <&gpio TEGRA_GPIO(I, 5) GPIO_ACTIVE_LOW>; 785*4882a593Smuzhiyun priority = <200>; 786*4882a593Smuzhiyun }; 787*4882a593Smuzhiyun}; 788*4882a593Smuzhiyun 789*4882a593Smuzhiyun#include "cros-ec-keyboard.dtsi" 790