1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright (C) 2015 Masahiro Yamada <yamada.masahiro@socionext.com>
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #ifndef __PINCTRL_H
8*4882a593Smuzhiyun #define __PINCTRL_H
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun /**
11*4882a593Smuzhiyun * struct pinconf_param - pin config parameters
12*4882a593Smuzhiyun *
13*4882a593Smuzhiyun * @property: property name in DT nodes
14*4882a593Smuzhiyun * @param: ID for this config parameter
15*4882a593Smuzhiyun * @default_value: default value for this config parameter used in case
16*4882a593Smuzhiyun * no value is specified in DT nodes
17*4882a593Smuzhiyun */
18*4882a593Smuzhiyun struct pinconf_param {
19*4882a593Smuzhiyun const char * const property;
20*4882a593Smuzhiyun unsigned int param;
21*4882a593Smuzhiyun u32 default_value;
22*4882a593Smuzhiyun };
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun /**
25*4882a593Smuzhiyun * struct pinctrl_ops - pin control operations, to be implemented by
26*4882a593Smuzhiyun * pin controller drivers.
27*4882a593Smuzhiyun *
28*4882a593Smuzhiyun * The @set_state is the only mandatory operation. You can implement your
29*4882a593Smuzhiyun * pinctrl driver with its own @set_state. In this case, the other callbacks
30*4882a593Smuzhiyun * are not required. Otherwise, generic pinctrl framework is also available;
31*4882a593Smuzhiyun * use pinctrl_generic_set_state for @set_state, and implement other operations
32*4882a593Smuzhiyun * depending on your necessity.
33*4882a593Smuzhiyun *
34*4882a593Smuzhiyun * @get_pins_count: return number of selectable named pins available
35*4882a593Smuzhiyun * in this driver. (necessary to parse "pins" property in DTS)
36*4882a593Smuzhiyun * @get_pin_name: return the pin name of the pin selector,
37*4882a593Smuzhiyun * called by the core to figure out which pin it shall do
38*4882a593Smuzhiyun * operations to. (necessary to parse "pins" property in DTS)
39*4882a593Smuzhiyun * @get_groups_count: return number of selectable named groups available
40*4882a593Smuzhiyun * in this driver. (necessary to parse "groups" property in DTS)
41*4882a593Smuzhiyun * @get_group_name: return the group name of the group selector,
42*4882a593Smuzhiyun * called by the core to figure out which pin group it shall do
43*4882a593Smuzhiyun * operations to. (necessary to parse "groups" property in DTS)
44*4882a593Smuzhiyun * @get_functions_count: return number of selectable named functions available
45*4882a593Smuzhiyun * in this driver. (necessary for pin-muxing)
46*4882a593Smuzhiyun * @get_function_name: return the function name of the muxing selector,
47*4882a593Smuzhiyun * called by the core to figure out which mux setting it shall map a
48*4882a593Smuzhiyun * certain device to. (necessary for pin-muxing)
49*4882a593Smuzhiyun * @pinmux_set: enable a certain muxing function with a certain pin.
50*4882a593Smuzhiyun * The @func_selector selects a certain function whereas @pin_selector
51*4882a593Smuzhiyun * selects a certain pin to be used. On simple controllers one of them
52*4882a593Smuzhiyun * may be ignored. (necessary for pin-muxing against a single pin)
53*4882a593Smuzhiyun * @pinmux_group_set: enable a certain muxing function with a certain pin
54*4882a593Smuzhiyun * group. The @func_selector selects a certain function whereas
55*4882a593Smuzhiyun * @group_selector selects a certain set of pins to be used. On simple
56*4882a593Smuzhiyun * controllers one of them may be ignored.
57*4882a593Smuzhiyun * (necessary for pin-muxing against a pin group)
58*4882a593Smuzhiyun * @pinconf_num_params: number of driver-specific parameters to be parsed
59*4882a593Smuzhiyun * from device trees (necessary for pin-configuration)
60*4882a593Smuzhiyun * @pinconf_params: list of driver_specific parameters to be parsed from
61*4882a593Smuzhiyun * device trees (necessary for pin-configuration)
62*4882a593Smuzhiyun * @pinconf_set: configure an individual pin with a given parameter.
63*4882a593Smuzhiyun * (necessary for pin-configuration against a single pin)
64*4882a593Smuzhiyun * @pinconf_group_set: configure all pins in a group with a given parameter.
65*4882a593Smuzhiyun * (necessary for pin-configuration against a pin group)
66*4882a593Smuzhiyun * @set_state: do pinctrl operations specified by @config, a pseudo device
67*4882a593Smuzhiyun * pointing a config node. (necessary for pinctrl_full)
68*4882a593Smuzhiyun * @set_state_simple: do needed pinctrl operations for a peripherl @periph.
69*4882a593Smuzhiyun * (necessary for pinctrl_simple)
70*4882a593Smuzhiyun */
71*4882a593Smuzhiyun struct pinctrl_ops {
72*4882a593Smuzhiyun int (*get_pins_count)(struct udevice *dev);
73*4882a593Smuzhiyun const char *(*get_pin_name)(struct udevice *dev, unsigned selector);
74*4882a593Smuzhiyun int (*get_groups_count)(struct udevice *dev);
75*4882a593Smuzhiyun const char *(*get_group_name)(struct udevice *dev, unsigned selector);
76*4882a593Smuzhiyun int (*get_functions_count)(struct udevice *dev);
77*4882a593Smuzhiyun const char *(*get_function_name)(struct udevice *dev,
78*4882a593Smuzhiyun unsigned selector);
79*4882a593Smuzhiyun int (*pinmux_set)(struct udevice *dev, unsigned pin_selector,
80*4882a593Smuzhiyun unsigned func_selector);
81*4882a593Smuzhiyun int (*pinmux_group_set)(struct udevice *dev, unsigned group_selector,
82*4882a593Smuzhiyun unsigned func_selector);
83*4882a593Smuzhiyun unsigned int pinconf_num_params;
84*4882a593Smuzhiyun const struct pinconf_param *pinconf_params;
85*4882a593Smuzhiyun int (*pinconf_set)(struct udevice *dev, unsigned pin_selector,
86*4882a593Smuzhiyun unsigned param, unsigned argument);
87*4882a593Smuzhiyun int (*pinconf_group_set)(struct udevice *dev, unsigned group_selector,
88*4882a593Smuzhiyun unsigned param, unsigned argument);
89*4882a593Smuzhiyun int (*set_state)(struct udevice *dev, struct udevice *config);
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun /* for pinctrl-simple */
92*4882a593Smuzhiyun int (*set_state_simple)(struct udevice *dev, struct udevice *periph);
93*4882a593Smuzhiyun /**
94*4882a593Smuzhiyun * request() - Request a particular pinctrl function
95*4882a593Smuzhiyun *
96*4882a593Smuzhiyun * This activates the selected function.
97*4882a593Smuzhiyun *
98*4882a593Smuzhiyun * @dev: Device to adjust (UCLASS_PINCTRL)
99*4882a593Smuzhiyun * @func: Function number (driver-specific)
100*4882a593Smuzhiyun * @return 0 if OK, -ve on error
101*4882a593Smuzhiyun */
102*4882a593Smuzhiyun int (*request)(struct udevice *dev, int func, int flags);
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun /**
105*4882a593Smuzhiyun * get_periph_id() - get the peripheral ID for a device
106*4882a593Smuzhiyun *
107*4882a593Smuzhiyun * This generally looks at the peripheral's device tree node to work
108*4882a593Smuzhiyun * out the peripheral ID. The return value is normally interpreted as
109*4882a593Smuzhiyun * enum periph_id. so long as this is defined by the platform (which it
110*4882a593Smuzhiyun * should be).
111*4882a593Smuzhiyun *
112*4882a593Smuzhiyun * @dev: Pinctrl device to use for decoding
113*4882a593Smuzhiyun * @periph: Device to check
114*4882a593Smuzhiyun * @return peripheral ID of @periph, or -ENOENT on error
115*4882a593Smuzhiyun */
116*4882a593Smuzhiyun int (*get_periph_id)(struct udevice *dev, struct udevice *periph);
117*4882a593Smuzhiyun
118*4882a593Smuzhiyun /**
119*4882a593Smuzhiyun * get_gpio_mux() - get the mux value for a particular GPIO
120*4882a593Smuzhiyun *
121*4882a593Smuzhiyun * This allows the raw mux value for a GPIO to be obtained. It is
122*4882a593Smuzhiyun * useful for displaying the function being used by that GPIO, such
123*4882a593Smuzhiyun * as with the 'gpio' command. This function is internal to the GPIO
124*4882a593Smuzhiyun * subsystem and should not be used by generic code. Typically it is
125*4882a593Smuzhiyun * used by a GPIO driver with knowledge of the SoC pinctrl setup.
126*4882a593Smuzhiyun *
127*4882a593Smuzhiyun * @dev: Pinctrl device to use
128*4882a593Smuzhiyun * @banknum: GPIO bank number
129*4882a593Smuzhiyun * @index: GPIO index within the bank
130*4882a593Smuzhiyun * @return mux value (SoC-specific, e.g. 0 for input, 1 for output)
131*4882a593Smuzhiyun */
132*4882a593Smuzhiyun int (*get_gpio_mux)(struct udevice *dev, int banknum, int index);
133*4882a593Smuzhiyun };
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun #define pinctrl_get_ops(dev) ((struct pinctrl_ops *)(dev)->driver->ops)
136*4882a593Smuzhiyun
137*4882a593Smuzhiyun /**
138*4882a593Smuzhiyun * Generic pin configuration paramters
139*4882a593Smuzhiyun *
140*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_DISABLE: disable any pin bias on the pin, a
141*4882a593Smuzhiyun * transition from say pull-up to pull-down implies that you disable
142*4882a593Smuzhiyun * pull-up in the process, this setting disables all biasing.
143*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_HIGH_IMPEDANCE: the pin will be set to a high impedance
144*4882a593Smuzhiyun * mode, also know as "third-state" (tristate) or "high-Z" or "floating".
145*4882a593Smuzhiyun * On output pins this effectively disconnects the pin, which is useful
146*4882a593Smuzhiyun * if for example some other pin is going to drive the signal connected
147*4882a593Smuzhiyun * to it for a while. Pins used for input are usually always high
148*4882a593Smuzhiyun * impedance.
149*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_BUS_HOLD: the pin will be set to weakly latch so that it
150*4882a593Smuzhiyun * weakly drives the last value on a tristate bus, also known as a "bus
151*4882a593Smuzhiyun * holder", "bus keeper" or "repeater". This allows another device on the
152*4882a593Smuzhiyun * bus to change the value by driving the bus high or low and switching to
153*4882a593Smuzhiyun * tristate. The argument is ignored.
154*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_PULL_UP: the pin will be pulled up (usually with high
155*4882a593Smuzhiyun * impedance to VDD). If the argument is != 0 pull-up is enabled,
156*4882a593Smuzhiyun * if it is 0, pull-up is total, i.e. the pin is connected to VDD.
157*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_PULL_DOWN: the pin will be pulled down (usually with high
158*4882a593Smuzhiyun * impedance to GROUND). If the argument is != 0 pull-down is enabled,
159*4882a593Smuzhiyun * if it is 0, pull-down is total, i.e. the pin is connected to GROUND.
160*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_PULL_PIN_DEFAULT: the pin will be pulled up or down based
161*4882a593Smuzhiyun * on embedded knowledge of the controller hardware, like current mux
162*4882a593Smuzhiyun * function. The pull direction and possibly strength too will normally
163*4882a593Smuzhiyun * be decided completely inside the hardware block and not be readable
164*4882a593Smuzhiyun * from the kernel side.
165*4882a593Smuzhiyun * If the argument is != 0 pull up/down is enabled, if it is 0, the
166*4882a593Smuzhiyun * configuration is ignored. The proper way to disable it is to use
167*4882a593Smuzhiyun * @PIN_CONFIG_BIAS_DISABLE.
168*4882a593Smuzhiyun * @PIN_CONFIG_DRIVE_PUSH_PULL: the pin will be driven actively high and
169*4882a593Smuzhiyun * low, this is the most typical case and is typically achieved with two
170*4882a593Smuzhiyun * active transistors on the output. Setting this config will enable
171*4882a593Smuzhiyun * push-pull mode, the argument is ignored.
172*4882a593Smuzhiyun * @PIN_CONFIG_DRIVE_OPEN_DRAIN: the pin will be driven with open drain (open
173*4882a593Smuzhiyun * collector) which means it is usually wired with other output ports
174*4882a593Smuzhiyun * which are then pulled up with an external resistor. Setting this
175*4882a593Smuzhiyun * config will enable open drain mode, the argument is ignored.
176*4882a593Smuzhiyun * @PIN_CONFIG_DRIVE_OPEN_SOURCE: the pin will be driven with open source
177*4882a593Smuzhiyun * (open emitter). Setting this config will enable open source mode, the
178*4882a593Smuzhiyun * argument is ignored.
179*4882a593Smuzhiyun * @PIN_CONFIG_DRIVE_STRENGTH: the pin will sink or source at most the current
180*4882a593Smuzhiyun * passed as argument. The argument is in mA.
181*4882a593Smuzhiyun * @PIN_CONFIG_INPUT_ENABLE: enable the pin's input. Note that this does not
182*4882a593Smuzhiyun * affect the pin's ability to drive output. 1 enables input, 0 disables
183*4882a593Smuzhiyun * input.
184*4882a593Smuzhiyun * @PIN_CONFIG_INPUT_SCHMITT_ENABLE: control schmitt-trigger mode on the pin.
185*4882a593Smuzhiyun * If the argument != 0, schmitt-trigger mode is enabled. If it's 0,
186*4882a593Smuzhiyun * schmitt-trigger mode is disabled.
187*4882a593Smuzhiyun * @PIN_CONFIG_INPUT_SCHMITT: this will configure an input pin to run in
188*4882a593Smuzhiyun * schmitt-trigger mode. If the schmitt-trigger has adjustable hysteresis,
189*4882a593Smuzhiyun * the threshold value is given on a custom format as argument when
190*4882a593Smuzhiyun * setting pins to this mode.
191*4882a593Smuzhiyun * @PIN_CONFIG_INPUT_DEBOUNCE: this will configure the pin to debounce mode,
192*4882a593Smuzhiyun * which means it will wait for signals to settle when reading inputs. The
193*4882a593Smuzhiyun * argument gives the debounce time in usecs. Setting the
194*4882a593Smuzhiyun * argument to zero turns debouncing off.
195*4882a593Smuzhiyun * @PIN_CONFIG_POWER_SOURCE: if the pin can select between different power
196*4882a593Smuzhiyun * supplies, the argument to this parameter (on a custom format) tells
197*4882a593Smuzhiyun * the driver which alternative power source to use.
198*4882a593Smuzhiyun * @PIN_CONFIG_SLEW_RATE: if the pin can select slew rate, the argument to
199*4882a593Smuzhiyun * this parameter (on a custom format) tells the driver which alternative
200*4882a593Smuzhiyun * slew rate to use.
201*4882a593Smuzhiyun * @PIN_CONFIG_LOW_POWER_MODE: this will configure the pin for low power
202*4882a593Smuzhiyun * operation, if several modes of operation are supported these can be
203*4882a593Smuzhiyun * passed in the argument on a custom form, else just use argument 1
204*4882a593Smuzhiyun * to indicate low power mode, argument 0 turns low power mode off.
205*4882a593Smuzhiyun * @PIN_CONFIG_OUTPUT: this will configure the pin as an output. Use argument
206*4882a593Smuzhiyun * 1 to indicate high level, argument 0 to indicate low level. (Please
207*4882a593Smuzhiyun * see Documentation/pinctrl.txt, section "GPIO mode pitfalls" for a
208*4882a593Smuzhiyun * discussion around this parameter.)
209*4882a593Smuzhiyun * @PIN_CONFIG_END: this is the last enumerator for pin configurations, if
210*4882a593Smuzhiyun * you need to pass in custom configurations to the pin controller, use
211*4882a593Smuzhiyun * PIN_CONFIG_END+1 as the base offset.
212*4882a593Smuzhiyun */
213*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_DISABLE 0
214*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_HIGH_IMPEDANCE 1
215*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_BUS_HOLD 2
216*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_PULL_UP 3
217*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_PULL_DOWN 4
218*4882a593Smuzhiyun #define PIN_CONFIG_BIAS_PULL_PIN_DEFAULT 5
219*4882a593Smuzhiyun #define PIN_CONFIG_DRIVE_PUSH_PULL 6
220*4882a593Smuzhiyun #define PIN_CONFIG_DRIVE_OPEN_DRAIN 7
221*4882a593Smuzhiyun #define PIN_CONFIG_DRIVE_OPEN_SOURCE 8
222*4882a593Smuzhiyun #define PIN_CONFIG_DRIVE_STRENGTH 9
223*4882a593Smuzhiyun #define PIN_CONFIG_INPUT_ENABLE 10
224*4882a593Smuzhiyun #define PIN_CONFIG_INPUT_SCHMITT_ENABLE 11
225*4882a593Smuzhiyun #define PIN_CONFIG_INPUT_SCHMITT 12
226*4882a593Smuzhiyun #define PIN_CONFIG_INPUT_DEBOUNCE 13
227*4882a593Smuzhiyun #define PIN_CONFIG_POWER_SOURCE 14
228*4882a593Smuzhiyun #define PIN_CONFIG_SLEW_RATE 15
229*4882a593Smuzhiyun #define PIN_CONFIG_LOW_POWER_MODE 16
230*4882a593Smuzhiyun #define PIN_CONFIG_OUTPUT 17
231*4882a593Smuzhiyun #define PIN_CONFIG_END 0x7FFF
232*4882a593Smuzhiyun
233*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(PINCTRL_GENERIC)
234*4882a593Smuzhiyun /**
235*4882a593Smuzhiyun * pinctrl_generic_set_state() - generic set_state operation
236*4882a593Smuzhiyun * Parse the DT node of @config and its children and handle generic properties
237*4882a593Smuzhiyun * such as "pins", "groups", "functions", and pin configuration parameters.
238*4882a593Smuzhiyun *
239*4882a593Smuzhiyun * @pctldev: pinctrl device
240*4882a593Smuzhiyun * @config: config device (pseudo device), pointing a config node in DTS
241*4882a593Smuzhiyun * @return: 0 on success, or negative error code on failure
242*4882a593Smuzhiyun */
243*4882a593Smuzhiyun int pinctrl_generic_set_state(struct udevice *pctldev, struct udevice *config);
244*4882a593Smuzhiyun #else
pinctrl_generic_set_state(struct udevice * pctldev,struct udevice * config)245*4882a593Smuzhiyun static inline int pinctrl_generic_set_state(struct udevice *pctldev,
246*4882a593Smuzhiyun struct udevice *config)
247*4882a593Smuzhiyun {
248*4882a593Smuzhiyun return -EINVAL;
249*4882a593Smuzhiyun }
250*4882a593Smuzhiyun #endif
251*4882a593Smuzhiyun
252*4882a593Smuzhiyun #if CONFIG_IS_ENABLED(PINCTRL)
253*4882a593Smuzhiyun /**
254*4882a593Smuzhiyun * pinctrl_select_state() - set a device to a given state
255*4882a593Smuzhiyun *
256*4882a593Smuzhiyun * @dev: peripheral device
257*4882a593Smuzhiyun * @statename: state name, like "default"
258*4882a593Smuzhiyun * @return: 0 on success, or negative error code on failure
259*4882a593Smuzhiyun */
260*4882a593Smuzhiyun int pinctrl_select_state(struct udevice *dev, const char *statename);
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun /**
263*4882a593Smuzhiyun * pinctrl_request() - Request a particular pinctrl function
264*4882a593Smuzhiyun *
265*4882a593Smuzhiyun * @dev: Device to check (UCLASS_PINCTRL)
266*4882a593Smuzhiyun * @func: Function number (driver-specific)
267*4882a593Smuzhiyun * @flags: Flags (driver-specific)
268*4882a593Smuzhiyun * @return 0 if OK, -ve on error
269*4882a593Smuzhiyun */
270*4882a593Smuzhiyun int pinctrl_request(struct udevice *dev, int func, int flags);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun /**
273*4882a593Smuzhiyun * pinctrl_request_noflags() - Request a particular pinctrl function
274*4882a593Smuzhiyun *
275*4882a593Smuzhiyun * This is similar to pinctrl_request() but uses 0 for @flags.
276*4882a593Smuzhiyun *
277*4882a593Smuzhiyun * @dev: Device to check (UCLASS_PINCTRL)
278*4882a593Smuzhiyun * @func: Function number (driver-specific)
279*4882a593Smuzhiyun * @return 0 if OK, -ve on error
280*4882a593Smuzhiyun */
281*4882a593Smuzhiyun int pinctrl_request_noflags(struct udevice *dev, int func);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /**
284*4882a593Smuzhiyun * pinctrl_get_periph_id() - get the peripheral ID for a device
285*4882a593Smuzhiyun *
286*4882a593Smuzhiyun * This generally looks at the peripheral's device tree node to work out the
287*4882a593Smuzhiyun * peripheral ID. The return value is normally interpreted as enum periph_id.
288*4882a593Smuzhiyun * so long as this is defined by the platform (which it should be).
289*4882a593Smuzhiyun *
290*4882a593Smuzhiyun * @dev: Pinctrl device to use for decoding
291*4882a593Smuzhiyun * @periph: Device to check
292*4882a593Smuzhiyun * @return peripheral ID of @periph, or -ENOENT on error
293*4882a593Smuzhiyun */
294*4882a593Smuzhiyun int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph);
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun /**
297*4882a593Smuzhiyun * pinctrl_decode_pin_config() - decode pin configuration flags
298*4882a593Smuzhiyun *
299*4882a593Smuzhiyun * This decodes some of the PIN_CONFIG values into flags, with each value
300*4882a593Smuzhiyun * being (1 << pin_cfg). This does not support things with values like the
301*4882a593Smuzhiyun * slew rate.
302*4882a593Smuzhiyun *
303*4882a593Smuzhiyun * @blob: Device tree blob
304*4882a593Smuzhiyun * @node: Node containing the PIN_CONFIG values
305*4882a593Smuzhiyun * @return decoded flag value, or -ve on error
306*4882a593Smuzhiyun */
307*4882a593Smuzhiyun int pinctrl_decode_pin_config(const void *blob, int node);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun /**
310*4882a593Smuzhiyun * pinctrl_get_gpio_mux() - get the mux value for a particular GPIO
311*4882a593Smuzhiyun *
312*4882a593Smuzhiyun * This allows the raw mux value for a GPIO to be obtained. It is
313*4882a593Smuzhiyun * useful for displaying the function being used by that GPIO, such
314*4882a593Smuzhiyun * as with the 'gpio' command. This function is internal to the GPIO
315*4882a593Smuzhiyun * subsystem and should not be used by generic code. Typically it is
316*4882a593Smuzhiyun * used by a GPIO driver with knowledge of the SoC pinctrl setup.
317*4882a593Smuzhiyun *
318*4882a593Smuzhiyun * @dev: Pinctrl device to use
319*4882a593Smuzhiyun * @banknum: GPIO bank number
320*4882a593Smuzhiyun * @index: GPIO index within the bank
321*4882a593Smuzhiyun * @return mux value (SoC-specific, e.g. 0 for input, 1 for output)
322*4882a593Smuzhiyun */
323*4882a593Smuzhiyun int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index);
324*4882a593Smuzhiyun
325*4882a593Smuzhiyun /**
326*4882a593Smuzhiyun * pinctrl_get_pins_count() - get the total pins count for all GPIOs
327*4882a593Smuzhiyun *
328*4882a593Smuzhiyun * This allows the total pins count for all GPIO to be obtained.
329*4882a593Smuzhiyun *
330*4882a593Smuzhiyun * @dev: Pinctrl device to use
331*4882a593Smuzhiyun * @return pins count
332*4882a593Smuzhiyun */
333*4882a593Smuzhiyun int pinctrl_get_pins_count(struct udevice *dev);
334*4882a593Smuzhiyun #else
pinctrl_select_state(struct udevice * dev,const char * statename)335*4882a593Smuzhiyun static inline int pinctrl_select_state(struct udevice *dev,
336*4882a593Smuzhiyun const char *statename)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun return -EINVAL;
339*4882a593Smuzhiyun }
340*4882a593Smuzhiyun
pinctrl_request(struct udevice * dev,int func,int flags)341*4882a593Smuzhiyun static inline int pinctrl_request(struct udevice *dev, int func, int flags)
342*4882a593Smuzhiyun {
343*4882a593Smuzhiyun return -EINVAL;
344*4882a593Smuzhiyun }
345*4882a593Smuzhiyun
pinctrl_request_noflags(struct udevice * dev,int func)346*4882a593Smuzhiyun static inline int pinctrl_request_noflags(struct udevice *dev, int func)
347*4882a593Smuzhiyun {
348*4882a593Smuzhiyun return -EINVAL;
349*4882a593Smuzhiyun }
350*4882a593Smuzhiyun
pinctrl_get_periph_id(struct udevice * dev,struct udevice * periph)351*4882a593Smuzhiyun static inline int pinctrl_get_periph_id(struct udevice *dev, struct udevice *periph)
352*4882a593Smuzhiyun {
353*4882a593Smuzhiyun return -EINVAL;
354*4882a593Smuzhiyun }
355*4882a593Smuzhiyun
pinctrl_decode_pin_config(const void * blob,int node)356*4882a593Smuzhiyun static inline int pinctrl_decode_pin_config(const void *blob, int node)
357*4882a593Smuzhiyun {
358*4882a593Smuzhiyun return -EINVAL;
359*4882a593Smuzhiyun }
360*4882a593Smuzhiyun
pinctrl_get_gpio_mux(struct udevice * dev,int banknum,int index)361*4882a593Smuzhiyun static inline int pinctrl_get_gpio_mux(struct udevice *dev, int banknum, int index)
362*4882a593Smuzhiyun {
363*4882a593Smuzhiyun return -EINVAL;
364*4882a593Smuzhiyun }
365*4882a593Smuzhiyun
pinctrl_get_pins_count(struct udevice * dev)366*4882a593Smuzhiyun static inline int pinctrl_get_pins_count(struct udevice *dev)
367*4882a593Smuzhiyun {
368*4882a593Smuzhiyun return -EINVAL;
369*4882a593Smuzhiyun }
370*4882a593Smuzhiyun #endif
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun #endif /* __PINCTRL_H */
373