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/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dast2500-u-boot.dtsi1 #include <dt-bindings/clock/ast2500-scu.h>
2 #include <dt-bindings/reset/ast2500-reset.h>
4 #include "ast2500.dtsi"
7 scu: clock-controller@1e6e2000 { label
8 compatible = "aspeed,ast2500-scu";
10 u-boot,dm-pre-reloc;
11 #clock-cells = <1>;
12 #reset-cells = <1>;
15 rst: reset-controller {
16 u-boot,dm-pre-reloc;
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H A Dast2500.dtsi3 * https://raw.githubusercontent.com/torvalds/linux/34ea5c9d/arch/arm/boot/dts/aspeed-g5.dtsi
9 compatible = "aspeed,ast2500";
10 #address-cells = <1>;
11 #size-cells = <1>;
12 interrupt-parent = <&vic>;
15 #address-cells = <1>;
16 #size-cells = <0>;
19 compatible = "arm,arm1176jzf-s";
26 compatible = "simple-bus";
27 #address-cells = <1>;
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/pinctrl/
H A Daspeed,ast2500-pinctrl.yaml1 # SPDX-License-Identifier: GPL-2.0-or-later
3 ---
4 $id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ASPEED AST2500 Pin Controller
10 - Andrew Jeffery <andrew@aj.id.au>
16 - compatible: Should be one of the following:
17 "aspeed,ast2500-scu", "syscon", "simple-mfd"
18 "aspeed,g5-scu", "syscon", "simple-mfd"
25 const: aspeed,ast2500-pinctrl
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/interrupt-controller/
H A Daspeed,ast2xxx-scu-ic.txt1 Aspeed AST25XX and AST26XX SCU Interrupt Controller
4 - #interrupt-cells : must be 1
5 - compatible : must be "aspeed,ast2500-scu-ic",
6 "aspeed,ast2600-scu-ic0" or
7 "aspeed,ast2600-scu-ic1"
8 - interrupts : interrupt from the parent controller
9 - interrupt-controller : indicates that the controller receives and
17 scu_ic: interrupt-controller@18 {
18 #interrupt-cells = <1>;
19 compatible = "aspeed,ast2500-scu-ic";
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/misc/
H A Daspeed-p2a-ctrl.txt2 Device tree bindings for Aspeed AST2400/AST2500 PCI-to-AHB Bridge Control Driver
14 - compatible: must be one of:
15 - "aspeed,ast2400-p2a-ctrl"
16 - "aspeed,ast2500-p2a-ctrl"
21 - reg: A hint for the memory regions associated with the P2A controller
22 - memory-region: A phandle to a reserved_memory region to be used for the PCI
25 The p2a-control node should be the child of a syscon node with the required
28 - compatible : Should be one of the following:
29 "aspeed,ast2400-scu", "syscon", "simple-mfd"
30 "aspeed,ast2500-scu", "syscon", "simple-mfd"
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/aspeed/
H A Daspeed_gfx_drv.c1 // SPDX-License-Identifier: GPL-2.0+
5 #include <linux/dma-mapping.h>
37 * The AST2500 supports a total of 3 output paths:
56 * The driver was written with the 'AST2500 Software Programming Guide' v17,
74 drm->mode_config.min_width = 0; in aspeed_gfx_setup_mode_config()
75 drm->mode_config.min_height = 0; in aspeed_gfx_setup_mode_config()
76 drm->mode_config.max_width = 800; in aspeed_gfx_setup_mode_config()
77 drm->mode_config.max_height = 600; in aspeed_gfx_setup_mode_config()
78 drm->mode_config.funcs = &aspeed_gfx_mode_config_funcs; in aspeed_gfx_setup_mode_config()
89 reg = readl(priv->base + CRT_CTRL1); in aspeed_gfx_irq_handler()
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/OK3568_Linux_fs/u-boot/drivers/clk/aspeed/
H A Dclk_ast2500.c4 * SPDX-License-Identifier: GPL-2.0
8 #include <clk-uclass.h>
13 #include <dt-bindings/clock/ast2500-scu.h>
33 * For H-PLL and M-PLL the formula is
35 * M - Numerator
36 * N - Denumerator
37 * P - Post Divider
40 * D-PLL and D2-PLL have extra divider (OD + 1), which is not
50 * Get the rate of the M-PLL clock from input clock frequency and
51 * the value of the M-PLL Parameter Register.
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/mfd/
H A Daspeed-scu.txt5 - compatible: One of:
6 "aspeed,ast2400-scu", "syscon", "simple-mfd"
7 "aspeed,ast2500-scu", "syscon", "simple-mfd"
9 - reg: contains the offset and length of the SCU memory region
10 - #clock-cells: should be set to <1> - the system controller is also a
12 - #reset-cells: should be set to <1> - the system controller is also a
18 compatible = "aspeed,ast2400-scu", "syscon", "simple-mfd";
20 #clock-cells = <1>;
21 #reset-cells = <1>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Daspeed-g5.dtsi1 // SPDX-License-Identifier: GPL-2.0+
2 #include <dt-bindings/clock/aspeed-clock.h>
3 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
7 compatible = "aspeed,ast2500";
8 #address-cells = <1>;
9 #size-cells = <1>;
10 interrupt-parent = <&vic>;
36 #address-cells = <1>;
37 #size-cells = <0>;
40 compatible = "arm,arm1176jzf-s";
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H A Daspeed-g6.dtsi1 // SPDX-License-Identifier: GPL-2.0-or-later
4 #include <dt-bindings/interrupt-controller/arm-gic.h>
5 #include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6 #include <dt-bindings/clock/ast2600-clock.h>
11 #address-cells = <1>;
12 #size-cells = <1>;
13 interrupt-parent = <&gic>;
43 #address-cells = <1>;
44 #size-cells = <0>;
45 enable-method = "aspeed,ast2600-smp";
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/OK3568_Linux_fs/kernel/drivers/fsi/
H A Dfsi-master-ast-cf.c1 // SPDX-License-Identifier: GPL-2.0+
4 * A FSI master controller, using a simple GPIO bit-banging interface
25 #include "fsi-master.h"
26 #include "cf-fsi-fw.h"
28 #define FW_FILE_NAME "cf-fsi-fw.bin"
30 /* Common SCU based coprocessor control registers */
35 /* AST2500 specific ones */
90 struct regmap *scu; member
132 msg->msg <<= bits; in msg_push_bits()
133 msg->msg |= data & ((1ull << bits) - 1); in msg_push_bits()
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/OK3568_Linux_fs/u-boot/drivers/reset/
H A Dast2500-reset.c4 * SPDX-License-Identifier: GPL-2.0
11 #include <reset-uclass.h>
22 struct ast2500_scu *scu; member
31 &priv->wdt); in ast2500_ofdata_to_platdata()
42 struct ast2500_reset_priv *priv = dev_get_priv(reset_ctl->dev); in ast2500_reset_assert()
51 reset_mode = ast_reset_mode_from_flags(reset_ctl->id); in ast2500_reset_assert()
52 reset_mask = ast_reset_mask_from_flags(reset_ctl->id); in ast2500_reset_assert()
57 ast_scu_unlock(priv->scu); in ast2500_reset_assert()
58 setbits_le32(&priv->scu->sysreset_ctrl1, in ast2500_reset_assert()
60 ret = wdt_expire_now(priv->wdt, reset_ctl->id); in ast2500_reset_assert()
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/OK3568_Linux_fs/kernel/drivers/gpu/drm/ast/
H A Dast_main.c14 * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
70 struct device_node *np = dev->pdev->dev.of_node; in ast_detect_config_mode()
75 ast->config_mode = ast_use_defaults; in ast_detect_config_mode()
78 /* Check if we have device-tree properties */ in ast_detect_config_mode()
79 if (np && !of_property_read_u32(np, "aspeed,scu-revision-id", in ast_detect_config_mode()
82 ast->config_mode = ast_use_dt; in ast_detect_config_mode()
83 drm_info(dev, "Using device-tree for configuration\n"); in ast_detect_config_mode()
88 if (dev->pdev->device != PCI_CHIP_AST2000) in ast_detect_config_mode()
92 * The BMC will set SCU 0x40 D[12] to 1 if the P2 bridge in ast_detect_config_mode()
103 ast->config_mode = ast_use_p2a; in ast_detect_config_mode()
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/OK3568_Linux_fs/u-boot/drivers/pinctrl/aspeed/
H A Dpinctrl_ast2500.c4 * SPDX-License-Identifier: GPL-2.0+
24 struct ast2500_scu *scu; member
31 priv->scu = ast_get_scu(); in ast2500_pinctrl_probe()
38 /* Control register number (1-10) */
90 return -EINVAL; in ast2500_pinctrl_group_set()
93 if (config->reg_num > 6) in ast2500_pinctrl_group_set()
94 ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7]; in ast2500_pinctrl_group_set()
96 ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1]; in ast2500_pinctrl_group_set()
98 ast_scu_unlock(priv->scu); in ast2500_pinctrl_group_set()
99 setbits_le32(ctrl_reg, config->ctrl_bit_mask); in ast2500_pinctrl_group_set()
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/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dirq-aspeed-scu-ic.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Aspeed AST24XX, AST25XX, and AST26XX SCU Interrupt Controller
41 struct regmap *scu; member
55 unsigned int mask = scu_ic->irq_enable << ASPEED_SCU_IC_STATUS_SHIFT; in aspeed_scu_ic_irq_handler()
60 * The SCU IC has just one register to control its operation and read in aspeed_scu_ic_irq_handler()
69 regmap_read(scu_ic->scu, scu_ic->reg, &sts); in aspeed_scu_ic_irq_handler()
70 enabled = sts & scu_ic->irq_enable; in aspeed_scu_ic_irq_handler()
73 bit = scu_ic->irq_shift; in aspeed_scu_ic_irq_handler()
74 max = scu_ic->num_irqs + bit; in aspeed_scu_ic_irq_handler()
77 irq = irq_find_mapping(scu_ic->irq_domain, in aspeed_scu_ic_irq_handler()
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/OK3568_Linux_fs/u-boot/arch/arm/mach-aspeed/ast2500/
H A Dsdram_ast2500.c2 * Copyright (C) 2012-2020 ASPEED Technology Inc.
6 * SPDX-License-Identifier: GPL-2.0
22 #include <dt-bindings/clock/ast2500-scu.h>
71 struct ast2500_scu *scu; member
78 writel(0, &phy->phy[2]); in ast2500_sdrammc_init_phy()
79 writel(0, &phy->phy[6]); in ast2500_sdrammc_init_phy()
80 writel(0, &phy->phy[8]); in ast2500_sdrammc_init_phy()
81 writel(0, &phy->phy[10]); in ast2500_sdrammc_init_phy()
82 writel(0, &phy->phy[12]); in ast2500_sdrammc_init_phy()
83 writel(0, &phy->phy[42]); in ast2500_sdrammc_init_phy()
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/OK3568_Linux_fs/kernel/drivers/clk/
H A Dclk-aspeed.c1 // SPDX-License-Identifier: GPL-2.0+
4 #define pr_fmt(fmt) "clk-aspeed: " fmt
13 #include <dt-bindings/clock/aspeed-clock.h>
15 #include "clk-aspeed.h"
49 [ASPEED_CLK_GATE_ECLK] = { 0, 6, "eclk-gate", "eclk", 0 }, /* Video Engine */
50 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */
51 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */
52 [ASPEED_CLK_GATE_VCLK] = { 3, -1, "vclk-gate", NULL, 0 }, /* Video Capture */
53 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", CLK_IS_CRITICAL }, /* PCIe/PCI */
54 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, CLK_IS_CRITICAL }, /* DAC */
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/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/serial/
H A D8250.yaml3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - devicetree@vger.kernel.org
13 - $ref: /schemas/serial.yaml#
14 - if:
16 - aspeed,sirq-polarity-sense
20 const: aspeed,ast2500-vuart
21 - if:
24 const: mrvl,mmp-uart
27 reg-shift:
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/OK3568_Linux_fs/u-boot/drivers/i2c/
H A Dast_i2c.c2 * Copyright (C) 2012-2020 ASPEED Technology Inc.
6 * SPDX-License-Identifier: GPL-2.0+
53 scl_low = (divider_ratio >> 1) - 1; in get_clk_reg_val()
54 scl_high = divider_ratio - scl_low - 2; in get_clk_reg_val()
67 writel(~0, &priv->regs->isr); in ast_i2c_clear_interrupts()
75 writel(0, &priv->regs->fcr); in ast_i2c_init_bus()
76 /* Enable Master Mode. Assuming single-master */ in ast_i2c_init_bus()
80 &priv->regs->fcr); in ast_i2c_init_bus()
87 | I2CD_INTR_ABNORMAL, &priv->regs->icr); in ast_i2c_init_bus()
95 priv->regs = devfdt_get_addr_ptr(dev); in ast_i2c_ofdata_to_platdata()
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/OK3568_Linux_fs/kernel/drivers/net/ethernet/faraday/
H A Dftgmac100.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * (C) Copyright 2009-2011 Faraday Technology
6 * Po-Yu Chuang <ratbert@faraday-tech.com>
12 #include <linux/dma-mapping.h>
92 /* AST2500/AST2600 RMII ref clock gate */
116 struct net_device *netdev = priv->netdev; in ftgmac100_reset_mac()
120 iowrite32(maccr, priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
122 priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
126 maccr = ioread32(priv->base + FTGMAC100_OFFSET_MACCR); in ftgmac100_reset_mac()
134 return -EIO; in ftgmac100_reset_mac()
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/OK3568_Linux_fs/kernel/drivers/pinctrl/aspeed/
H A Dpinmux-aspeed.h1 /* SPDX-License-Identifier: GPL-2.0-or-later */
22 * read-only).
24 * SoC Multi-function Pin Expression Examples
25 * ------------------------------------------
27 * Here are some sample mux configurations from the AST2400 and AST2500
35 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
37 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
39 * C5 is a multi-signal pin (high and low priority signals). Here we touch
42 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
44 * -----+---------+-----------+-----------------------------+-----------+---------------+----------
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H A Dpinctrl-aspeed-g5.c1 // SPDX-License-Identifier: GPL-2.0-or-later
16 #include <linux/pinctrl/pinconf-generic.h>
21 #include "../pinctrl-utils.h"
22 #include "pinctrl-aspeed.h"
32 * The "Multi-function Pins Mapping and Control" table in the SoC datasheet
35 * opposed to naming them e.g. PINMUX_CTRL_[0-9]). Further, signal expressions
37 * reset control and MAC clock configuration registers. The AST2500 goes a step
45 #define SCU80 0x80 /* Multi-function Pin Control #1 */
46 #define SCU84 0x84 /* Multi-function Pin Control #2 */
47 #define SCU88 0x88 /* Multi-function Pin Control #3 */
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/OK3568_Linux_fs/buildroot/dl/uboot-tools/
HDu-boot-2021.07.tar.bz2 ... -boot-2021.07/.readthedocs.yml u-boot-2021.07/Kbuild u-boot-2021.07 ...
/OK3568_Linux_fs/kernel/
H A DMAINTAINERS9 -------------------------
30 ``diff -u`` to make the patch easy to merge. Be prepared to get your
40 See Documentation/process/coding-style.rst for guidance here.
46 See Documentation/process/submitting-patches.rst for details.
57 include a Signed-off-by: line. The current version of this
59 Documentation/process/submitting-patches.rst.
70 that the bug would present a short-term risk to other users if it
76 Documentation/admin-guide/security-bugs.rst for details.
81 ---------------------------------------------------
97 W: *Web-page* with status/info
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