xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/aspeed-g6.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-or-later
2*4882a593Smuzhiyun// Copyright 2019 IBM Corp.
3*4882a593Smuzhiyun
4*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/arm-gic.h>
5*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/aspeed-scu-ic.h>
6*4882a593Smuzhiyun#include <dt-bindings/clock/ast2600-clock.h>
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	model = "Aspeed BMC";
10*4882a593Smuzhiyun	compatible = "aspeed,ast2600";
11*4882a593Smuzhiyun	#address-cells = <1>;
12*4882a593Smuzhiyun	#size-cells = <1>;
13*4882a593Smuzhiyun	interrupt-parent = <&gic>;
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	aliases {
16*4882a593Smuzhiyun		i2c0 = &i2c0;
17*4882a593Smuzhiyun		i2c1 = &i2c1;
18*4882a593Smuzhiyun		i2c2 = &i2c2;
19*4882a593Smuzhiyun		i2c3 = &i2c3;
20*4882a593Smuzhiyun		i2c4 = &i2c4;
21*4882a593Smuzhiyun		i2c5 = &i2c5;
22*4882a593Smuzhiyun		i2c6 = &i2c6;
23*4882a593Smuzhiyun		i2c7 = &i2c7;
24*4882a593Smuzhiyun		i2c8 = &i2c8;
25*4882a593Smuzhiyun		i2c9 = &i2c9;
26*4882a593Smuzhiyun		i2c10 = &i2c10;
27*4882a593Smuzhiyun		i2c11 = &i2c11;
28*4882a593Smuzhiyun		i2c12 = &i2c12;
29*4882a593Smuzhiyun		i2c13 = &i2c13;
30*4882a593Smuzhiyun		i2c14 = &i2c14;
31*4882a593Smuzhiyun		i2c15 = &i2c15;
32*4882a593Smuzhiyun		serial0 = &uart1;
33*4882a593Smuzhiyun		serial1 = &uart2;
34*4882a593Smuzhiyun		serial2 = &uart3;
35*4882a593Smuzhiyun		serial3 = &uart4;
36*4882a593Smuzhiyun		serial4 = &uart5;
37*4882a593Smuzhiyun		serial5 = &vuart1;
38*4882a593Smuzhiyun		serial6 = &vuart2;
39*4882a593Smuzhiyun	};
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun	cpus {
43*4882a593Smuzhiyun		#address-cells = <1>;
44*4882a593Smuzhiyun		#size-cells = <0>;
45*4882a593Smuzhiyun		enable-method = "aspeed,ast2600-smp";
46*4882a593Smuzhiyun
47*4882a593Smuzhiyun		cpu@f00 {
48*4882a593Smuzhiyun			compatible = "arm,cortex-a7";
49*4882a593Smuzhiyun			device_type = "cpu";
50*4882a593Smuzhiyun			reg = <0xf00>;
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		cpu@f01 {
54*4882a593Smuzhiyun			compatible = "arm,cortex-a7";
55*4882a593Smuzhiyun			device_type = "cpu";
56*4882a593Smuzhiyun			reg = <0xf01>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun	timer {
61*4882a593Smuzhiyun		compatible = "arm,armv7-timer";
62*4882a593Smuzhiyun		interrupt-parent = <&gic>;
63*4882a593Smuzhiyun		interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
64*4882a593Smuzhiyun			     <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
65*4882a593Smuzhiyun			     <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>,
66*4882a593Smuzhiyun			     <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_LOW)>;
67*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_HPLL>;
68*4882a593Smuzhiyun		arm,cpu-registers-not-fw-configured;
69*4882a593Smuzhiyun		always-on;
70*4882a593Smuzhiyun	};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun	ahb {
73*4882a593Smuzhiyun		compatible = "simple-bus";
74*4882a593Smuzhiyun		#address-cells = <1>;
75*4882a593Smuzhiyun		#size-cells = <1>;
76*4882a593Smuzhiyun		device_type = "soc";
77*4882a593Smuzhiyun		ranges;
78*4882a593Smuzhiyun
79*4882a593Smuzhiyun		gic: interrupt-controller@40461000 {
80*4882a593Smuzhiyun			compatible = "arm,cortex-a7-gic";
81*4882a593Smuzhiyun			interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(2) | IRQ_TYPE_LEVEL_HIGH)>;
82*4882a593Smuzhiyun			#interrupt-cells = <3>;
83*4882a593Smuzhiyun			interrupt-controller;
84*4882a593Smuzhiyun			interrupt-parent = <&gic>;
85*4882a593Smuzhiyun			reg = <0x40461000 0x1000>,
86*4882a593Smuzhiyun			    <0x40462000 0x1000>,
87*4882a593Smuzhiyun			    <0x40464000 0x2000>,
88*4882a593Smuzhiyun			    <0x40466000 0x2000>;
89*4882a593Smuzhiyun			};
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun		fmc: spi@1e620000 {
92*4882a593Smuzhiyun			reg = < 0x1e620000 0xc4
93*4882a593Smuzhiyun				0x20000000 0x10000000 >;
94*4882a593Smuzhiyun			#address-cells = <1>;
95*4882a593Smuzhiyun			#size-cells = <0>;
96*4882a593Smuzhiyun			compatible = "aspeed,ast2600-fmc";
97*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_AHB>;
98*4882a593Smuzhiyun			status = "disabled";
99*4882a593Smuzhiyun			interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>;
100*4882a593Smuzhiyun			flash@0 {
101*4882a593Smuzhiyun				reg = < 0 >;
102*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
103*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
104*4882a593Smuzhiyun				status = "disabled";
105*4882a593Smuzhiyun			};
106*4882a593Smuzhiyun			flash@1 {
107*4882a593Smuzhiyun				reg = < 1 >;
108*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
109*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
110*4882a593Smuzhiyun				status = "disabled";
111*4882a593Smuzhiyun			};
112*4882a593Smuzhiyun			flash@2 {
113*4882a593Smuzhiyun				reg = < 2 >;
114*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
115*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
116*4882a593Smuzhiyun				status = "disabled";
117*4882a593Smuzhiyun			};
118*4882a593Smuzhiyun		};
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun		spi1: spi@1e630000 {
121*4882a593Smuzhiyun			reg = < 0x1e630000 0xc4
122*4882a593Smuzhiyun				0x30000000 0x10000000 >;
123*4882a593Smuzhiyun			#address-cells = <1>;
124*4882a593Smuzhiyun			#size-cells = <0>;
125*4882a593Smuzhiyun			compatible = "aspeed,ast2600-spi";
126*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_AHB>;
127*4882a593Smuzhiyun			status = "disabled";
128*4882a593Smuzhiyun			flash@0 {
129*4882a593Smuzhiyun				reg = < 0 >;
130*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
131*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
132*4882a593Smuzhiyun				status = "disabled";
133*4882a593Smuzhiyun			};
134*4882a593Smuzhiyun			flash@1 {
135*4882a593Smuzhiyun				reg = < 1 >;
136*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
137*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
138*4882a593Smuzhiyun				status = "disabled";
139*4882a593Smuzhiyun			};
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun		spi2: spi@1e631000 {
143*4882a593Smuzhiyun			reg = < 0x1e631000 0xc4
144*4882a593Smuzhiyun				0x50000000 0x10000000 >;
145*4882a593Smuzhiyun			#address-cells = <1>;
146*4882a593Smuzhiyun			#size-cells = <0>;
147*4882a593Smuzhiyun			compatible = "aspeed,ast2600-spi";
148*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_AHB>;
149*4882a593Smuzhiyun			status = "disabled";
150*4882a593Smuzhiyun			flash@0 {
151*4882a593Smuzhiyun				reg = < 0 >;
152*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
153*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
154*4882a593Smuzhiyun				status = "disabled";
155*4882a593Smuzhiyun			};
156*4882a593Smuzhiyun			flash@1 {
157*4882a593Smuzhiyun				reg = < 1 >;
158*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
159*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
160*4882a593Smuzhiyun				status = "disabled";
161*4882a593Smuzhiyun			};
162*4882a593Smuzhiyun			flash@2 {
163*4882a593Smuzhiyun				reg = < 2 >;
164*4882a593Smuzhiyun				compatible = "jedec,spi-nor";
165*4882a593Smuzhiyun				spi-max-frequency = <50000000>;
166*4882a593Smuzhiyun				status = "disabled";
167*4882a593Smuzhiyun			};
168*4882a593Smuzhiyun		};
169*4882a593Smuzhiyun
170*4882a593Smuzhiyun		mdio0: mdio@1e650000 {
171*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mdio";
172*4882a593Smuzhiyun			reg = <0x1e650000 0x8>;
173*4882a593Smuzhiyun			#address-cells = <1>;
174*4882a593Smuzhiyun			#size-cells = <0>;
175*4882a593Smuzhiyun			status = "disabled";
176*4882a593Smuzhiyun			pinctrl-names = "default";
177*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_mdio1_default>;
178*4882a593Smuzhiyun		};
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun		mdio1: mdio@1e650008 {
181*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mdio";
182*4882a593Smuzhiyun			reg = <0x1e650008 0x8>;
183*4882a593Smuzhiyun			#address-cells = <1>;
184*4882a593Smuzhiyun			#size-cells = <0>;
185*4882a593Smuzhiyun			status = "disabled";
186*4882a593Smuzhiyun			pinctrl-names = "default";
187*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_mdio2_default>;
188*4882a593Smuzhiyun		};
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun		mdio2: mdio@1e650010 {
191*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mdio";
192*4882a593Smuzhiyun			reg = <0x1e650010 0x8>;
193*4882a593Smuzhiyun			#address-cells = <1>;
194*4882a593Smuzhiyun			#size-cells = <0>;
195*4882a593Smuzhiyun			status = "disabled";
196*4882a593Smuzhiyun			pinctrl-names = "default";
197*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_mdio3_default>;
198*4882a593Smuzhiyun		};
199*4882a593Smuzhiyun
200*4882a593Smuzhiyun		mdio3: mdio@1e650018 {
201*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mdio";
202*4882a593Smuzhiyun			reg = <0x1e650018 0x8>;
203*4882a593Smuzhiyun			#address-cells = <1>;
204*4882a593Smuzhiyun			#size-cells = <0>;
205*4882a593Smuzhiyun			status = "disabled";
206*4882a593Smuzhiyun			pinctrl-names = "default";
207*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_mdio4_default>;
208*4882a593Smuzhiyun		};
209*4882a593Smuzhiyun
210*4882a593Smuzhiyun		mac0: ftgmac@1e660000 {
211*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
212*4882a593Smuzhiyun			reg = <0x1e660000 0x180>;
213*4882a593Smuzhiyun			#address-cells = <1>;
214*4882a593Smuzhiyun			#size-cells = <0>;
215*4882a593Smuzhiyun			interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
216*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_MAC1CLK>;
217*4882a593Smuzhiyun			status = "disabled";
218*4882a593Smuzhiyun		};
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun		mac1: ftgmac@1e680000 {
221*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
222*4882a593Smuzhiyun			reg = <0x1e680000 0x180>;
223*4882a593Smuzhiyun			#address-cells = <1>;
224*4882a593Smuzhiyun			#size-cells = <0>;
225*4882a593Smuzhiyun			interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;
226*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_MAC2CLK>;
227*4882a593Smuzhiyun			status = "disabled";
228*4882a593Smuzhiyun		};
229*4882a593Smuzhiyun
230*4882a593Smuzhiyun		mac2: ftgmac@1e670000 {
231*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
232*4882a593Smuzhiyun			reg = <0x1e670000 0x180>;
233*4882a593Smuzhiyun			#address-cells = <1>;
234*4882a593Smuzhiyun			#size-cells = <0>;
235*4882a593Smuzhiyun			interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
236*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_MAC3CLK>;
237*4882a593Smuzhiyun			status = "disabled";
238*4882a593Smuzhiyun		};
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun		mac3: ftgmac@1e690000 {
241*4882a593Smuzhiyun			compatible = "aspeed,ast2600-mac", "faraday,ftgmac100";
242*4882a593Smuzhiyun			reg = <0x1e690000 0x180>;
243*4882a593Smuzhiyun			#address-cells = <1>;
244*4882a593Smuzhiyun			#size-cells = <0>;
245*4882a593Smuzhiyun			interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
246*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_MAC4CLK>;
247*4882a593Smuzhiyun			status = "disabled";
248*4882a593Smuzhiyun		};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun		ehci0: usb@1e6a1000 {
251*4882a593Smuzhiyun			compatible = "aspeed,ast2600-ehci", "generic-ehci";
252*4882a593Smuzhiyun			reg = <0x1e6a1000 0x100>;
253*4882a593Smuzhiyun			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
254*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
255*4882a593Smuzhiyun			pinctrl-names = "default";
256*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usb2ah_default>;
257*4882a593Smuzhiyun			status = "disabled";
258*4882a593Smuzhiyun		};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun		ehci1: usb@1e6a3000 {
261*4882a593Smuzhiyun			compatible = "aspeed,ast2600-ehci", "generic-ehci";
262*4882a593Smuzhiyun			reg = <0x1e6a3000 0x100>;
263*4882a593Smuzhiyun			interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
264*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_USBPORT2CLK>;
265*4882a593Smuzhiyun			pinctrl-names = "default";
266*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usb2bh_default>;
267*4882a593Smuzhiyun			status = "disabled";
268*4882a593Smuzhiyun		};
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun		uhci: usb@1e6b0000 {
271*4882a593Smuzhiyun			compatible = "aspeed,ast2600-uhci", "generic-uhci";
272*4882a593Smuzhiyun			reg = <0x1e6b0000 0x100>;
273*4882a593Smuzhiyun			interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
274*4882a593Smuzhiyun			#ports = <2>;
275*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_USBUHCICLK>;
276*4882a593Smuzhiyun			status = "disabled";
277*4882a593Smuzhiyun			/*
278*4882a593Smuzhiyun			 * No default pinmux, it will follow EHCI, use an
279*4882a593Smuzhiyun			 * explicit pinmux override if EHCI is not enabled.
280*4882a593Smuzhiyun			 */
281*4882a593Smuzhiyun		};
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun		vhub: usb-vhub@1e6a0000 {
284*4882a593Smuzhiyun			compatible = "aspeed,ast2600-usb-vhub";
285*4882a593Smuzhiyun			reg = <0x1e6a0000 0x350>;
286*4882a593Smuzhiyun			interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
287*4882a593Smuzhiyun			clocks = <&syscon ASPEED_CLK_GATE_USBPORT1CLK>;
288*4882a593Smuzhiyun			aspeed,vhub-downstream-ports = <7>;
289*4882a593Smuzhiyun			aspeed,vhub-generic-endpoints = <21>;
290*4882a593Smuzhiyun			pinctrl-names = "default";
291*4882a593Smuzhiyun			pinctrl-0 = <&pinctrl_usb2ad_default>;
292*4882a593Smuzhiyun			status = "disabled";
293*4882a593Smuzhiyun		};
294*4882a593Smuzhiyun
295*4882a593Smuzhiyun		apb {
296*4882a593Smuzhiyun			compatible = "simple-bus";
297*4882a593Smuzhiyun			#address-cells = <1>;
298*4882a593Smuzhiyun			#size-cells = <1>;
299*4882a593Smuzhiyun			ranges;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun			syscon: syscon@1e6e2000 {
302*4882a593Smuzhiyun				compatible = "aspeed,ast2600-scu", "syscon", "simple-mfd";
303*4882a593Smuzhiyun				reg = <0x1e6e2000 0x1000>;
304*4882a593Smuzhiyun				ranges = <0 0x1e6e2000 0x1000>;
305*4882a593Smuzhiyun				#address-cells = <1>;
306*4882a593Smuzhiyun				#size-cells = <1>;
307*4882a593Smuzhiyun				#clock-cells = <1>;
308*4882a593Smuzhiyun				#reset-cells = <1>;
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun				pinctrl: pinctrl {
311*4882a593Smuzhiyun					compatible = "aspeed,ast2600-pinctrl";
312*4882a593Smuzhiyun				};
313*4882a593Smuzhiyun
314*4882a593Smuzhiyun				smp-memram@180 {
315*4882a593Smuzhiyun					compatible = "aspeed,ast2600-smpmem";
316*4882a593Smuzhiyun					reg = <0x180 0x40>;
317*4882a593Smuzhiyun				};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun				scu_ic0: interrupt-controller@560 {
320*4882a593Smuzhiyun					#interrupt-cells = <1>;
321*4882a593Smuzhiyun					compatible = "aspeed,ast2600-scu-ic0";
322*4882a593Smuzhiyun					reg = <0x560 0x4>;
323*4882a593Smuzhiyun					interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
324*4882a593Smuzhiyun					interrupt-controller;
325*4882a593Smuzhiyun				};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun				scu_ic1: interrupt-controller@570 {
328*4882a593Smuzhiyun					#interrupt-cells = <1>;
329*4882a593Smuzhiyun					compatible = "aspeed,ast2600-scu-ic1";
330*4882a593Smuzhiyun					reg = <0x570 0x4>;
331*4882a593Smuzhiyun					interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
332*4882a593Smuzhiyun					interrupt-controller;
333*4882a593Smuzhiyun				};
334*4882a593Smuzhiyun			};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun			rng: hwrng@1e6e2524 {
337*4882a593Smuzhiyun				compatible = "timeriomem_rng";
338*4882a593Smuzhiyun				reg = <0x1e6e2524 0x4>;
339*4882a593Smuzhiyun				period = <1>;
340*4882a593Smuzhiyun				quality = <100>;
341*4882a593Smuzhiyun			};
342*4882a593Smuzhiyun
343*4882a593Smuzhiyun			xdma: xdma@1e6e7000 {
344*4882a593Smuzhiyun				compatible = "aspeed,ast2600-xdma";
345*4882a593Smuzhiyun				reg = <0x1e6e7000 0x100>;
346*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_BCLK>;
347*4882a593Smuzhiyun				resets = <&syscon ASPEED_RESET_DEV_XDMA>, <&syscon ASPEED_RESET_RC_XDMA>;
348*4882a593Smuzhiyun				reset-names = "device", "root-complex";
349*4882a593Smuzhiyun				interrupts-extended = <&gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>,
350*4882a593Smuzhiyun						      <&scu_ic0 ASPEED_AST2600_SCU_IC0_PCIE_PERST_LO_TO_HI>;
351*4882a593Smuzhiyun				aspeed,pcie-device = "bmc";
352*4882a593Smuzhiyun				aspeed,scu = <&syscon>;
353*4882a593Smuzhiyun				status = "disabled";
354*4882a593Smuzhiyun			};
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun			gpio0: gpio@1e780000 {
357*4882a593Smuzhiyun				#gpio-cells = <2>;
358*4882a593Smuzhiyun				gpio-controller;
359*4882a593Smuzhiyun				compatible = "aspeed,ast2600-gpio";
360*4882a593Smuzhiyun				reg = <0x1e780000 0x400>;
361*4882a593Smuzhiyun				interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
362*4882a593Smuzhiyun				gpio-ranges = <&pinctrl 0 0 208>;
363*4882a593Smuzhiyun				ngpios = <208>;
364*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_APB2>;
365*4882a593Smuzhiyun				interrupt-controller;
366*4882a593Smuzhiyun				#interrupt-cells = <2>;
367*4882a593Smuzhiyun			};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun			gpio1: gpio@1e780800 {
370*4882a593Smuzhiyun				#gpio-cells = <2>;
371*4882a593Smuzhiyun				gpio-controller;
372*4882a593Smuzhiyun				compatible = "aspeed,ast2600-gpio";
373*4882a593Smuzhiyun				reg = <0x1e780800 0x800>;
374*4882a593Smuzhiyun				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
375*4882a593Smuzhiyun				gpio-ranges = <&pinctrl 0 208 36>;
376*4882a593Smuzhiyun				ngpios = <36>;
377*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_APB1>;
378*4882a593Smuzhiyun				interrupt-controller;
379*4882a593Smuzhiyun				#interrupt-cells = <2>;
380*4882a593Smuzhiyun			};
381*4882a593Smuzhiyun
382*4882a593Smuzhiyun			rtc: rtc@1e781000 {
383*4882a593Smuzhiyun				compatible = "aspeed,ast2600-rtc";
384*4882a593Smuzhiyun				reg = <0x1e781000 0x18>;
385*4882a593Smuzhiyun				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
386*4882a593Smuzhiyun				status = "disabled";
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun
389*4882a593Smuzhiyun			timer: timer@1e782000 {
390*4882a593Smuzhiyun				compatible = "aspeed,ast2600-timer";
391*4882a593Smuzhiyun				reg = <0x1e782000 0x90>;
392*4882a593Smuzhiyun				interrupts-extended = <&gic  GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
393*4882a593Smuzhiyun						<&gic  GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
394*4882a593Smuzhiyun						<&gic  GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
395*4882a593Smuzhiyun						<&gic  GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>,
396*4882a593Smuzhiyun						<&gic  GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>,
397*4882a593Smuzhiyun						<&gic  GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>,
398*4882a593Smuzhiyun						<&gic  GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>,
399*4882a593Smuzhiyun						<&gic  GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
400*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_APB1>;
401*4882a593Smuzhiyun				clock-names = "PCLK";
402*4882a593Smuzhiyun				status = "disabled";
403*4882a593Smuzhiyun                        };
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun			uart1: serial@1e783000 {
406*4882a593Smuzhiyun				compatible = "ns16550a";
407*4882a593Smuzhiyun				reg = <0x1e783000 0x20>;
408*4882a593Smuzhiyun				reg-shift = <2>;
409*4882a593Smuzhiyun				reg-io-width = <4>;
410*4882a593Smuzhiyun				interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
411*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_UART1CLK>;
412*4882a593Smuzhiyun				resets = <&lpc_reset 4>;
413*4882a593Smuzhiyun				no-loopback-test;
414*4882a593Smuzhiyun				pinctrl-names = "default";
415*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_txd1_default &pinctrl_rxd1_default>;
416*4882a593Smuzhiyun				status = "disabled";
417*4882a593Smuzhiyun			};
418*4882a593Smuzhiyun
419*4882a593Smuzhiyun			uart5: serial@1e784000 {
420*4882a593Smuzhiyun				compatible = "ns16550a";
421*4882a593Smuzhiyun				reg = <0x1e784000 0x1000>;
422*4882a593Smuzhiyun				reg-shift = <2>;
423*4882a593Smuzhiyun				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
424*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_UART5CLK>;
425*4882a593Smuzhiyun				no-loopback-test;
426*4882a593Smuzhiyun			};
427*4882a593Smuzhiyun
428*4882a593Smuzhiyun			wdt1: watchdog@1e785000 {
429*4882a593Smuzhiyun				compatible = "aspeed,ast2600-wdt";
430*4882a593Smuzhiyun				reg = <0x1e785000 0x40>;
431*4882a593Smuzhiyun			};
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun			wdt2: watchdog@1e785040 {
434*4882a593Smuzhiyun				compatible = "aspeed,ast2600-wdt";
435*4882a593Smuzhiyun				reg = <0x1e785040 0x40>;
436*4882a593Smuzhiyun				status = "disabled";
437*4882a593Smuzhiyun			};
438*4882a593Smuzhiyun
439*4882a593Smuzhiyun			wdt3: watchdog@1e785080 {
440*4882a593Smuzhiyun				compatible = "aspeed,ast2600-wdt";
441*4882a593Smuzhiyun				reg = <0x1e785080 0x40>;
442*4882a593Smuzhiyun				status = "disabled";
443*4882a593Smuzhiyun			};
444*4882a593Smuzhiyun
445*4882a593Smuzhiyun			wdt4: watchdog@1e7850c0 {
446*4882a593Smuzhiyun				compatible = "aspeed,ast2600-wdt";
447*4882a593Smuzhiyun				reg = <0x1e7850C0 0x40>;
448*4882a593Smuzhiyun				status = "disabled";
449*4882a593Smuzhiyun			};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun			lpc: lpc@1e789000 {
452*4882a593Smuzhiyun				compatible = "aspeed,ast2600-lpc", "simple-mfd";
453*4882a593Smuzhiyun				reg = <0x1e789000 0x1000>;
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun				#address-cells = <1>;
456*4882a593Smuzhiyun				#size-cells = <1>;
457*4882a593Smuzhiyun				ranges = <0x0 0x1e789000 0x1000>;
458*4882a593Smuzhiyun
459*4882a593Smuzhiyun				lpc_bmc: lpc-bmc@0 {
460*4882a593Smuzhiyun					compatible = "aspeed,ast2600-lpc-bmc", "simple-mfd", "syscon";
461*4882a593Smuzhiyun					reg = <0x0 0x80>;
462*4882a593Smuzhiyun					reg-io-width = <4>;
463*4882a593Smuzhiyun
464*4882a593Smuzhiyun					#address-cells = <1>;
465*4882a593Smuzhiyun					#size-cells = <1>;
466*4882a593Smuzhiyun					ranges = <0x0 0x0 0x80>;
467*4882a593Smuzhiyun
468*4882a593Smuzhiyun					kcs1: kcs@24 {
469*4882a593Smuzhiyun						compatible = "aspeed,ast2500-kcs-bmc-v2";
470*4882a593Smuzhiyun						reg = <0x24 0x1>, <0x30 0x1>, <0x3c 0x1>;
471*4882a593Smuzhiyun						interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
472*4882a593Smuzhiyun						kcs_chan = <1>;
473*4882a593Smuzhiyun						status = "disabled";
474*4882a593Smuzhiyun					};
475*4882a593Smuzhiyun					kcs2: kcs@28 {
476*4882a593Smuzhiyun						compatible = "aspeed,ast2500-kcs-bmc-v2";
477*4882a593Smuzhiyun						reg = <0x28 0x1>, <0x34 0x1>, <0x40 0x1>;
478*4882a593Smuzhiyun						interrupts = <GIC_SPI 139 IRQ_TYPE_LEVEL_HIGH>;
479*4882a593Smuzhiyun						status = "disabled";
480*4882a593Smuzhiyun					};
481*4882a593Smuzhiyun					kcs3: kcs@2c {
482*4882a593Smuzhiyun						compatible = "aspeed,ast2500-kcs-bmc-v2";
483*4882a593Smuzhiyun						reg = <0x2c 0x1>, <0x38 0x1>, <0x44 0x1>;
484*4882a593Smuzhiyun						interrupts = <GIC_SPI 140 IRQ_TYPE_LEVEL_HIGH>;
485*4882a593Smuzhiyun						status = "disabled";
486*4882a593Smuzhiyun					};
487*4882a593Smuzhiyun				};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun				lpc_host: lpc-host@80 {
490*4882a593Smuzhiyun					compatible = "aspeed,ast2600-lpc-host", "simple-mfd", "syscon";
491*4882a593Smuzhiyun					reg = <0x80 0x1e0>;
492*4882a593Smuzhiyun					reg-io-width = <4>;
493*4882a593Smuzhiyun
494*4882a593Smuzhiyun					#address-cells = <1>;
495*4882a593Smuzhiyun					#size-cells = <1>;
496*4882a593Smuzhiyun					ranges = <0x0 0x80 0x1e0>;
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun					kcs4: kcs@94 {
499*4882a593Smuzhiyun						compatible = "aspeed,ast2500-kcs-bmc-v2";
500*4882a593Smuzhiyun						reg = <0x94 0x1>, <0x98 0x1>, <0x9c 0x1>;
501*4882a593Smuzhiyun						interrupts = <GIC_SPI 141 IRQ_TYPE_LEVEL_HIGH>;
502*4882a593Smuzhiyun						status = "disabled";
503*4882a593Smuzhiyun					};
504*4882a593Smuzhiyun
505*4882a593Smuzhiyun					lpc_ctrl: lpc-ctrl@0 {
506*4882a593Smuzhiyun						compatible = "aspeed,ast2600-lpc-ctrl";
507*4882a593Smuzhiyun						reg = <0x0 0x80>;
508*4882a593Smuzhiyun						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
509*4882a593Smuzhiyun						status = "disabled";
510*4882a593Smuzhiyun					};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun					lpc_snoop: lpc-snoop@0 {
513*4882a593Smuzhiyun						compatible = "aspeed,ast2600-lpc-snoop";
514*4882a593Smuzhiyun						reg = <0x0 0x80>;
515*4882a593Smuzhiyun						interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
516*4882a593Smuzhiyun						clocks = <&syscon ASPEED_CLK_GATE_LCLK>;
517*4882a593Smuzhiyun						status = "disabled";
518*4882a593Smuzhiyun					};
519*4882a593Smuzhiyun
520*4882a593Smuzhiyun					lhc: lhc@20 {
521*4882a593Smuzhiyun						compatible = "aspeed,ast2600-lhc";
522*4882a593Smuzhiyun						reg = <0x20 0x24 0x48 0x8>;
523*4882a593Smuzhiyun					};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun					lpc_reset: reset-controller@18 {
526*4882a593Smuzhiyun						compatible = "aspeed,ast2600-lpc-reset";
527*4882a593Smuzhiyun						reg = <0x18 0x4>;
528*4882a593Smuzhiyun						#reset-cells = <1>;
529*4882a593Smuzhiyun					};
530*4882a593Smuzhiyun
531*4882a593Smuzhiyun					ibt: ibt@c0 {
532*4882a593Smuzhiyun						compatible = "aspeed,ast2600-ibt-bmc";
533*4882a593Smuzhiyun						reg = <0xc0 0x18>;
534*4882a593Smuzhiyun						interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
535*4882a593Smuzhiyun						status = "disabled";
536*4882a593Smuzhiyun					};
537*4882a593Smuzhiyun				};
538*4882a593Smuzhiyun			};
539*4882a593Smuzhiyun
540*4882a593Smuzhiyun			sdc: sdc@1e740000 {
541*4882a593Smuzhiyun				compatible = "aspeed,ast2600-sd-controller";
542*4882a593Smuzhiyun				reg = <0x1e740000 0x100>;
543*4882a593Smuzhiyun				#address-cells = <1>;
544*4882a593Smuzhiyun				#size-cells = <1>;
545*4882a593Smuzhiyun				ranges = <0 0x1e740000 0x10000>;
546*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_SDCLK>;
547*4882a593Smuzhiyun				status = "disabled";
548*4882a593Smuzhiyun
549*4882a593Smuzhiyun				sdhci0: sdhci@1e740100 {
550*4882a593Smuzhiyun					compatible = "aspeed,ast2600-sdhci", "sdhci";
551*4882a593Smuzhiyun					reg = <0x100 0x100>;
552*4882a593Smuzhiyun					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
553*4882a593Smuzhiyun					sdhci,auto-cmd12;
554*4882a593Smuzhiyun					clocks = <&syscon ASPEED_CLK_SDIO>;
555*4882a593Smuzhiyun					status = "disabled";
556*4882a593Smuzhiyun				};
557*4882a593Smuzhiyun
558*4882a593Smuzhiyun				sdhci1: sdhci@1e740200 {
559*4882a593Smuzhiyun					compatible = "aspeed,ast2600-sdhci", "sdhci";
560*4882a593Smuzhiyun					reg = <0x200 0x100>;
561*4882a593Smuzhiyun					interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
562*4882a593Smuzhiyun					sdhci,auto-cmd12;
563*4882a593Smuzhiyun					clocks = <&syscon ASPEED_CLK_SDIO>;
564*4882a593Smuzhiyun					status = "disabled";
565*4882a593Smuzhiyun				};
566*4882a593Smuzhiyun			};
567*4882a593Smuzhiyun
568*4882a593Smuzhiyun			emmc_controller: sdc@1e750000 {
569*4882a593Smuzhiyun				compatible = "aspeed,ast2600-sd-controller";
570*4882a593Smuzhiyun				reg = <0x1e750000 0x100>;
571*4882a593Smuzhiyun				#address-cells = <1>;
572*4882a593Smuzhiyun				#size-cells = <1>;
573*4882a593Smuzhiyun				ranges = <0 0x1e750000 0x10000>;
574*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_EMMCCLK>;
575*4882a593Smuzhiyun				status = "disabled";
576*4882a593Smuzhiyun
577*4882a593Smuzhiyun				emmc: sdhci@1e750100 {
578*4882a593Smuzhiyun					compatible = "aspeed,ast2600-sdhci";
579*4882a593Smuzhiyun					reg = <0x100 0x100>;
580*4882a593Smuzhiyun					sdhci,auto-cmd12;
581*4882a593Smuzhiyun					interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
582*4882a593Smuzhiyun					clocks = <&syscon ASPEED_CLK_EMMC>;
583*4882a593Smuzhiyun					pinctrl-names = "default";
584*4882a593Smuzhiyun					pinctrl-0 = <&pinctrl_emmc_default>;
585*4882a593Smuzhiyun				};
586*4882a593Smuzhiyun			};
587*4882a593Smuzhiyun
588*4882a593Smuzhiyun			vuart1: serial@1e787000 {
589*4882a593Smuzhiyun				compatible = "aspeed,ast2500-vuart";
590*4882a593Smuzhiyun				reg = <0x1e787000 0x40>;
591*4882a593Smuzhiyun				reg-shift = <2>;
592*4882a593Smuzhiyun				interrupts = <GIC_SPI 147 IRQ_TYPE_LEVEL_HIGH>;
593*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_APB1>;
594*4882a593Smuzhiyun				no-loopback-test;
595*4882a593Smuzhiyun				status = "disabled";
596*4882a593Smuzhiyun			};
597*4882a593Smuzhiyun
598*4882a593Smuzhiyun			vuart2: serial@1e788000 {
599*4882a593Smuzhiyun				compatible = "aspeed,ast2500-vuart";
600*4882a593Smuzhiyun				reg = <0x1e788000 0x40>;
601*4882a593Smuzhiyun				reg-shift = <2>;
602*4882a593Smuzhiyun				interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
603*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_APB1>;
604*4882a593Smuzhiyun				no-loopback-test;
605*4882a593Smuzhiyun				status = "disabled";
606*4882a593Smuzhiyun			};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun			uart2: serial@1e78d000 {
609*4882a593Smuzhiyun				compatible = "ns16550a";
610*4882a593Smuzhiyun				reg = <0x1e78d000 0x20>;
611*4882a593Smuzhiyun				reg-shift = <2>;
612*4882a593Smuzhiyun				reg-io-width = <4>;
613*4882a593Smuzhiyun				interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
614*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_UART2CLK>;
615*4882a593Smuzhiyun				resets = <&lpc_reset 5>;
616*4882a593Smuzhiyun				no-loopback-test;
617*4882a593Smuzhiyun				pinctrl-names = "default";
618*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_txd2_default &pinctrl_rxd2_default>;
619*4882a593Smuzhiyun				status = "disabled";
620*4882a593Smuzhiyun			};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun			uart3: serial@1e78e000 {
623*4882a593Smuzhiyun				compatible = "ns16550a";
624*4882a593Smuzhiyun				reg = <0x1e78e000 0x20>;
625*4882a593Smuzhiyun				reg-shift = <2>;
626*4882a593Smuzhiyun				reg-io-width = <4>;
627*4882a593Smuzhiyun				interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
628*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_UART3CLK>;
629*4882a593Smuzhiyun				resets = <&lpc_reset 6>;
630*4882a593Smuzhiyun				no-loopback-test;
631*4882a593Smuzhiyun				pinctrl-names = "default";
632*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_txd3_default &pinctrl_rxd3_default>;
633*4882a593Smuzhiyun				status = "disabled";
634*4882a593Smuzhiyun			};
635*4882a593Smuzhiyun
636*4882a593Smuzhiyun			uart4: serial@1e78f000 {
637*4882a593Smuzhiyun				compatible = "ns16550a";
638*4882a593Smuzhiyun				reg = <0x1e78f000 0x20>;
639*4882a593Smuzhiyun				reg-shift = <2>;
640*4882a593Smuzhiyun				reg-io-width = <4>;
641*4882a593Smuzhiyun				interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
642*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_UART4CLK>;
643*4882a593Smuzhiyun				resets = <&lpc_reset 7>;
644*4882a593Smuzhiyun				no-loopback-test;
645*4882a593Smuzhiyun				pinctrl-names = "default";
646*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_txd4_default &pinctrl_rxd4_default>;
647*4882a593Smuzhiyun				status = "disabled";
648*4882a593Smuzhiyun			};
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun			i2c: bus@1e78a000 {
651*4882a593Smuzhiyun				compatible = "simple-bus";
652*4882a593Smuzhiyun				#address-cells = <1>;
653*4882a593Smuzhiyun				#size-cells = <1>;
654*4882a593Smuzhiyun				ranges = <0 0x1e78a000 0x1000>;
655*4882a593Smuzhiyun			};
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun			fsim0: fsi@1e79b000 {
658*4882a593Smuzhiyun				compatible = "aspeed,ast2600-fsi-master", "fsi-master";
659*4882a593Smuzhiyun				reg = <0x1e79b000 0x94>;
660*4882a593Smuzhiyun				interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
661*4882a593Smuzhiyun				pinctrl-names = "default";
662*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_fsi1_default>;
663*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
664*4882a593Smuzhiyun				status = "disabled";
665*4882a593Smuzhiyun			};
666*4882a593Smuzhiyun
667*4882a593Smuzhiyun			fsim1: fsi@1e79b100 {
668*4882a593Smuzhiyun				compatible = "aspeed,ast2600-fsi-master", "fsi-master";
669*4882a593Smuzhiyun				reg = <0x1e79b100 0x94>;
670*4882a593Smuzhiyun				interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
671*4882a593Smuzhiyun				pinctrl-names = "default";
672*4882a593Smuzhiyun				pinctrl-0 = <&pinctrl_fsi2_default>;
673*4882a593Smuzhiyun				clocks = <&syscon ASPEED_CLK_GATE_FSICLK>;
674*4882a593Smuzhiyun				status = "disabled";
675*4882a593Smuzhiyun			};
676*4882a593Smuzhiyun		};
677*4882a593Smuzhiyun	};
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun#include "aspeed-g6-pinctrl.dtsi"
681*4882a593Smuzhiyun
682*4882a593Smuzhiyun&i2c {
683*4882a593Smuzhiyun	i2c0: i2c-bus@80 {
684*4882a593Smuzhiyun		#address-cells = <1>;
685*4882a593Smuzhiyun		#size-cells = <0>;
686*4882a593Smuzhiyun		#interrupt-cells = <1>;
687*4882a593Smuzhiyun		reg = <0x80 0x80>;
688*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
689*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
690*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
691*4882a593Smuzhiyun		interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
692*4882a593Smuzhiyun		bus-frequency = <100000>;
693*4882a593Smuzhiyun		pinctrl-names = "default";
694*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c1_default>;
695*4882a593Smuzhiyun		status = "disabled";
696*4882a593Smuzhiyun	};
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun	i2c1: i2c-bus@100 {
699*4882a593Smuzhiyun		#address-cells = <1>;
700*4882a593Smuzhiyun		#size-cells = <0>;
701*4882a593Smuzhiyun		#interrupt-cells = <1>;
702*4882a593Smuzhiyun		reg = <0x100 0x80>;
703*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
704*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
705*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
706*4882a593Smuzhiyun		interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
707*4882a593Smuzhiyun		bus-frequency = <100000>;
708*4882a593Smuzhiyun		pinctrl-names = "default";
709*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c2_default>;
710*4882a593Smuzhiyun		status = "disabled";
711*4882a593Smuzhiyun	};
712*4882a593Smuzhiyun
713*4882a593Smuzhiyun	i2c2: i2c-bus@180 {
714*4882a593Smuzhiyun		#address-cells = <1>;
715*4882a593Smuzhiyun		#size-cells = <0>;
716*4882a593Smuzhiyun		#interrupt-cells = <1>;
717*4882a593Smuzhiyun		reg = <0x180 0x80>;
718*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
719*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
720*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
721*4882a593Smuzhiyun		interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
722*4882a593Smuzhiyun		bus-frequency = <100000>;
723*4882a593Smuzhiyun		pinctrl-names = "default";
724*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c3_default>;
725*4882a593Smuzhiyun		status = "disabled";
726*4882a593Smuzhiyun	};
727*4882a593Smuzhiyun
728*4882a593Smuzhiyun	i2c3: i2c-bus@200 {
729*4882a593Smuzhiyun		#address-cells = <1>;
730*4882a593Smuzhiyun		#size-cells = <0>;
731*4882a593Smuzhiyun		#interrupt-cells = <1>;
732*4882a593Smuzhiyun		reg = <0x200 0x80>;
733*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
734*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
735*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
736*4882a593Smuzhiyun		interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
737*4882a593Smuzhiyun		bus-frequency = <100000>;
738*4882a593Smuzhiyun		pinctrl-names = "default";
739*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c4_default>;
740*4882a593Smuzhiyun		status = "disabled";
741*4882a593Smuzhiyun	};
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun	i2c4: i2c-bus@280 {
744*4882a593Smuzhiyun		#address-cells = <1>;
745*4882a593Smuzhiyun		#size-cells = <0>;
746*4882a593Smuzhiyun		#interrupt-cells = <1>;
747*4882a593Smuzhiyun		reg = <0x280 0x80>;
748*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
749*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
750*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
751*4882a593Smuzhiyun		interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
752*4882a593Smuzhiyun		bus-frequency = <100000>;
753*4882a593Smuzhiyun		pinctrl-names = "default";
754*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c5_default>;
755*4882a593Smuzhiyun		status = "disabled";
756*4882a593Smuzhiyun	};
757*4882a593Smuzhiyun
758*4882a593Smuzhiyun	i2c5: i2c-bus@300 {
759*4882a593Smuzhiyun		#address-cells = <1>;
760*4882a593Smuzhiyun		#size-cells = <0>;
761*4882a593Smuzhiyun		#interrupt-cells = <1>;
762*4882a593Smuzhiyun		reg = <0x300 0x80>;
763*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
764*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
765*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
766*4882a593Smuzhiyun		interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>;
767*4882a593Smuzhiyun		bus-frequency = <100000>;
768*4882a593Smuzhiyun		pinctrl-names = "default";
769*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c6_default>;
770*4882a593Smuzhiyun		status = "disabled";
771*4882a593Smuzhiyun	};
772*4882a593Smuzhiyun
773*4882a593Smuzhiyun	i2c6: i2c-bus@380 {
774*4882a593Smuzhiyun		#address-cells = <1>;
775*4882a593Smuzhiyun		#size-cells = <0>;
776*4882a593Smuzhiyun		#interrupt-cells = <1>;
777*4882a593Smuzhiyun		reg = <0x380 0x80>;
778*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
779*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
780*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
781*4882a593Smuzhiyun		interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
782*4882a593Smuzhiyun		bus-frequency = <100000>;
783*4882a593Smuzhiyun		pinctrl-names = "default";
784*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c7_default>;
785*4882a593Smuzhiyun		status = "disabled";
786*4882a593Smuzhiyun	};
787*4882a593Smuzhiyun
788*4882a593Smuzhiyun	i2c7: i2c-bus@400 {
789*4882a593Smuzhiyun		#address-cells = <1>;
790*4882a593Smuzhiyun		#size-cells = <0>;
791*4882a593Smuzhiyun		#interrupt-cells = <1>;
792*4882a593Smuzhiyun		reg = <0x400 0x80>;
793*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
794*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
795*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
796*4882a593Smuzhiyun		interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
797*4882a593Smuzhiyun		bus-frequency = <100000>;
798*4882a593Smuzhiyun		pinctrl-names = "default";
799*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c8_default>;
800*4882a593Smuzhiyun		status = "disabled";
801*4882a593Smuzhiyun	};
802*4882a593Smuzhiyun
803*4882a593Smuzhiyun	i2c8: i2c-bus@480 {
804*4882a593Smuzhiyun		#address-cells = <1>;
805*4882a593Smuzhiyun		#size-cells = <0>;
806*4882a593Smuzhiyun		#interrupt-cells = <1>;
807*4882a593Smuzhiyun		reg = <0x480 0x80>;
808*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
809*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
810*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
811*4882a593Smuzhiyun		interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
812*4882a593Smuzhiyun		bus-frequency = <100000>;
813*4882a593Smuzhiyun		pinctrl-names = "default";
814*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c9_default>;
815*4882a593Smuzhiyun		status = "disabled";
816*4882a593Smuzhiyun	};
817*4882a593Smuzhiyun
818*4882a593Smuzhiyun	i2c9: i2c-bus@500 {
819*4882a593Smuzhiyun		#address-cells = <1>;
820*4882a593Smuzhiyun		#size-cells = <0>;
821*4882a593Smuzhiyun		#interrupt-cells = <1>;
822*4882a593Smuzhiyun		reg = <0x500 0x80>;
823*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
824*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
825*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
826*4882a593Smuzhiyun		interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
827*4882a593Smuzhiyun		bus-frequency = <100000>;
828*4882a593Smuzhiyun		pinctrl-names = "default";
829*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c10_default>;
830*4882a593Smuzhiyun		status = "disabled";
831*4882a593Smuzhiyun	};
832*4882a593Smuzhiyun
833*4882a593Smuzhiyun	i2c10: i2c-bus@580 {
834*4882a593Smuzhiyun		#address-cells = <1>;
835*4882a593Smuzhiyun		#size-cells = <0>;
836*4882a593Smuzhiyun		#interrupt-cells = <1>;
837*4882a593Smuzhiyun		reg = <0x580 0x80>;
838*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
839*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
840*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
841*4882a593Smuzhiyun		interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
842*4882a593Smuzhiyun		bus-frequency = <100000>;
843*4882a593Smuzhiyun		pinctrl-names = "default";
844*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c11_default>;
845*4882a593Smuzhiyun		status = "disabled";
846*4882a593Smuzhiyun	};
847*4882a593Smuzhiyun
848*4882a593Smuzhiyun	i2c11: i2c-bus@600 {
849*4882a593Smuzhiyun		#address-cells = <1>;
850*4882a593Smuzhiyun		#size-cells = <0>;
851*4882a593Smuzhiyun		#interrupt-cells = <1>;
852*4882a593Smuzhiyun		reg = <0x600 0x80>;
853*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
854*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
855*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
856*4882a593Smuzhiyun		interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
857*4882a593Smuzhiyun		bus-frequency = <100000>;
858*4882a593Smuzhiyun		pinctrl-names = "default";
859*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c12_default>;
860*4882a593Smuzhiyun		status = "disabled";
861*4882a593Smuzhiyun	};
862*4882a593Smuzhiyun
863*4882a593Smuzhiyun	i2c12: i2c-bus@680 {
864*4882a593Smuzhiyun		#address-cells = <1>;
865*4882a593Smuzhiyun		#size-cells = <0>;
866*4882a593Smuzhiyun		#interrupt-cells = <1>;
867*4882a593Smuzhiyun		reg = <0x680 0x80>;
868*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
869*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
870*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
871*4882a593Smuzhiyun		interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>;
872*4882a593Smuzhiyun		bus-frequency = <100000>;
873*4882a593Smuzhiyun		pinctrl-names = "default";
874*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c13_default>;
875*4882a593Smuzhiyun		status = "disabled";
876*4882a593Smuzhiyun	};
877*4882a593Smuzhiyun
878*4882a593Smuzhiyun	i2c13: i2c-bus@700 {
879*4882a593Smuzhiyun		#address-cells = <1>;
880*4882a593Smuzhiyun		#size-cells = <0>;
881*4882a593Smuzhiyun		#interrupt-cells = <1>;
882*4882a593Smuzhiyun		reg = <0x700 0x80>;
883*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
884*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
885*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
886*4882a593Smuzhiyun		interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
887*4882a593Smuzhiyun		bus-frequency = <100000>;
888*4882a593Smuzhiyun		pinctrl-names = "default";
889*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c14_default>;
890*4882a593Smuzhiyun		status = "disabled";
891*4882a593Smuzhiyun	};
892*4882a593Smuzhiyun
893*4882a593Smuzhiyun	i2c14: i2c-bus@780 {
894*4882a593Smuzhiyun		#address-cells = <1>;
895*4882a593Smuzhiyun		#size-cells = <0>;
896*4882a593Smuzhiyun		#interrupt-cells = <1>;
897*4882a593Smuzhiyun		reg = <0x780 0x80>;
898*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
899*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
900*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
901*4882a593Smuzhiyun		interrupts = <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>;
902*4882a593Smuzhiyun		bus-frequency = <100000>;
903*4882a593Smuzhiyun		pinctrl-names = "default";
904*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c15_default>;
905*4882a593Smuzhiyun		status = "disabled";
906*4882a593Smuzhiyun	};
907*4882a593Smuzhiyun
908*4882a593Smuzhiyun	i2c15: i2c-bus@800 {
909*4882a593Smuzhiyun		#address-cells = <1>;
910*4882a593Smuzhiyun		#size-cells = <0>;
911*4882a593Smuzhiyun		#interrupt-cells = <1>;
912*4882a593Smuzhiyun		reg = <0x800 0x80>;
913*4882a593Smuzhiyun		compatible = "aspeed,ast2600-i2c-bus";
914*4882a593Smuzhiyun		clocks = <&syscon ASPEED_CLK_APB2>;
915*4882a593Smuzhiyun		resets = <&syscon ASPEED_RESET_I2C>;
916*4882a593Smuzhiyun		interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
917*4882a593Smuzhiyun		bus-frequency = <100000>;
918*4882a593Smuzhiyun		pinctrl-names = "default";
919*4882a593Smuzhiyun		pinctrl-0 = <&pinctrl_i2c16_default>;
920*4882a593Smuzhiyun		status = "disabled";
921*4882a593Smuzhiyun	};
922*4882a593Smuzhiyun};
923