1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-or-later 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/pinctrl/aspeed,ast2500-pinctrl.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: ASPEED AST2500 Pin Controller 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Andrew Jeffery <andrew@aj.id.au> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: |+ 13*4882a593Smuzhiyun The pin controller node should be the child of a syscon node with the 14*4882a593Smuzhiyun required property: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun - compatible: Should be one of the following: 17*4882a593Smuzhiyun "aspeed,ast2500-scu", "syscon", "simple-mfd" 18*4882a593Smuzhiyun "aspeed,g5-scu", "syscon", "simple-mfd" 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun Refer to the the bindings described in 21*4882a593Smuzhiyun Documentation/devicetree/bindings/mfd/syscon.yaml 22*4882a593Smuzhiyun 23*4882a593Smuzhiyunproperties: 24*4882a593Smuzhiyun compatible: 25*4882a593Smuzhiyun const: aspeed,ast2500-pinctrl 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun description: | 28*4882a593Smuzhiyun A hint for the memory regions associated with the pin-controller 29*4882a593Smuzhiyun aspeed,external-nodes: 30*4882a593Smuzhiyun minItems: 2 31*4882a593Smuzhiyun maxItems: 2 32*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle-array 33*4882a593Smuzhiyun description: | 34*4882a593Smuzhiyun A cell of phandles to external controller nodes: 35*4882a593Smuzhiyun 0: compatible with "aspeed,ast2500-gfx", "syscon" 36*4882a593Smuzhiyun 1: compatible with "aspeed,ast2500-lhc", "syscon" 37*4882a593Smuzhiyun 38*4882a593SmuzhiyunpatternProperties: 39*4882a593Smuzhiyun '^.*$': 40*4882a593Smuzhiyun if: 41*4882a593Smuzhiyun type: object 42*4882a593Smuzhiyun then: 43*4882a593Smuzhiyun patternProperties: 44*4882a593Smuzhiyun "^function|groups$": 45*4882a593Smuzhiyun $ref: "/schemas/types.yaml#/definitions/string" 46*4882a593Smuzhiyun enum: [ ACPI, ADC0, ADC1, ADC10, ADC11, ADC12, ADC13, ADC14, ADC15, 47*4882a593Smuzhiyun ADC2, ADC3, ADC4, ADC5, ADC6, ADC7, ADC8, ADC9, BMCINT, DDCCLK, DDCDAT, 48*4882a593Smuzhiyun ESPI, FWSPICS1, FWSPICS2, GPID0, GPID2, GPID4, GPID6, GPIE0, GPIE2, 49*4882a593Smuzhiyun GPIE4, GPIE6, I2C10, I2C11, I2C12, I2C13, I2C14, I2C3, I2C4, I2C5, 50*4882a593Smuzhiyun I2C6, I2C7, I2C8, I2C9, LAD0, LAD1, LAD2, LAD3, LCLK, LFRAME, LPCHC, 51*4882a593Smuzhiyun LPCPD, LPCPLUS, LPCPME, LPCRST, LPCSMI, LSIRQ, MAC1LINK, MAC2LINK, 52*4882a593Smuzhiyun MDIO1, MDIO2, NCTS1, NCTS2, NCTS3, NCTS4, NDCD1, NDCD2, NDCD3, NDCD4, 53*4882a593Smuzhiyun NDSR1, NDSR2, NDSR3, NDSR4, NDTR1, NDTR2, NDTR3, NDTR4, NRI1, NRI2, 54*4882a593Smuzhiyun NRI3, NRI4, NRTS1, NRTS2, NRTS3, NRTS4, OSCCLK, PEWAKE, PNOR, PWM0, 55*4882a593Smuzhiyun PWM1, PWM2, PWM3, PWM4, PWM5, PWM6, PWM7, RGMII1, RGMII2, RMII1, 56*4882a593Smuzhiyun RMII2, RXD1, RXD2, RXD3, RXD4, SALT1, SALT10, SALT11, SALT12, SALT13, 57*4882a593Smuzhiyun SALT14, SALT2, SALT3, SALT4, SALT5, SALT6, SALT7, SALT8, SALT9, SCL1, 58*4882a593Smuzhiyun SCL2, SD1, SD2, SDA1, SDA2, SGPS1, SGPS2, SIOONCTRL, SIOPBI, SIOPBO, 59*4882a593Smuzhiyun SIOPWREQ, SIOPWRGD, SIOS3, SIOS5, SIOSCI, SPI1, SPI1CS1, SPI1DEBUG, 60*4882a593Smuzhiyun SPI1PASSTHRU, SPI2CK, SPI2CS0, SPI2CS1, SPI2MISO, SPI2MOSI, TIMER3, 61*4882a593Smuzhiyun TIMER4, TIMER5, TIMER6, TIMER7, TIMER8, TXD1, TXD2, TXD3, TXD4, UART6, 62*4882a593Smuzhiyun USB11BHID, USB2AD, USB2AH, USB2BD, USB2BH, USBCKI, VGABIOSROM, VGAHS, 63*4882a593Smuzhiyun VGAVS, VPI24, VPO, WDTRST1, WDTRST2] 64*4882a593Smuzhiyun 65*4882a593Smuzhiyunrequired: 66*4882a593Smuzhiyun - compatible 67*4882a593Smuzhiyun - aspeed,external-nodes 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunadditionalProperties: false 70*4882a593Smuzhiyun 71*4882a593Smuzhiyunexamples: 72*4882a593Smuzhiyun - | 73*4882a593Smuzhiyun apb { 74*4882a593Smuzhiyun compatible = "simple-bus"; 75*4882a593Smuzhiyun #address-cells = <1>; 76*4882a593Smuzhiyun #size-cells = <1>; 77*4882a593Smuzhiyun ranges; 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun syscon: scu@1e6e2000 { 80*4882a593Smuzhiyun compatible = "aspeed,ast2500-scu", "syscon", "simple-mfd"; 81*4882a593Smuzhiyun reg = <0x1e6e2000 0x1a8>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun pinctrl: pinctrl { 84*4882a593Smuzhiyun compatible = "aspeed,g5-pinctrl"; 85*4882a593Smuzhiyun aspeed,external-nodes = <&gfx>, <&lhc>; 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun pinctrl_i2c3_default: i2c3_default { 88*4882a593Smuzhiyun function = "I2C3"; 89*4882a593Smuzhiyun groups = "I2C3"; 90*4882a593Smuzhiyun }; 91*4882a593Smuzhiyun 92*4882a593Smuzhiyun pinctrl_gpioh0_unbiased_default: gpioh0 { 93*4882a593Smuzhiyun pins = "A18"; 94*4882a593Smuzhiyun bias-disable; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun }; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun gfx: display@1e6e6000 { 100*4882a593Smuzhiyun compatible = "aspeed,ast2500-gfx", "syscon"; 101*4882a593Smuzhiyun reg = <0x1e6e6000 0x1000>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun }; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun lpc: lpc@1e789000 { 106*4882a593Smuzhiyun compatible = "aspeed,ast2500-lpc", "simple-mfd"; 107*4882a593Smuzhiyun reg = <0x1e789000 0x1000>; 108*4882a593Smuzhiyun 109*4882a593Smuzhiyun #address-cells = <1>; 110*4882a593Smuzhiyun #size-cells = <1>; 111*4882a593Smuzhiyun ranges = <0x0 0x1e789000 0x1000>; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun lpc_host: lpc-host@80 { 114*4882a593Smuzhiyun compatible = "aspeed,ast2500-lpc-host", "simple-mfd", "syscon"; 115*4882a593Smuzhiyun reg = <0x80 0x1e0>; 116*4882a593Smuzhiyun reg-io-width = <4>; 117*4882a593Smuzhiyun 118*4882a593Smuzhiyun #address-cells = <1>; 119*4882a593Smuzhiyun #size-cells = <1>; 120*4882a593Smuzhiyun ranges = <0x0 0x80 0x1e0>; 121*4882a593Smuzhiyun 122*4882a593Smuzhiyun lhc: lhc@20 { 123*4882a593Smuzhiyun compatible = "aspeed,ast2500-lhc"; 124*4882a593Smuzhiyun reg = <0x20 0x24>, <0x48 0x8>; 125*4882a593Smuzhiyun }; 126*4882a593Smuzhiyun }; 127*4882a593Smuzhiyun }; 128