1*4882a593Smuzhiyun /*
2*4882a593Smuzhiyun * Copyright 2017 Google, Inc
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * SPDX-License-Identifier: GPL-2.0+
5*4882a593Smuzhiyun */
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <common.h>
8*4882a593Smuzhiyun #include <dm.h>
9*4882a593Smuzhiyun #include <errno.h>
10*4882a593Smuzhiyun #include <asm/io.h>
11*4882a593Smuzhiyun #include <asm/arch/pinctrl.h>
12*4882a593Smuzhiyun #include <asm/arch/scu_ast2500.h>
13*4882a593Smuzhiyun #include <dm/pinctrl.h>
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun DECLARE_GLOBAL_DATA_PTR;
16*4882a593Smuzhiyun
17*4882a593Smuzhiyun /*
18*4882a593Smuzhiyun * This driver works with very simple configuration that has the same name
19*4882a593Smuzhiyun * for group and function. This way it is compatible with the Linux Kernel
20*4882a593Smuzhiyun * driver.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun struct ast2500_pinctrl_priv {
24*4882a593Smuzhiyun struct ast2500_scu *scu;
25*4882a593Smuzhiyun };
26*4882a593Smuzhiyun
ast2500_pinctrl_probe(struct udevice * dev)27*4882a593Smuzhiyun static int ast2500_pinctrl_probe(struct udevice *dev)
28*4882a593Smuzhiyun {
29*4882a593Smuzhiyun struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun priv->scu = ast_get_scu();
32*4882a593Smuzhiyun
33*4882a593Smuzhiyun return 0;
34*4882a593Smuzhiyun }
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun struct ast2500_group_config {
37*4882a593Smuzhiyun char *group_name;
38*4882a593Smuzhiyun /* Control register number (1-10) */
39*4882a593Smuzhiyun unsigned reg_num;
40*4882a593Smuzhiyun /* The mask of control bits in the register */
41*4882a593Smuzhiyun u32 ctrl_bit_mask;
42*4882a593Smuzhiyun };
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun static const struct ast2500_group_config ast2500_groups[] = {
45*4882a593Smuzhiyun { "I2C1", 8, (1 << 13) | (1 << 12) },
46*4882a593Smuzhiyun { "I2C2", 8, (1 << 15) | (1 << 14) },
47*4882a593Smuzhiyun { "I2C3", 8, (1 << 16) },
48*4882a593Smuzhiyun { "I2C4", 5, (1 << 17) },
49*4882a593Smuzhiyun { "I2C4", 5, (1 << 17) },
50*4882a593Smuzhiyun { "I2C5", 5, (1 << 18) },
51*4882a593Smuzhiyun { "I2C6", 5, (1 << 19) },
52*4882a593Smuzhiyun { "I2C7", 5, (1 << 20) },
53*4882a593Smuzhiyun { "I2C8", 5, (1 << 21) },
54*4882a593Smuzhiyun { "I2C9", 5, (1 << 22) },
55*4882a593Smuzhiyun { "I2C10", 5, (1 << 23) },
56*4882a593Smuzhiyun { "I2C11", 5, (1 << 24) },
57*4882a593Smuzhiyun { "I2C12", 5, (1 << 25) },
58*4882a593Smuzhiyun { "I2C13", 5, (1 << 26) },
59*4882a593Smuzhiyun { "I2C14", 5, (1 << 27) },
60*4882a593Smuzhiyun { "MAC1LINK", 1, (1 << 0) },
61*4882a593Smuzhiyun { "MDIO1", 3, (1 << 31) | (1 << 30) },
62*4882a593Smuzhiyun { "MAC2LINK", 1, (1 << 1) },
63*4882a593Smuzhiyun { "MDIO2", 5, (1 << 2) },
64*4882a593Smuzhiyun };
65*4882a593Smuzhiyun
ast2500_pinctrl_get_groups_count(struct udevice * dev)66*4882a593Smuzhiyun static int ast2500_pinctrl_get_groups_count(struct udevice *dev)
67*4882a593Smuzhiyun {
68*4882a593Smuzhiyun debug("PINCTRL: get_(functions/groups)_count\n");
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun return ARRAY_SIZE(ast2500_groups);
71*4882a593Smuzhiyun }
72*4882a593Smuzhiyun
ast2500_pinctrl_get_group_name(struct udevice * dev,unsigned selector)73*4882a593Smuzhiyun static const char *ast2500_pinctrl_get_group_name(struct udevice *dev,
74*4882a593Smuzhiyun unsigned selector)
75*4882a593Smuzhiyun {
76*4882a593Smuzhiyun debug("PINCTRL: get_(function/group)_name %u\n", selector);
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun return ast2500_groups[selector].group_name;
79*4882a593Smuzhiyun }
80*4882a593Smuzhiyun
ast2500_pinctrl_group_set(struct udevice * dev,unsigned selector,unsigned func_selector)81*4882a593Smuzhiyun static int ast2500_pinctrl_group_set(struct udevice *dev, unsigned selector,
82*4882a593Smuzhiyun unsigned func_selector)
83*4882a593Smuzhiyun {
84*4882a593Smuzhiyun struct ast2500_pinctrl_priv *priv = dev_get_priv(dev);
85*4882a593Smuzhiyun const struct ast2500_group_config *config;
86*4882a593Smuzhiyun u32 *ctrl_reg;
87*4882a593Smuzhiyun
88*4882a593Smuzhiyun debug("PINCTRL: group_set <%u, %u>\n", selector, func_selector);
89*4882a593Smuzhiyun if (selector >= ARRAY_SIZE(ast2500_groups))
90*4882a593Smuzhiyun return -EINVAL;
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun config = &ast2500_groups[selector];
93*4882a593Smuzhiyun if (config->reg_num > 6)
94*4882a593Smuzhiyun ctrl_reg = &priv->scu->pinmux_ctrl1[config->reg_num - 7];
95*4882a593Smuzhiyun else
96*4882a593Smuzhiyun ctrl_reg = &priv->scu->pinmux_ctrl[config->reg_num - 1];
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun ast_scu_unlock(priv->scu);
99*4882a593Smuzhiyun setbits_le32(ctrl_reg, config->ctrl_bit_mask);
100*4882a593Smuzhiyun ast_scu_lock(priv->scu);
101*4882a593Smuzhiyun
102*4882a593Smuzhiyun return 0;
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun static struct pinctrl_ops ast2500_pinctrl_ops = {
106*4882a593Smuzhiyun .set_state = pinctrl_generic_set_state,
107*4882a593Smuzhiyun .get_groups_count = ast2500_pinctrl_get_groups_count,
108*4882a593Smuzhiyun .get_group_name = ast2500_pinctrl_get_group_name,
109*4882a593Smuzhiyun .get_functions_count = ast2500_pinctrl_get_groups_count,
110*4882a593Smuzhiyun .get_function_name = ast2500_pinctrl_get_group_name,
111*4882a593Smuzhiyun .pinmux_group_set = ast2500_pinctrl_group_set,
112*4882a593Smuzhiyun };
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun static const struct udevice_id ast2500_pinctrl_ids[] = {
115*4882a593Smuzhiyun { .compatible = "aspeed,ast2500-pinctrl" },
116*4882a593Smuzhiyun { .compatible = "aspeed,g5-pinctrl" },
117*4882a593Smuzhiyun { }
118*4882a593Smuzhiyun };
119*4882a593Smuzhiyun
120*4882a593Smuzhiyun U_BOOT_DRIVER(pinctrl_ast2500) = {
121*4882a593Smuzhiyun .name = "aspeed_ast2500_pinctrl",
122*4882a593Smuzhiyun .id = UCLASS_PINCTRL,
123*4882a593Smuzhiyun .of_match = ast2500_pinctrl_ids,
124*4882a593Smuzhiyun .priv_auto_alloc_size = sizeof(struct ast2500_pinctrl_priv),
125*4882a593Smuzhiyun .ops = &ast2500_pinctrl_ops,
126*4882a593Smuzhiyun .probe = ast2500_pinctrl_probe,
127*4882a593Smuzhiyun };
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