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/OK3568_Linux_fs/yocto/poky/meta/conf/machine/include/arm/armv7m/
H A Dtune-cortexm4.inc2 # Tune Settings for Cortex-M4
6 TUNEVALID[cortexm4] = "Enable Cortex-M4 specific processor optimizations"
7 TUNE_CCARGS .= "${@bb.utils.contains('TUNE_FEATURES', 'cortexm4', ' -mcpu=cortex-m4', '', d)}"
9 require conf/machine/include/arm/arch-armv7em.inc
12 ARMPKGARCH:tune-cortexm4 = "cortexm4"
13 TUNE_FEATURES:tune-cortexm4 = "${TUNE_FEATURES:tune-armv7em} cortexm4"
14 PACKAGE_EXTRA_ARCHS:tune-cortexm4 = "${PACKAGE_EXTRA_ARCHS:tune-armv7em} cortexm4"
/OK3568_Linux_fs/buildroot/arch/
H A DConfig.in.arm146 bool "arm1136j-s"
152 bool "arm1136jf-s"
159 bool "arm1176jz-s"
165 bool "arm1176jzf-s"
181 bool "cortex-A5"
189 bool "cortex-A7"
197 bool "cortex-A8"
205 bool "cortex-A9"
213 bool "cortex-A12"
221 bool "cortex-A15"
[all …]
/OK3568_Linux_fs/kernel/Documentation/arm/stm32/
H A Dstm32f429-overview.rst6 ------------
8 The STM32F429 is a Cortex-M4 MCU aimed at various applications.
11 - ARM Cortex-M4 up to 180MHz with FPU
12 - 2MB internal Flash Memory
13 - External memory support through FMC controller (PSRAM, SDRAM, NOR, NAND)
14 - I2C, SPI, SAI, CAN, USB OTG, Ethernet controllers
15 - LCD controller & Camera interface
16 - Cryptographic processor
19 ---------
23 …www.st.com/web/en/catalog/mmc/FM141/SC1169/SS1577/LN1806?ecmp=stm32f429-439_pron_pr-ces2014_nov2013
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dvf610m4-colibri.dts1 // SPDX-License-Identifier: GPL-2.0+ OR MIT
3 * Device tree for Colibri VF61 Cortex-M4 support
8 /dts-v1/;
12 model = "VF610 Cortex-M4";
17 stdout-path = "serial2:115200";
47 pinctrl-names = "default";
48 pinctrl-0 = <&pinctrl_uart2>;
53 vf610-colibri {
H A Dvf610m4-cosmic.dts2 * Device tree for Cosmic+ VF6xx Cortex-M4 support
8 * This file is dual-licensed: you can use it either under the terms
47 /dts-v1/;
51 model = "VF610 Cortex-M4";
76 pinctrl-names = "default";
77 pinctrl-0 = <&pinctrl_uart3>;
82 vf610-cosmic {
H A Dlpc4350.dtsi9 * Released under the terms of 3-clause BSD License
19 compatible = "arm,cortex-m4";
25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
H A Dlpc4357.dtsi9 * Released under the terms of 3-clause BSD License
19 compatible = "arm,cortex-m4";
25 compatible = "mmio-sram";
30 compatible = "mmio-sram";
35 compatible = "mmio-sram";
H A Dvf610m4.dtsi2 * Device tree for VF6xx Cortex-M4 support
6 * This file is dual-licensed: you can use it either under the terms
45 #include "armv7-m.dtsi"
49 #address-cells = <1>;
50 #size-cells = <1>;
56 interrupt-parent = <&nvic>;
/OK3568_Linux_fs/kernel/arch/arm/mm/
H A Dproc-v7m.S1 /* SPDX-License-Identifier: GPL-2.0-only */
3 * linux/arch/arm/mm/proc-v7m.S
8 * This is the "shell" of the ARMv7-M processor support.
14 #include "proc-macros.S"
31 * - loc - location to jump to for soft reset
104 * This should be able to cover all ARMv7-M cores.
140 ldmia sp, {r0-r3, r12}
144 @ Special-purpose control register
150 stmiane sp, {r0-r6, lr} @ v7m_invalidate_l1 touches r0-r6
152 teq r8, #0 @ re-evalutae condition
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/
H A Dimx_bootaux.c4 * SPDX-License-Identifier: GPL-2.0+
35 * Per the cortex-M reference manual, the reset vector of M4 needs
37 * of that vector. So to boot M4, the A core must build the M4's reset
39 * TCMUL. When M4 is kicked, it will load the PC and SP by itself.
41 * accessing the M4 TCMUL.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/stm32/
H A Dst,mlahb.yaml1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
3 ---
5 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
7 title: STMicroelectronics STM32 ML-AHB interconnect bindings
10 - Fabien Dessenne <fabien.dessenne@st.com>
11 - Arnaud Pouliquen <arnaud.pouliquen@st.com>
14 These bindings describe the STM32 SoCs ML-AHB interconnect bus which connects
15 a Cortex-M subsystem with dedicated memories. The MCU SRAM and RETRAM memory
17 using different buses (see [2]): balancing the Cortex-M firmware accesses
23 - $ref: /schemas/simple-bus.yaml#
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7m/
H A Dsystick-timer.c2 * ARM Cortex M3/M4/M7 SysTick timer driver
5 * Based on arch/arm/mach-stm32/stm32f1/timer.c
12 * SPDX-License-Identifier: GPL-2.0+
14 * The SysTick timer is a 24-bit count down timer. The clock can be either the
30 /* SysTick Base Address - fixed for all Cortex M3, M4 and M7 devices */
48 /* read the 24-bit timer */
54 return TIMER_MAX_VAL - readl(&systick->current_val); in read_timer()
62 writel(TIMER_MAX_VAL, &systick->reload_val); in timer_init()
64 writel(0, &systick->current_val); in timer_init()
66 cal = readl(&systick->calibration); in timer_init()
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/freescale/
H A Dfsl,vf610-mscm-ir.txt1 Freescale Vybrid Miscellaneous System Control - Interrupt Router
8 which comes with a Cortex-A5/Cortex-M4 combination).
11 - compatible: "fsl,vf610-mscm-ir"
12 - reg: the register range of the MSCM Interrupt Router
13 - fsl,cpucfg: The handle to the MSCM CPU configuration node, required
15 - interrupt-controller: Identifies the node as an interrupt controller
16 - #interrupt-cells: Two cells, interrupt number and cells.
23 mscm_ir: interrupt-controller@40001800 {
24 compatible = "fsl,vf610-mscm-ir";
27 interrupt-controller;
[all …]
/OK3568_Linux_fs/buildroot/package/freescale-imx/imx-m4fwloader/
H A DConfig.in2 bool "imx-m4fwloader"
6 Cortex-M4 core available in some i.MX processors.
8 https://github.com/codeauroraforum/imx-m4fwloader
/OK3568_Linux_fs/kernel/arch/arm/mach-imx/
H A Dmach-imx7d-cm4.c1 // SPDX-License-Identifier: GPL-2.0
11 "fsl,imx7d-cm4",
15 DT_MACHINE_START(IMX7D, "Freescale i.MX7 Dual Cortex-M4 (Device Tree)")
/OK3568_Linux_fs/kernel/drivers/firmware/imx/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0-only
18 The System Controller Firmware (SCFW) is a low-level system function
19 which runs on a dedicated Cortex-M core to provide power, clock, and
24 SCU firmware running on M4.
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/remoteproc/
H A Dimx-rproc.txt1 NXP iMX6SX/iMX7D Co-Processor Bindings
2 ----------------------------------------
4 This binding provides support for ARM Cortex M4 Co-processor found on some
8 - compatible Should be one of:
9 "fsl,imx7d-cm4"
10 "fsl,imx6sx-cm4"
11 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
12 - syscon Phandle to syscon block which provide access to
16 - memory-region list of phandels to the reserved memory regions.
17 (See: ../reserved-memory/reserved-memory.txt)
[all …]
H A Dmtk,scp.txt2 ----------------------------------------
4 This binding provides support for ARM Cortex M4 Co-processor found on some
8 - compatible Should be "mediatek,mt8183-scp"
9 - reg Should contain the address ranges for the two memory
11 - reg-names Contains the corresponding names for the two memory
13 - clocks Clock for co-processor (See: ../clock/clock-bindings.txt)
14 - clock-names Contains the corresponding name for the clock. This
18 --------
22 for the rpmsg devices - but must contain the following property:
24 - mtk,rpmsg-name Contains the name for the rpmsg device. Used to match
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/arm/
H A Dcpus.yaml1 # SPDX-License-Identifier: GPL-2.0
3 ---
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
10 - Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
21 with updates for 32-bit and 64-bit ARM systems provided in this document.
30 - square brackets define bitfields, eg reg[7:0] value of the bitfield in
59 On 32-bit ARM v7 or later systems this property is
68 On ARM v8 64-bit systems this property is required
71 * If cpus node's #address-cells property is set to 2
79 * If cpus node's #address-cells property is set to 1
[all …]
/OK3568_Linux_fs/kernel/arch/arm/
H A DKconfig1 # SPDX-License-Identifier: GPL-2.0
131 The ARM series is a line of low-power-consumption RISC chip designs
133 handhelds such as the Compaq IPAQ. ARM-based PCs are no longer
134 manufactured, but legacy ARM-based PC hardware remains popular in
244 Patch phys-to-virt and virt-to-phys translation functions at
248 This can only be used with non-XIP MMU kernels where the base
294 bool "MMU-based Paged Memory Management Support"
297 Select if you want MMU-based virtualised addressing space
336 bool "ARMv7-M based platforms (Cortex-M0/M3/M4)"
349 bool "EBSA-110"
[all …]
/OK3568_Linux_fs/buildroot/boot/afboot-stm32/
H A D0001-Pass-fno-builtin-to-fix-build-with-gcc-10.patch4 Subject: [PATCH] Pass -fno-builtin to fix build with gcc 10
6 gcc 10, if it recognizes some hand-written code that looks like
15 gets recognized as such. However, in the context of bare-metal code,
21 …projets/buildroot/output/host/opt/ext-toolchain/bin/../arm-buildroot-uclinux-uclibcgnueabi/bin/ld.…
22 stm32f429i-disco.c:(.text.reset+0x1a): undefined reference to `memcpy'
23 …projets/buildroot/output/host/opt/ext-toolchain/bin/../arm-buildroot-uclinux-uclibcgnueabi/bin/ld.…
24 make[1]: *** [Makefile:26: stm32f429i-disco] Error 1
26 Upstream: https://github.com/mcoquelin-stm32/afboot-stm32/pull/9
27 Signed-off-by: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
28 ---
[all …]
/OK3568_Linux_fs/kernel/drivers/remoteproc/
H A Dimx_rproc.c1 // SPDX-License-Identifier: GPL-2.0-only
49 * struct imx_rproc_mem - slim internal memory structure
61 /* M4 own area. Can be mapped at probe */
66 u32 da; /* device address (From Cortex M4 view)*/
92 /* OCRAM_S (M4 Boot code) - alias */
96 /* OCRAM (Code) - alias */
98 /* OCRAM_EPDC (Code) - alias */
100 /* OCRAM_PXP (Code) - alias */
104 /* DDR (Code) - alias, first part of DDR (Data) */
121 /* TCML (M4 Boot Code) - alias */
[all …]
/OK3568_Linux_fs/kernel/drivers/irqchip/
H A Dirq-vf610-mscm-ir.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * Copyright (C) 2014-2015 Toradex AG
9 * one of the two available CPU's on Vybrid VF6xx SoC's (Cortex-A5 or
10 * Cortex-M4). The router will be configured transparently on a IRQ
14 * CPU 0, CPU 1 or both. The routing is useful for dual-core
18 * o It is required to setup the interrupt router even on single-core
28 #include <dt-bindings/interrupt-controller/arm-gic.h>
55 data->saved_irsprc[i] = readw_relaxed(data->mscm_ir_base + MSCM_IRSPRC(i)); in vf610_mscm_ir_save()
63 writew_relaxed(data->saved_irsprc[i], data->mscm_ir_base + MSCM_IRSPRC(i)); in vf610_mscm_ir_restore()
88 irq_hw_number_t hwirq = data->hwirq; in vf610_mscm_ir_enable()
[all …]
H A Dirq-nvic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * drivers/irq/irq-nvic.c
9 * ARMv7-M CPUs (Cortex-M3/M4)
36 #define NVIC_MAX_IRQ ((NVIC_MAX_BANKS - 1) * 32 + 16)
85 return -ENOMEM; in nvic_of_init()
98 return -ENOMEM; in nvic_of_init()
115 gc->reg_base = nvic_base + 4 * i; in nvic_of_init()
116 gc->chip_types[0].regs.enable = NVIC_ISER; in nvic_of_init()
117 gc->chip_types[0].regs.disable = NVIC_ICER; in nvic_of_init()
118 gc->chip_types[0].chip.irq_mask = irq_gc_mask_disable_reg; in nvic_of_init()
[all …]
/OK3568_Linux_fs/buildroot/docs/manual/
H A Dadding-packages-tips.txt1 // -*- mode:doc; -*-
6 [[package-name-variable-relation]]
22 itself (e.g.: +package/foo-bar_boo/foo-bar_boo.mk+);
25 +foo-bar_boo+);
27 * the config entry is the upper case _package name_ with `.` and `-`
32 with `.` and `-` characters substituted with `_` (e.g.:
35 [[check-package]]
38 Buildroot provides a script in +utils/check-package+ that checks new or
47 To use it, run the +check-package+ script, by telling which files you
50 ----
[all …]

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