xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/vf610m4-colibri.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0+ OR MIT
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Device tree for Colibri VF61 Cortex-M4 support
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * Copyright (C) 2015 Stefan Agner
6*4882a593Smuzhiyun */
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/dts-v1/;
9*4882a593Smuzhiyun#include "vf610m4.dtsi"
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "VF610 Cortex-M4";
13*4882a593Smuzhiyun	compatible = "fsl,vf610m4";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		bootargs = "clk_ignore_unused init=/linuxrc rw";
17*4882a593Smuzhiyun		stdout-path = "serial2:115200";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	memory@8c000000 {
21*4882a593Smuzhiyun		device_type = "memory";
22*4882a593Smuzhiyun		reg = <0x8c000000 0x3000000>;
23*4882a593Smuzhiyun	};
24*4882a593Smuzhiyun};
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun&gpio0 {
27*4882a593Smuzhiyun	status = "disabled";
28*4882a593Smuzhiyun};
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun&gpio1 {
31*4882a593Smuzhiyun	status = "disabled";
32*4882a593Smuzhiyun};
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun&gpio2 {
35*4882a593Smuzhiyun	status = "disabled";
36*4882a593Smuzhiyun};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun&gpio3 {
39*4882a593Smuzhiyun	status = "disabled";
40*4882a593Smuzhiyun};
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun&gpio4 {
43*4882a593Smuzhiyun	status = "disabled";
44*4882a593Smuzhiyun};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun&uart2 {
47*4882a593Smuzhiyun	pinctrl-names = "default";
48*4882a593Smuzhiyun	pinctrl-0 = <&pinctrl_uart2>;
49*4882a593Smuzhiyun	status = "okay";
50*4882a593Smuzhiyun};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun&iomuxc {
53*4882a593Smuzhiyun	vf610-colibri {
54*4882a593Smuzhiyun		pinctrl_uart2: uart2grp {
55*4882a593Smuzhiyun			fsl,pins = <
56*4882a593Smuzhiyun				VF610_PAD_PTD0__UART2_TX		0x21a2
57*4882a593Smuzhiyun				VF610_PAD_PTD1__UART2_RX		0x21a1
58*4882a593Smuzhiyun				VF610_PAD_PTD2__UART2_RTS		0x21a2
59*4882a593Smuzhiyun				VF610_PAD_PTD3__UART2_CTS		0x21a1
60*4882a593Smuzhiyun			>;
61*4882a593Smuzhiyun		};
62*4882a593Smuzhiyun	};
63*4882a593Smuzhiyun};
64