1*4882a593SmuzhiyunNXP iMX6SX/iMX7D Co-Processor Bindings 2*4882a593Smuzhiyun---------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThis binding provides support for ARM Cortex M4 Co-processor found on some 5*4882a593SmuzhiyunNXP iMX SoCs. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun- compatible Should be one of: 9*4882a593Smuzhiyun "fsl,imx7d-cm4" 10*4882a593Smuzhiyun "fsl,imx6sx-cm4" 11*4882a593Smuzhiyun- clocks Clock for co-processor (See: ../clock/clock-bindings.txt) 12*4882a593Smuzhiyun- syscon Phandle to syscon block which provide access to 13*4882a593Smuzhiyun System Reset Controller 14*4882a593Smuzhiyun 15*4882a593SmuzhiyunOptional properties: 16*4882a593Smuzhiyun- memory-region list of phandels to the reserved memory regions. 17*4882a593Smuzhiyun (See: ../reserved-memory/reserved-memory.txt) 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunExample: 20*4882a593Smuzhiyun m4_reserved_sysmem1: cm4@80000000 { 21*4882a593Smuzhiyun reg = <0x80000000 0x80000>; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun m4_reserved_sysmem2: cm4@81000000 { 25*4882a593Smuzhiyun reg = <0x81000000 0x80000>; 26*4882a593Smuzhiyun }; 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun imx7d-cm4 { 29*4882a593Smuzhiyun compatible = "fsl,imx7d-cm4"; 30*4882a593Smuzhiyun memory-region = <&m4_reserved_sysmem1>, <&m4_reserved_sysmem2>; 31*4882a593Smuzhiyun syscon = <&src>; 32*4882a593Smuzhiyun clocks = <&clks IMX7D_ARM_M4_ROOT_CLK>; 33*4882a593Smuzhiyun }; 34