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Searched full:ctl1 (Results 1 – 25 of 35) sorted by relevance

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/OK3568_Linux_fs/kernel/drivers/mtd/nand/raw/
H A Dcafe_nand.c65 uint32_t ctl1; member
166 uint32_t ctl1; in cafe_nand_cmdfunc() local
175 ctl1 = cafe->ctl1; in cafe_nand_cmdfunc()
177 cafe_dev_dbg(&cafe->pdev->dev, "Continue command, ctl1 %08x, #data %d\n", in cafe_nand_cmdfunc()
178 cafe->ctl1, cafe->nr_data); in cafe_nand_cmdfunc()
212 ctl1 = 0x80000000 | command | (cafe->ctl1 & CTRL1_CHIPSELECT); in cafe_nand_cmdfunc()
216 ctl1 |= (1<<26); /* rd */ in cafe_nand_cmdfunc()
223 ctl1 |= 1<<26; /* rd */ in cafe_nand_cmdfunc()
227 ctl1 |= 1<<25; /* wr */ in cafe_nand_cmdfunc()
231 ctl1 |= ((adrbytes-1)|8) << 27; in cafe_nand_cmdfunc()
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/i915/display/
H A Ddvo_tfp410.c240 u8 ctl1; in tfp410_dpms() local
242 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) in tfp410_dpms()
246 ctl1 |= TFP410_CTL_1_PD; in tfp410_dpms()
248 ctl1 &= ~TFP410_CTL_1_PD; in tfp410_dpms()
250 tfp410_writeb(dvo, TFP410_CTL_1, ctl1); in tfp410_dpms()
255 u8 ctl1; in tfp410_get_hw_state() local
257 if (!tfp410_readb(dvo, TFP410_CTL_1, &ctl1)) in tfp410_get_hw_state()
260 if (ctl1 & TFP410_CTL_1_PD) in tfp410_get_hw_state()
/OK3568_Linux_fs/kernel/drivers/pci/pcie/
H A Daspm_ext.c173 u32 ctl1 = 0, ctl2 = 0; in aspm_calc_l1ss_info() local
215 ctl1 |= t_common_mode << 8 | scale << 29 | value << 16; in aspm_calc_l1ss_info()
222 if (ctl1 == pctl1 && ctl1 == cctl1 && in aspm_calc_l1ss_info()
243 PCI_L1SS_CTL1_CM_RESTORE_TIME, ctl1); in aspm_calc_l1ss_info()
248 PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1); in aspm_calc_l1ss_info()
251 PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1); in aspm_calc_l1ss_info()
H A Daspm.c458 u32 ctl1 = 0, ctl2 = 0; in aspm_calc_l1ss_info() local
497 ctl1 |= t_common_mode << 8 | scale << 29 | value << 16; in aspm_calc_l1ss_info()
504 if (ctl1 == pctl1 && ctl1 == cctl1 && in aspm_calc_l1ss_info()
525 PCI_L1SS_CTL1_CM_RESTORE_TIME, ctl1); in aspm_calc_l1ss_info()
530 PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1); in aspm_calc_l1ss_info()
533 PCI_L1SS_CTL1_LTR_L12_TH_SCALE, ctl1); in aspm_calc_l1ss_info()
/OK3568_Linux_fs/kernel/drivers/net/wireless/ath/ath9k/
H A Dar9002_mac.c215 u32 ctl1, ctl6; in ar9002_set_txdesc() local
226 ctl1 = i->buf_len[0] | (i->is_last ? 0 : AR_TxMore); in ar9002_set_txdesc()
256 WRITE_ONCE(ads->ds_ctl1, ctl1); in ar9002_set_txdesc()
261 ctl1 |= (i->keyix != ATH9K_TXKEYIX_INVALID ? SM(i->keyix, AR_DestIdx) : 0) in ar9002_set_txdesc()
272 ctl1 |= AR_IsAggr | AR_MoreAggr; in ar9002_set_txdesc()
276 ctl1 |= AR_IsAggr; in ar9002_set_txdesc()
292 WRITE_ONCE(ads->ds_ctl1, ctl1); in ar9002_set_txdesc()
/OK3568_Linux_fs/kernel/arch/arm/mach-sa1100/
H A Dneponset.c89 GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
90 GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
91 GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
101 GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
102 GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
103 GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
329 neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1", in neponset_probe()
/OK3568_Linux_fs/kernel/drivers/net/ethernet/broadcom/
H A Dbgmac.c116 u32 ctl1; in bgmac_dma_tx_add_buf() local
121 ctl1 = len & BGMAC_DESC_CTL1_LEN; in bgmac_dma_tx_add_buf()
128 dma_desc->ctl1 = cpu_to_le32(ctl1); in bgmac_dma_tx_add_buf()
217 u32 ctl1 = le32_to_cpu(ring->cpu_base[index].ctl1); in bgmac_dma_tx_add() local
218 int len = ctl1 & BGMAC_DESC_CTL1_LEN; in bgmac_dma_tx_add()
251 u32 ctl0, ctl1; in bgmac_dma_tx_free() local
258 ctl1 = le32_to_cpu(ring->cpu_base[slot_idx].ctl1); in bgmac_dma_tx_free()
259 len = ctl1 & BGMAC_DESC_CTL1_LEN; in bgmac_dma_tx_free()
381 u32 ctl0 = 0, ctl1 = 0; in bgmac_dma_rx_setup_desc() local
385 ctl1 |= BGMAC_RX_BUF_SIZE & BGMAC_DESC_CTL1_LEN; in bgmac_dma_rx_setup_desc()
[all …]
H A Dbgmac.h442 __le32 ctl1; member
/OK3568_Linux_fs/kernel/drivers/net/can/mscan/
H A Dmscan.c621 u8 ctl1; in register_mscandev() local
623 ctl1 = in_8(&regs->canctl1); in register_mscandev()
625 ctl1 |= MSCAN_CLKSRC; in register_mscandev()
627 ctl1 &= ~MSCAN_CLKSRC; in register_mscandev()
631 ctl1 |= MSCAN_BORM; /* bus-off recovery upon request */ in register_mscandev()
634 ctl1 |= MSCAN_CANE; in register_mscandev()
635 out_8(&regs->canctl1, ctl1); in register_mscandev()
/OK3568_Linux_fs/u-boot/arch/arm/mach-keystone/include/mach/
H A Dxhci-keystone.h16 unsigned int phy_pipe; /* ctl1 */
/OK3568_Linux_fs/u-boot/board/freescale/mx51evk/
H A Dimximage.cfg103 /* Write to CTL1 */
/OK3568_Linux_fs/u-boot/drivers/net/
H A Dxilinx_ll_temac.c82 * page 23, second paragraph, The use of CTL0 register or CTL1 register
99 * page 23, second paragraph, The use of CTL0 register or CTL1 register
H A Dsunxi_emac.c297 /* Set MAC CTL1 */ in emac_setup()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/display/panel/
H A Dlvds.yaml89 CTL1: VSync
/OK3568_Linux_fs/kernel/drivers/gpu/drm/msm/disp/mdp5/
H A Dmdp5_ctl.c731 * In Dual DSI case, CTL0 and CTL1 are always assigned to two DSI in mdp5_ctlm_init()
732 * interfaces to support single FLUSH feature (Flush CTL0 and CTL1 when in mdp5_ctlm_init()
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Dcs35l33.h24 #define CS35L33_BST_CTL1 0x0B /* Boost Converter CTL1 */
H A Dcs35l35.h27 #define CS35L35_SP_FMT_CTL1 0x0D /* Serial Port Format CTL1 */
/OK3568_Linux_fs/kernel/drivers/net/wireless/broadcom/b43/
H A Ddma.c184 u32 ctl0 = 0, ctl1 = 0; in op64_fill_descriptor() local
203 ctl1 |= bufsize & B43_DMA64_DCTL1_BYTECNT; in op64_fill_descriptor()
204 ctl1 |= (addrext << B43_DMA64_DCTL1_ADDREXT_SHIFT) in op64_fill_descriptor()
208 desc->dma64.control1 = cpu_to_le32(ctl1); in op64_fill_descriptor()
/OK3568_Linux_fs/kernel/sound/mips/
H A Dhal2.h132 /* Bits in CTL1 register */
/OK3568_Linux_fs/kernel/drivers/iio/adc/
H A Dtwl4030-madc.c806 dev_err(&pdev->dev, "unable to read reg BCI CTL1 0x%X\n", in twl4030_madc_probe()
814 dev_err(&pdev->dev, "unable to write reg BCI Ctl1 0x%X\n", in twl4030_madc_probe()
/OK3568_Linux_fs/kernel/drivers/dma/
H A Dpch_dma.c745 pd->regs.dma_ctl1 = dma_readl(pd, CTL1); in pch_dma_save_regs()
768 dma_writel(pd, CTL1, pd->regs.dma_ctl1); in pch_dma_restore_regs()
/OK3568_Linux_fs/u-boot/drivers/video/
H A Di915_reg.h114 * PCH CTL1 is totally different, all but the below bits are reserved. CTL2 is
/OK3568_Linux_fs/kernel/drivers/rtc/
H A Drtc-hym8563.c136 * CTL1 only contains TEST-mode bits apart from stop, in hym8563_rtc_set_time()
/OK3568_Linux_fs/u-boot/arch/arm/include/asm/arch-mx25/
H A Dimx-regs.h56 u32 ctl1; /* control 1 */ member
/OK3568_Linux_fs/kernel/drivers/net/ethernet/allwinner/
H A Dsun4i-emac.c258 /* set MAC CTL1 */ in emac_setup()

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