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/OK3568_Linux_fs/kernel/arch/m68k/sun3/
H A Ddvma.c35 if(ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] != pte) { in dvma_page()
37 ptelist[(vaddr & 0xff000) >> PAGE_SHIFT] = pte; in dvma_page()
61 return 0; in dvma_map_iommu()
67 memset(ptelist, 0, sizeof(ptelist)); in sun3_dvma_init()
/OK3568_Linux_fs/buildroot/dl/qt5location/git/src/3rdparty/mapbox-gl-native/deps/boost/1.65.1/include/boost/predef/
H A Dmake.h26 "`R`" indicates the revision digits, "`P`" indicates the patch digits, and "`0`"
32 #define BOOST_PREDEF_MAKE_0X_VRP(V) BOOST_VERSION_NUMBER((V&0xF00)>>8,(V&0xF0)>>4,(V&0xF))
34 #define BOOST_PREDEF_MAKE_0X_VVRP(V) BOOST_VERSION_NUMBER((V&0xFF00)>>8,(V&0xF0)>>4,(V&0xF))
36 #define BOOST_PREDEF_MAKE_0X_VRPP(V) BOOST_VERSION_NUMBER((V&0xF000)>>12,(V&0xF00)>>8,(V&0xFF))
38 #define BOOST_PREDEF_MAKE_0X_VVRR(V) BOOST_VERSION_NUMBER((V&0xFF00)>>8,(V&0xFF),0)
40 …e BOOST_PREDEF_MAKE_0X_VRRPPPP(V) BOOST_VERSION_NUMBER((V&0xF000000)>>24,(V&0xFF0000)>>16,(V&0xFFF…
42 #define BOOST_PREDEF_MAKE_0X_VVRRP(V) BOOST_VERSION_NUMBER((V&0xFF000)>>12,(V&0xFF0)>>4,(V&0xF))
44 …ST_PREDEF_MAKE_0X_VRRPP000(V) BOOST_VERSION_NUMBER((V&0xF0000000)>>28,(V&0xFF00000)>>20,(V&0xFF000…
46 #define BOOST_PREDEF_MAKE_0X_VVRRPP(V) BOOST_VERSION_NUMBER((V&0xFF0000)>>16,(V&0xFF00)>>8,(V&0xFF))
48 #define BOOST_PREDEF_MAKE_10_VPPP(V) BOOST_VERSION_NUMBER(((V)/1000)%10,0,(V)%1000)
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/
H A Dcpu.c41 case 0x00001: in get_reset_cause()
42 case 0x00011: in get_reset_cause()
44 case 0x00004: in get_reset_cause()
46 case 0x00008: in get_reset_cause()
48 case 0x00010: in get_reset_cause()
54 case 0x00020: in get_reset_cause()
56 case 0x00040: in get_reset_cause()
58 case 0x00080: in get_reset_cause()
61 case 0x00100: in get_reset_cause()
63 case 0x00200: in get_reset_cause()
[all …]
/OK3568_Linux_fs/kernel/arch/arm/mach-s3c/
H A Dsleep-s3c24xx.S34 .word 0x2bedf00d
48 mov r2, #S3C24XX_PA_UART & 0xff000000
49 orr r2, r2, #S3C24XX_PA_UART & 0xff000
51 #if 0
54 ldr r12, [ r14, #0x54 ]
57 str r12, [ r14, #0x54 ]
/OK3568_Linux_fs/kernel/arch/s390/kernel/
H A Dmachine_kexec_reloc.c15 *(u16 *)loc &= 0xf000; in arch_kexec_do_relocs()
16 *(u16 *)loc |= val & 0xfff; in arch_kexec_do_relocs()
22 *(u32 *)loc &= 0xf00000ff; in arch_kexec_do_relocs()
23 *(u32 *)loc |= (val & 0xfff) << 16; /* DL */ in arch_kexec_do_relocs()
24 *(u32 *)loc |= (val & 0xff000) >> 4; /* DH */ in arch_kexec_do_relocs()
55 return 0; in arch_kexec_do_relocs()
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/media/
H A Dqcom,msm8916-venus.yaml104 reg = <0x01d00000 0xff000>;
H A Dqcom,sdm845-venus-v2.yaml119 reg = <0x0aa00000 0xff000>;
135 iommus = <&apps_smmu 0x10a0 0x8>,
136 <&apps_smmu 0x10b0 0x0>;
H A Dqcom,sdm845-venus.yaml132 reg = <0x0aa00000 0xff000>;
139 iommus = <&apps_smmu 0x10a0 0x8>,
140 <&apps_smmu 0x10b0 0x0>;
H A Dqcom,sc7180-venus.yaml124 reg = <0x0aa00000 0xff000>;
136 iommus = <&apps_smmu 0x0c00 0x60>;
H A Dqcom,msm8996-venus.yaml131 reg = <0x00c00000 0xff000>;
139 iommus = <&venus_smmu 0x00>,
140 <&venus_smmu 0x01>,
141 <&venus_smmu 0x0a>,
142 <&venus_smmu 0x07>,
143 <&venus_smmu 0x0e>,
144 <&venus_smmu 0x0f>,
145 <&venus_smmu 0x08>,
146 <&venus_smmu 0x09>,
147 <&venus_smmu 0x0b>,
[all …]
/OK3568_Linux_fs/kernel/drivers/crypto/bcm/
H A Dspu2.h14 SPU2_CIPHER_TYPE_NONE = 0x0,
15 SPU2_CIPHER_TYPE_AES128 = 0x1,
16 SPU2_CIPHER_TYPE_AES192 = 0x2,
17 SPU2_CIPHER_TYPE_AES256 = 0x3,
18 SPU2_CIPHER_TYPE_DES = 0x4,
19 SPU2_CIPHER_TYPE_3DES = 0x5,
24 SPU2_CIPHER_MODE_ECB = 0x0,
25 SPU2_CIPHER_MODE_CBC = 0x1,
26 SPU2_CIPHER_MODE_CTR = 0x2,
27 SPU2_CIPHER_MODE_CFB = 0x3,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-imx/mx7ulp/
H A Dsoc.c23 /* Temporally hard code the CPU rev to 0x73, rev 1.0. Fix it later */ in get_cpu_rev()
36 u32 bt0_cfg = 0; in get_boot_mode()
38 bt0_cfg = readl(CMC0_RBASE + 0x40); in get_boot_mode()
54 return 0; in arch_cpu_init()
60 return 0; in board_postclk_init()
64 #define UNLOCK_WORD0 0xC520 /* 1st unlock word */
65 #define UNLOCK_WORD1 0xD928 /* 2nd unlock word */
66 #define REFRESH_WORD0 0xA602 /* 1st refresh word */
67 #define REFRESH_WORD1 0xB480 /* 2nd refresh word */
71 writel(UNLOCK_WORD0, (wdog_base + 0x04)); in disable_wdog()
[all …]
/OK3568_Linux_fs/u-boot/board/tqc/tqma6/
H A Dtqma6.c57 return 0; in dram_init()
60 static const uint16_t tqma6_emmc_dsr = 0x0100;
92 int ret = 0; in board_mmc_getcd()
106 int ret = 0; in board_mmc_getwp()
110 ret = 0; in board_mmc_getwp()
125 struct mmc *mmc = find_mmc_device(0); in board_mmc_init()
132 return 0; in board_mmc_init()
153 for (i = 0; i < ARRAY_SIZE(tqma6_ecspi1_cs); ++i) in tqma6_iomuxc_spi()
187 * use logical index for bus, e.g. I2C1 -> 0 in tqma6_setup_i2c()
190 ret = setup_i2c(2, CONFIG_SYS_I2C_SPEED, 0x7f, &tqma6_i2c3_pads); in tqma6_setup_i2c()
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/OK3568_Linux_fs/kernel/arch/sparc/include/asm/
H A Dleon_amba.h24 #define LEON_REG_UART_STATUS_DR 0x00000001 /* Data Ready */
25 #define LEON_REG_UART_STATUS_TSE 0x00000002 /* TX Send Register Empty */
26 #define LEON_REG_UART_STATUS_THE 0x00000004 /* TX Hold Register Empty */
27 #define LEON_REG_UART_STATUS_BR 0x00000008 /* Break Error */
28 #define LEON_REG_UART_STATUS_OE 0x00000010 /* RX Overrun Error */
29 #define LEON_REG_UART_STATUS_PE 0x00000020 /* RX Parity Error */
30 #define LEON_REG_UART_STATUS_FE 0x00000040 /* RX Framing Error */
31 #define LEON_REG_UART_STATUS_ERR 0x00000078 /* Error Mask */
37 #define LEON_REG_UART_CTRL_RE 0x00000001 /* Receiver enable */
38 #define LEON_REG_UART_CTRL_TE 0x00000002 /* Transmitter enable */
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/arm926ejs/mxs/
H A Dmxs.c64 * This function will craft a jumptable at 0x0 which will redirect interrupt
68 * ldr pc, [pc, #0x18] ..... for each vector, thus repeated 8 times
71 * The "ldr pc, [pc, #0x18]" instruction above loads address from memory at
72 * offset 0x18 from current value of PC register. Note that PC is already
74 * actually 0x20, this the associated <destination address>. Loading the PC
79 /* ldr pc, [pc, #0x18] */ in mx28_fixup_vt()
80 const uint32_t ldr_pc = 0xe59ff018; in mx28_fixup_vt()
81 /* Jumptable location is 0x0 */ in mx28_fixup_vt()
82 uint32_t *vt = (uint32_t *)0x0; in mx28_fixup_vt()
85 for (i = 0; i < 8; i++) { in mx28_fixup_vt()
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8723bu/hal/phydm/
H A Dphydm_rainfo.h50 #define RA_MASK_CCK 0xf
51 #define RA_MASK_OFDM 0xff0
52 #define RA_MASK_HT1SS 0xff000
53 #define RA_MASK_HT2SS 0xff00000
55 #define RA_MASK_HT4SS 0xff0
56 #define RA_MASK_VHT1SS 0x3ff000
57 #define RA_MASK_VHT2SS 0xffc00000
64 #define RA_FIRST_MACID 0
67 #define RA_FIRST_MACID 0
73 #define DM_RATR_STA_INIT 0
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/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8189es/hal/phydm/
H A Dphydm_rainfo.h50 #define RA_MASK_CCK 0xf
51 #define RA_MASK_OFDM 0xff0
52 #define RA_MASK_HT1SS 0xff000
53 #define RA_MASK_HT2SS 0xff00000
55 #define RA_MASK_HT4SS 0xff0
56 #define RA_MASK_VHT1SS 0x3ff000
57 #define RA_MASK_VHT2SS 0xffc00000
64 #define RA_FIRST_MACID 0
67 #define RA_FIRST_MACID 0
73 #define DM_RATR_STA_INIT 0
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-mvebu/serdes/a38x/
H A Dsys_env_lib.h14 #define COMMON_PHY_BASE_ADDR 0x18300
16 #define DEVICE_CONFIGURATION_REG0 0x18284
17 #define DEVICE_CONFIGURATION_REG1 0x18288
18 #define COMMON_PHY_CONFIGURATION1_REG 0x18300
19 #define COMMON_PHY_CONFIGURATION2_REG 0x18304
20 #define COMMON_PHY_CONFIGURATION4_REG 0x1830c
21 #define COMMON_PHY_STATUS1_REG 0x18318
22 #define COMMON_PHYS_SELECTORS_REG 0x183fc
23 #define SOC_CONTROL_REG1 0x18204
24 #define GENERAL_PURPOSE_RESERVED0_REG 0x182e0
[all …]
/OK3568_Linux_fs/u-boot/arch/powerpc/cpu/mpc83xx/
H A Dpcie.c44 .index = 0,
58 struct pex_outbound_window *out_win = &pex->bridge.pex_outbound_win[0]; in mpc83xx_pcie_remap_cfg()
65 * Workaround for the HW bug: for Type 0 configure transactions the in mpc83xx_pcie_remap_cfg()
67 * assumes that the device number bits are 0. in mpc83xx_pcie_remap_cfg()
69 if (devfn & 0xf8) in mpc83xx_pcie_remap_cfg()
73 return 0; in mpc83xx_pcie_remap_cfg()
77 do { *val = op((type)(addr)); } while (0)
79 do { op((type *)(addr), (val)); } while (0)
81 #define cfg_read_err(val) do { *val = -1; } while (0)
82 #define cfg_write_err(val) do { } while (0)
[all …]
/OK3568_Linux_fs/kernel/drivers/net/wireless/rockchip_wlan/rtl8822be/hal/phydm/
H A Dphydm_rainfo.h52 #define RA_MASK_CCK 0xf
53 #define RA_MASK_OFDM 0xff0
54 #define RA_MASK_HT1SS 0xff000
55 #define RA_MASK_HT2SS 0xff00000
57 #define RA_MASK_HT4SS 0xff0
58 #define RA_MASK_VHT1SS 0x3ff000
59 #define RA_MASK_VHT2SS 0xffc00000
64 #define RA_FIRST_MACID 0
65 #define WIN_DEFAULT_PORT_MACID 0
68 #define RA_FIRST_MACID 0
[all …]
/OK3568_Linux_fs/kernel/arch/riscv/kernel/
H A Dmodule.c37 return 0; in apply_r_riscv_32_rela()
43 return 0; in apply_r_riscv_64_rela()
50 u32 imm12 = (offset & 0x1000) << (31 - 12); in apply_r_riscv_branch_rela()
51 u32 imm11 = (offset & 0x800) >> (11 - 7); in apply_r_riscv_branch_rela()
52 u32 imm10_5 = (offset & 0x7e0) << (30 - 10); in apply_r_riscv_branch_rela()
53 u32 imm4_1 = (offset & 0x1e) << (11 - 4); in apply_r_riscv_branch_rela()
55 *location = (*location & 0x1fff07f) | imm12 | imm11 | imm10_5 | imm4_1; in apply_r_riscv_branch_rela()
56 return 0; in apply_r_riscv_branch_rela()
63 u32 imm20 = (offset & 0x100000) << (31 - 20); in apply_r_riscv_jal_rela()
64 u32 imm19_12 = (offset & 0xff000); in apply_r_riscv_jal_rela()
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/mach-rockchip/rv1106/
H A Drv1106.c20 #define PERI_GRF_BASE 0xff000000
21 #define PERI_GRF_PERI_CON1 0x0004
23 #define CORE_GRF_BASE 0xff040000
24 #define CORE_GRF_CACHE_PERI_ADDR_START 0x0024
25 #define CORE_GRF_CACHE_PERI_ADDR_END 0x0028
26 #define CORE_GRF_MCU_CACHE_MISC 0x002c
28 #define PERI_GRF_BASE 0xff000000
29 #define PERI_GRF_USBPHY_CON0 0x0050
31 #define PERI_SGRF_BASE 0xff070000
32 #define PERI_SGRF_FIREWALL_CON0 0x0020
[all …]
/OK3568_Linux_fs/kernel/sound/soc/sof/intel/
H A Dbdw.c23 #define BDW_DSP_BAR 0
31 #define IRAM_OFFSET 0xA0000
33 #define DRAM_OFFSET 0x00000
35 #define SHIM_OFFSET 0xFB000
36 #define SHIM_SIZE 0x100
37 #define MBOX_OFFSET 0x9E000
38 #define MBOX_SIZE 0x1000
39 #define MBOX_DUMP_SIZE 0x30
40 #define EXCEPT_OFFSET 0x800
41 #define EXCEPT_MAX_HDR_SIZE 0x400
[all …]
/OK3568_Linux_fs/kernel/drivers/thermal/qcom/
H A Dtsens-v0_1.c10 #define SROT_CTRL_OFF 0x0000
13 #define TM_INT_EN_OFF 0x0000
14 #define TM_Sn_UPPER_LOWER_STATUS_CTRL_OFF 0x0004
15 #define TM_Sn_STATUS_OFF 0x0030
16 #define TM_TRDY_OFF 0x005c
19 #define MSM8916_BASE0_MASK 0x0000007f
20 #define MSM8916_BASE1_MASK 0xfe000000
21 #define MSM8916_BASE0_SHIFT 0
24 #define MSM8916_S0_P1_MASK 0x00000f80
25 #define MSM8916_S1_P1_MASK 0x003e0000
[all …]
/OK3568_Linux_fs/kernel/drivers/gpu/drm/bridge/synopsys/
H A Ddw-hdmi-qp.h10 #define CORE_ID 0x0
11 #define VER_NUMBER 0x4
12 #define VER_TYPE 0x8
13 #define CONFIG_REG 0xc
16 #define CORE_TIMESTAMP_HHMM 0x14
17 #define CORE_TIMESTAMP_MMDD 0x18
18 #define CORE_TIMESTAMP_YYYY 0x1c
20 #define GLOBAL_SWRESET_REQUEST 0x40
23 #define GLOBAL_SWDISABLE 0x44
27 #define RESET_MANAGER_CONFIG0 0x48
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