Home
last modified time | relevance | path

Searched +full:0 +full:xf01 (Results 1 – 25 of 42) sorted by relevance

12

/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/soc/ti/
H A Dkeystone-navigator-qmss.txt27 external link ram entries. If the address is specified as "0"
83 0 : None, i.e interrupt on list full only
123 queue-range = <0 0x4000>;
124 linkram0 = <0x100000 0x8000>;
125 linkram1 = <0x0 0x10000>;
132 managed-queues = <0 0x2000>;
133 reg = <0x2a40000 0x20000>,
134 <0x2a06000 0x400>,
135 <0x2a02000 0x1000>,
136 <0x2a03000 0x1000>,
[all …]
/OK3568_Linux_fs/kernel/Documentation/devicetree/bindings/timer/
H A Darm,twd.txt31 reg = <0x2c000600 0x20>;
32 interrupts = <1 13 0xf01>;
51 reg = <0x2c000620 0x20>;
52 interrupts = <1 14 0xf01>;
H A Darm,global_timer.yaml44 reg = <0x2c000600 0x20>;
45 interrupts = <1 13 0xf01>;
/OK3568_Linux_fs/kernel/arch/arm/boot/dts/
H A Dhighbank.dts9 /memreserve/ 0x00000000 0x0001000;
19 #size-cells = <0>;
24 reg = <0x900>;
43 reg = <0x901>;
62 reg = <0x902>;
81 reg = <0x903>;
98 memory@0 {
101 reg = <0x00000000 0xff900000>;
105 ranges = <0x00000000 0x00000000 0xffffffff>;
109 reg = <0xfff00000 0x1000>;
[all …]
H A Dbcm2836.dtsi10 ranges = <0x7e000000 0x3f000000 0x1000000>,
11 <0x40000000 0x40000000 0x00001000>;
12 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
16 reg = <0x40000000 0x100>;
32 interrupts = <0 IRQ_TYPE_LEVEL_HIGH>, // PHYS_SECURE_PPI
41 #size-cells = <0>;
44 v7_cpu0: cpu@0 {
47 reg = <0xf00>;
54 reg = <0xf01>;
61 reg = <0xf02>;
[all …]
H A Dmilbeaut-m10v.dtsi15 #size-cells = <0>;
20 reg = <0xf00>;
25 reg = <0xf01>;
30 reg = <0xf02>;
35 reg = <0xf03>;
64 reg = <0x1d001000 0x1000>,
65 <0x1d002000 0x1000>; /* CPU I/f base and size */
70 reg = <0x1e000050 0x20>;
71 interrupts = <0 91 4>;
77 reg = <0x1e700010 0x10>;
[all …]
H A Dkeystone-k2e-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
H A Dkeystone-k2l-netcp.dtsi15 queue-range = <0 0x2000>;
16 linkram0 = <0x100000 0x4000>;
17 linkram1 = <0x70000000 0x10000>; /* 1MB OSR mem */
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
H A Dkeystone-k2hk-netcp.dtsi15 queue-range = <0 0x4000>;
16 linkram0 = <0x100000 0x8000>;
17 linkram1 = <0x0 0x10000>;
24 managed-queues = <0 0x2000>;
25 reg = <0x2a40000 0x20000>,
26 <0x2a06000 0x400>,
27 <0x2a02000 0x1000>,
28 <0x2a03000 0x1000>,
29 <0x23a80000 0x20000>,
30 <0x2a80000 0x20000>;
[all …]
H A Dartpec6.dtsi55 #size-cells = <0>;
57 cpu0: cpu@0 {
60 reg = <0>;
74 reg = <0xf8000000 0x48>;
80 psci_version = <0x84000000>;
81 cpu_on = <0x84000003>;
82 system_reset = <0x84000009>;
87 reg = <0xfaf00000 0x58>;
92 #clock-cells = <0>;
98 #clock-cells = <0>;
[all …]
H A Dhisi-x5hd2.dtsi20 #address-cells = <0>;
23 reg = <0xf8a01000 0x1000>, <0xf8a00100 0x100>;
31 ranges = <0 0xf8000000 0x8000000>;
41 reg = <0x00002000 0x1000>;
43 interrupts = <0 24 4>;
55 reg = <0x00a29000 0x1000>;
57 interrupts = <0 25 4>;
64 reg = <0x00a2a000 0x1000>;
66 interrupts = <0 26 4>;
73 reg = <0x00a2b000 0x1000>;
[all …]
H A Dhi3620.dtsi27 #clock-cells = <0>;
34 #size-cells = <0>;
37 cpu@0 {
40 reg = <0x0>;
72 ranges = <0 0xfc000000 0x2000000>;
76 reg = <0x100000 0x100000>;
77 interrupts = <0 15 4>;
85 #address-cells = <0>;
88 reg = <0x1000 0x1000>, <0x100 0x100>;
95 ranges = <0 0x802000 0x1000>;
[all …]
H A Dsocfpga_arria10.dtsi15 #size-cells = <0>;
18 cpu@0 {
21 reg = <0>;
36 reg = <0xffffd000 0x1000>,
37 <0xffffc100 0x100>;
56 reg = <0xffda1000 0x1000>;
57 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>,
58 <0 84 IRQ_TYPE_LEVEL_HIGH>,
59 <0 85 IRQ_TYPE_LEVEL_HIGH>,
60 <0 86 IRQ_TYPE_LEVEL_HIGH>,
[all …]
H A Daspeed-g6.dtsi44 #size-cells = <0>;
50 reg = <0xf00>;
56 reg = <0xf01>;
85 reg = <0x40461000 0x1000>,
86 <0x40462000 0x1000>,
87 <0x40464000 0x2000>,
88 <0x40466000 0x2000>;
92 reg = < 0x1e620000 0xc4
93 0x20000000 0x10000000 >;
95 #size-cells = <0>;
[all …]
H A Dsocfpga.dtsi23 #size-cells = <0>;
26 cpu0: cpu@0 {
29 reg = <0>;
43 interrupts = <0 176 4>, <0 177 4>;
45 reg = <0xff111000 0x1000>,
46 <0xff113000 0x1000>;
53 reg = <0xfffed000 0x1000>,
54 <0xfffec100 0x100>;
73 reg = <0xffe01000 0x1000>;
74 interrupts = <0 104 4>,
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/dts/
H A Dbcm2836.dtsi7 ranges = <0x7e000000 0x3f000000 0x1000000>,
8 <0x40000000 0x40000000 0x00001000>;
9 dma-ranges = <0xc0000000 0x00000000 0x3f000000>;
13 reg = <0x40000000 0x100>;
29 interrupts = <0>, // PHYS_SECURE_PPI
38 #size-cells = <0>;
40 v7_cpu0: cpu@0 {
43 reg = <0xf00>;
50 reg = <0xf01>;
57 reg = <0xf02>;
[all …]
H A Dzynqmp.dtsi18 #size-cells = <0>;
20 cpu@0 {
24 reg = <0x0>;
32 reg = <0x1>;
40 reg = <0x2>;
48 reg = <0x3>;
55 CPU_SLEEP_0: cpu-sleep-0 {
57 arm,psci-suspend-param = <0x40000000>;
76 #power-domain-cells = <0x0>;
77 pd-id = <0x16>;
[all …]
H A Dls1021a.dtsi28 #size-cells = <0>;
33 reg = <0xf00>;
40 reg = <0xf01>;
71 reg = <0x1401000 0x1000>,
72 <0x1402000 0x1000>,
73 <0x1404000 0x2000>,
74 <0x1406000 0x2000>;
81 reg = <0x1530000 0x10000>;
87 reg = <0x1ee0000 0x10000>;
93 reg = <0x1560000 0x10000>;
[all …]
H A Drk3036.dtsi31 reg = <0x60000000 0x40000000>;
43 #size-cells = <0>;
49 reg = <0xf00>;
62 reg = <0xf01>;
75 reg = <0x20078000 0x4000>;
77 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
89 #clock-cells = <0>;
109 reg = <0x20000000 0x1000>;
119 reg = <0x0 0x20004000 0x0 0x1000>;
124 reg = <0x20060000 0x100>;
[all …]
H A D.rk3036-sdk.dtb.dts.tmp
H A Drk322x.dtsi30 #size-cells = <0>;
35 reg = <0xf00>;
49 reg = <0xf01>;
56 reg = <0xf02>;
63 reg = <0xf03>;
76 reg = <0x110f0000 0x4000>;
77 interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
96 reg = <0x60000000 0x40000000>;
118 #clock-cells = <0>;
123 reg = <0x10080000 0x9000>;
[all …]
/OK3568_Linux_fs/u-boot/arch/arm/cpu/armv7/ls102xa/
H A Dpsci.S15 #define RCPM_TWAITSR 0x04C
17 #define SCFG_CORE0_SFT_RST 0x130
18 #define SCFG_CORESRENCR 0x204
20 #define DCFG_CCSR_RSTCR 0x0B0
21 #define DCFG_CCSR_RSTCR_RESET_REQ 0x2
22 #define DCFG_CCSR_BRR 0x0E4
23 #define DCFG_CCSR_SCRATCHRW1 0x200
25 #define PSCI_FN_PSCI_VERSION_FEATURE_MASK 0x0
26 #define PSCI_FN_CPU_SUSPEND_FEATURE_MASK 0x0
27 #define PSCI_FN_CPU_OFF_FEATURE_MASK 0x0
[all …]
/OK3568_Linux_fs/kernel/include/linux/mlx4/
H A Dcmd.h43 MLX4_CMD_SYS_EN = 0x1,
44 MLX4_CMD_SYS_DIS = 0x2,
45 MLX4_CMD_MAP_FA = 0xfff,
46 MLX4_CMD_UNMAP_FA = 0xffe,
47 MLX4_CMD_RUN_FW = 0xff6,
48 MLX4_CMD_MOD_STAT_CFG = 0x34,
49 MLX4_CMD_QUERY_DEV_CAP = 0x3,
50 MLX4_CMD_QUERY_FW = 0x4,
51 MLX4_CMD_ENABLE_LAM = 0xff8,
52 MLX4_CMD_DISABLE_LAM = 0xff7,
[all …]
/OK3568_Linux_fs/kernel/sound/soc/codecs/
H A Drt715.c46 if (ret < 0) { in rt715_index_write()
62 if (ret < 0) in rt715_get_gain()
66 val_h |= 0x20; in rt715_get_gain()
69 if (ret < 0) in rt715_get_gain()
91 val_h = 0x80; in rt715_set_amp_gain_put()
93 val_h = 0x0; in rt715_set_amp_gain_put()
100 val_ll = (mc->max - ucontrol->value.integer.value[0]) << 7; in rt715_set_amp_gain_put()
102 read_ll = read_ll & 0x7f; in rt715_set_amp_gain_put()
106 val_ll = ((ucontrol->value.integer.value[0]) & 0x7f); in rt715_set_amp_gain_put()
110 read_ll = read_ll & 0x80; in rt715_set_amp_gain_put()
[all …]
/OK3568_Linux_fs/u-boot/include/dt-bindings/pinctrl/
H A Dstm32f746-pinfunc.h4 #define STM32F746_PA0_FUNC_GPIO 0x0
5 #define STM32F746_PA0_FUNC_TIM2_CH1_TIM2_ETR 0x2
6 #define STM32F746_PA0_FUNC_TIM5_CH1 0x3
7 #define STM32F746_PA0_FUNC_TIM8_ETR 0x4
8 #define STM32F746_PA0_FUNC_USART2_CTS 0x8
9 #define STM32F746_PA0_FUNC_UART4_TX 0x9
10 #define STM32F746_PA0_FUNC_SAI2_SD_B 0xb
11 #define STM32F746_PA0_FUNC_ETH_MII_CRS 0xc
12 #define STM32F746_PA0_FUNC_EVENTOUT 0x10
13 #define STM32F746_PA0_FUNC_ANALOG 0x11
[all …]

12